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* st/mesa: add support for get sample positionDave Airlie2013-04-114-0/+96
* gallium: add get_sample_position interfaceDave Airlie2013-04-111-0/+13
* r600g: fix two issues in compressed msaa reading codeDave Airlie2013-04-111-2/+2
* i965/vs: Don't hardcode DEBUG_VS in generic vec4 code.Paul Berry2013-04-115-14/+25
* i965/vs: Generalize computation of array strides in preparation for GS.Paul Berry2013-04-112-4/+16
* i965/vs: Generalize attribute setup code in preparation for GS.Paul Berry2013-04-112-22/+33
* i965/vs: Generalize vertex emission code in preparation for GS.Paul Berry2013-04-113-19/+59
* i965/vs: rename vec4_generator::generate_vs_instruction.Paul Berry2013-04-112-7/+7
* i965/vs: Generalize data structures pointed to by vec4_generator.Paul Berry2013-04-113-9/+7
* i965/vs: Rename vec4_generator::prog to shader_prog.Paul Berry2013-04-112-6/+6
* i965/vs: move VS-specific data members to vs_vec4_visitor.Paul Berry2013-04-116-88/+101
* i965/vs: move ARB_vertex_program functions to vec4_vs_visitor.Paul Berry2013-04-112-6/+8
* i965/vs: Add virtual function make_reg_for_system_value().Paul Berry2013-04-113-18/+36
* i965/vs: Make some vec4_visitor functions virtual.Paul Berry2013-04-115-11/+41
* i965/vs: Make vec4_vs_visitor class derived from vec4_visitor.Paul Berry2013-04-114-2/+37
* i965/vs: split brw_vs_prog_data into generic and VS-specific parts.Paul Berry2013-04-1116-105/+155
* i965/vs: split brw_vs_prog_key into generic and VS-specific parts.Paul Berry2013-04-114-42/+48
* i965/vs: split brw_vs_compile into generic and VS-specific parts.Paul Berry2013-04-114-9/+13
* i965/vs: Remove brw_vs_prog_data pointer from brw_vs_compile.Paul Berry2013-04-117-44/+49
* i965: Generalize computation of VUE map in preparation for GS.Paul Berry2013-04-112-6/+9
* i965/vs: Make type of vec4_visitor::vp more generic.Paul Berry2013-04-114-11/+11
* i965: Rename backend_visitor::prog to shader_prog.Paul Berry2013-04-117-19/+22
* glsl: Fix (and validate) comment above glsl_type::name.Paul Berry2013-04-112-2/+5
* radeon/uvd: add UVD implementation v5Christian König2013-04-1115-21/+1924
* radeon/winsys: add uvd ring support to winsys v3Christian König2013-04-113-0/+31
* st/mesa: fix UBO offsets.Dave Airlie2013-04-111-0/+1
* egl/x11: Fix initialisation of swap_intervalRalf Jung2013-04-101-2/+2
* intel: Fall back to X-tiling when larger than estimated aperture size.Kenneth Graunke2013-04-101-2/+26
* intel: Refactor code in intel_miptree_choose_tiling().Kenneth Graunke2013-04-101-4/+6
* intel: Move the max_gtt_map_object_size estimation to intel_context.Kenneth Graunke2013-04-103-18/+20
* r600g: Add support for GL_ARB_texture_buffer_rangeFredrik Höglund2013-04-113-5/+11
* i965/blorp: Remove unnecessary test in gen7_blorp_emit_depth_stencil_config.Paul Berry2013-04-101-7/+5
* r600g: fix valgrind warning on CaymanMarek Olšák2013-04-101-1/+1
* gallivm/tgsi: handle untyped movesZack Rusin2013-04-102-0/+10
* gallivm: fix loops and conditionals within GSZack Rusin2013-04-102-19/+105
* llvmpipe: implement PIPE_QUERY_SO_STATISTICSZack Rusin2013-04-102-0/+21
* gallivm: fix unsigned divide and remainder opcodesZack Rusin2013-04-101-4/+33
* gallivm: fix breakcZack Rusin2013-04-101-12/+14
* intel/hsw: Enable hiz (v2)Chad Versace2013-04-102-2/+51
* i965: Remove brw_context::depthstencil::hiz_mtChad Versace2013-04-102-3/+0
* intel: Replace checks for hiz_mt with intel_has*hiz()Chad Versace2013-04-108-40/+36
* i965: Change signature of brw_get_depthstencil_tile_masks()Chad Versace2013-04-104-3/+16
* i965/blorp: Add fields brw_blorp_mip_info::level,layerChad Versace2013-04-102-0/+15
* intel: Add field intel_mipmap_slice::has_hizChad Versace2013-04-104-2/+44
* i965/blorp: Align rectangle primitive for hiz opsChad Versace2013-04-101-0/+29
* i965/vs: Use GRFs for pull constant offsets on gen7.Eric Anholt2013-04-106-22/+56
* i965/vs: When asked to make a dst_reg for a src.xxxx, just write to src.x.Eric Anholt2013-04-101-1/+8
* i965/gen6: Reduce updates of transform feedback offsets with HW contexts.Eric Anholt2013-04-101-1/+1
* i965/gen7: Skip resetting SOL offsets at batch start with HW contexts.Eric Anholt2013-04-102-6/+21
* radeonsi: remove sampler writemask v3Christian König2013-04-102-13/+8
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