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* radeon: Adding missing stdio.h include.José Fonseca2014-01-231-0/+1
* mapi: Prevent cast from pointer to integer of different size.José Fonseca2014-01-231-1/+1
* egl: Use C11 thread abstractions.José Fonseca2014-01-231-19/+7
* mapi: Use C11 thread abstractions.José Fonseca2014-01-231-152/+13
* gallium: Use C11 thread abstractions.José Fonseca2014-01-235-235/+37
* os: Remove pipe_static_condvar.José Fonseca2014-01-231-12/+0
* glsl: remove remaining is_array variablesTimothy Arceri2014-01-235-59/+35
* glsl: create type name for arrays of arraysTimothy Arceri2014-01-231-2/+14
* glsl: Allow arrays of arrays as input to vertex shaderTimothy Arceri2014-01-231-2/+3
* glsl: only call mark_max_array if we are assigning anTimothy Arceri2014-01-231-2/+4
* glsl: Add ARB_arrays_of_arrays support to yacc definition and astTimothy Arceri2014-01-237-173/+235
* mesa: Add ARB_arrays_of_arraysTimothy Arceri2014-01-233-0/+5
* i965/blorp: switch eu-emitter to use FS IR and fs_generatorTopi Pohjolainen2014-01-233-120/+84
* i965/fs: add support for BRW_OPCODE_AVG in fs_generatorTopi Pohjolainen2014-01-231-0/+3
* i965/fs: introduce blorp specific rt-write for fs_generatorTopi Pohjolainen2014-01-234-0/+23
* i965/fs: allow unit tests to dump the final patched assemblyTopi Pohjolainen2014-01-232-8/+10
* i965/blorp: wrap brw_IF/ELSE/ENDIF() into eu-emitterTopi Pohjolainen2014-01-232-9/+23
* i965/blorp: wrap RNDD (/brw_RNDD(&func, /emit_rndd(/)Topi Pohjolainen2014-01-232-2/+8
* i965/blorp: wrap FRC (/brw_FRC(&func, /emit_frc(/)Topi Pohjolainen2014-01-232-4/+10
* i965/blorp: wrap MUL (/brw_MUL(&func, /emit_mul(/)Topi Pohjolainen2014-01-232-9/+16
* i965/blorp: wrap OR (/brw_OR(&func, /emit_or(/)Topi Pohjolainen2014-01-232-24/+31
* i965/blorp: wrap SHL (/brw_SHL(&func, /emit_shl(/)Topi Pohjolainen2014-01-232-12/+19
* i965/blorp: wrap SHR (/brw_SHR(&func, /emit_shr(/)Topi Pohjolainen2014-01-232-12/+19
* i965/blorp: wrap ADD (/brw_ADD(&func, /emit_add(/)Topi Pohjolainen2014-01-232-18/+32
* i965/blorp: wrap AND (/brw_AND(&func, /emit_and(/)Topi Pohjolainen2014-01-232-39/+46
* i965/blorp: wrap MOV (/brw_MOV(&func, /emit_mov(/)Topi Pohjolainen2014-01-232-35/+45
* i965/blorp: wrap emission of if-equal-assignmentTopi Pohjolainen2014-01-232-24/+12
* i965/blorp: wrap emission of conditional assignmentTopi Pohjolainen2014-01-232-15/+15
* i965/blorp: move emission of sample combining into eu-emitterTopi Pohjolainen2014-01-233-9/+24
* i965/blorp: move emission of rt-write into eu-emitterTopi Pohjolainen2014-01-233-10/+28
* i965/blorp: move emission of texture lookup into eu-emitterTopi Pohjolainen2014-01-233-22/+60
* i965/fs: introduce non-compressed equivalent of tex_cmsTopi Pohjolainen2014-01-234-0/+13
* i965: rename tex_ms to tex_cmsTopi Pohjolainen2014-01-2310-17/+17
* i965/blorp: move emission of pixel kill into eu-emitterTopi Pohjolainen2014-01-233-25/+38
* i965/blorp: introduce separate eu-emitter for blit compilerTopi Pohjolainen2014-01-234-38/+113
* i965: Support 32 texture image units on Haswell+.Kenneth Graunke2014-01-222-4/+7
* i965/fs: Switch from BRW_MAX_TEX_UNIT to the actual limit.Kenneth Graunke2014-01-221-1/+2
* mesa: Bump MAX_TEXTURE_IMAGE_UNITS to 32.Kenneth Graunke2014-01-221-1/+1
* i965/vec4: Support arbitrarily large sampler state indices on Haswell+.Kenneth Graunke2014-01-222-3/+26
* i965/vec4: Refactor sampler message setup.Kenneth Graunke2014-01-221-17/+22
* i965/vec4: Don't set header_present if texel offsets are all 0.Kenneth Graunke2014-01-221-9/+8
* i965/fs: Support arbitrarily large sampler state indices on Haswell+.Kenneth Graunke2014-01-222-2/+22
* i965/fs: Plumb sampler index into emit_texture_gen7.Kenneth Graunke2014-01-223-4/+4
* i965/fs: Refactor sampler message header to duplicate less code.Kenneth Graunke2014-01-221-25/+21
* i965: Use get_element_ud to shorten texture header access.Kenneth Graunke2014-01-221-2/+1
* gallium/util: util_format_srgb should not return FORMAT_NONE for sRGB formatsMarek Olšák2014-01-231-0/+3
* gallium: remove PIPE_CAP_SCALED_RESOLVEMarek Olšák2014-01-2312-14/+0
* radeonsi: use hardware scissors correctlyMarek Olšák2014-01-231-35/+20
* radeonsi: handle R600_CONTEXT_PS_PARTIAL_FLUSH in si_emit_cache_flushMarek Olšák2014-01-231-1/+2
* r600g,radeonsi: if discarding whole buffer range, discard whole resource insteadMarek Olšák2014-01-231-0/+8