summaryrefslogtreecommitdiffstats
path: root/src
Commit message (Collapse)AuthorAgeFilesLines
* intel: Remove dead intel_drawbuf_region().Eric Anholt2013-05-282-16/+0
| | | | | | | | Since the glBitmap() MRT change, it's unused. There was basically no way to responsibly use this function since MRT was introduced. Reviewed-and-tested-by: Ian Romanick <[email protected]> Acked-by: Paul Berry <[email protected]>
* intel: Fix format handling of blit glBitmap()Eric Anholt2013-05-281-3/+12
| | | | | | | | | | | Any 32-bit format got ARGB8888 handling (including, say, GL_RG1616), and anything else got 16-bit (including, say, GL_R8), which could potentially hang the GPU by writing out of bounds. NOTE: This is a candidate for the stable branches. Reviewed-and-tested-by: Ian Romanick <[email protected]> Acked-by: Paul Berry <[email protected]>
* intel: Fix MRT handling of glBitmap().Eric Anholt2013-05-281-9/+14
| | | | | | | | | We'd only hit color buffer 0 even if multiple draw buffers were bound. NOTE: This is a candidate for the stable branches. Reviewed-and-tested-by: Ian Romanick <[email protected]> Acked-by: Paul Berry <[email protected]>
* intel: Rebuild PBO blit glTexImage() on top of miptrees.Eric Anholt2013-05-281-30/+32
| | | | | | | | | | | | | | This will ensure that we have resolves if we ever extend this to glTexSubImage(), and fixes missing image start offset handling. The texture buffer alloc ended up getting moved up, because we want to look at the format of the image's actual mt to see if we'll end up blitting the right thing, in the case of packed depth/stencil uploads. This is the last caller of intelEmitCopyBlit() on a miptree-wrapped BO. Reviewed-and-tested-by: Ian Romanick <[email protected]> Acked-by: Paul Berry <[email protected]>
* intel: Rebuild PBO blit glReadPixels() on top of miptrees.Eric Anholt2013-05-281-25/+23
| | | | | | | | | The previous code was missing depth resolves, that had only been prevented due to no blitting of Y tiling. The pair of flip args in the new blit function means that we can just drop the pack->Invert fallback. Reviewed-and-tested-by: Ian Romanick <[email protected]> Acked-by: Paul Berry <[email protected]>
* intel: Rework intel_miptree_create_for_region() to wrap a BO.Eric Anholt2013-05-283-24/+67
| | | | | | | | | | | | | I needed to do this for the PBO blit cases to use intel_miptree_blit(). But this also actually partially fixes a bug in EGLImage handling: We can't share regions across contexts, because regions have a refcount that isn't protected by a mutex, and different contexts can be simulataneously accessed from multiple threads. Now we just need to get regions out of __DRIImage. There was also a missing use of image->offset in the EGLImage renderbuffer storage code. Reviewed-and-tested-by: Ian Romanick <[email protected]> Acked-by: Paul Berry <[email protected]>
* intel: Make a temporary miptree for the blit path of miptree mapping.Eric Anholt2013-05-282-74/+29
| | | | | | | | | | | In a bit of debug code, we no longer have the inter-slice x/y to print. But I think the level/slice is more useful in this case for looking at what's getting mapped, especially given that INTEL_DEBUG=blit will tell you the other value. Reviewed-and-tested-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Paul Berry <[email protected]>
* intel: Make a temporary miptree when doing blit uploads for glTexSubImage().Eric Anholt2013-05-281-44/+28
| | | | | | | | | | | While this is a bit more CPU work, it also is less code to handle this path, and fixes problems with 32k-pitch textures and missing resolves. v2: Add error checking in new code. Reviewed-and-tested-by: Ian Romanick <[email protected]> (v1) Reviewed-by: Kenneth Graunke <[email protected]> (v1) Acked-by: Paul Berry <[email protected]>
* intel: Extend the force_y_tiling flag to allow forcing no tiling.Eric Anholt2013-05-285-13/+26
| | | | | | | | | | | | For a blit-uploaded temporary, it's faster on current hardware to memcpy the data into a linear CPU mapping than to go through the GTT. v2: Turn the not-fully-supported mask into 3 supported enum values. Reviewed-and-tested-by: Ian Romanick <[email protected]> (v1) Reviewed-by: Kenneth Graunke <[email protected]> (v1) Reviewed-by: Paul Berry <[email protected]> (v2) Reviewed-by: Chad Versace <[email protected]> (v2)
* intel: Add an assert for glCopyTexSubImage() being called on MSAA buffers.Eric Anholt2013-05-281-0/+6
| | | | | | | | | This is just in case someone else trips over this due to our weird reuse of this code in glBlitFramebuffer(). Reviewed-and-tested-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Paul Berry <[email protected]>
* i965: Allow glCopyTexSubImage() on depth textures.Eric Anholt2013-05-281-5/+0
| | | | | | | | If the hw is pre-gen5 and can't blit depth, it'll cleanly error out. Reviewed-and-tested-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Paul Berry <[email protected]>
* i965: Prefer blorp glBlitFramebuffer() to the glCopyTexSubImage-based blit.Eric Anholt2013-05-281-8/+9
| | | | | | | | | | | | I think we've measured no performance difference from this in the past, except that the blorp code can do things like multisample resolves. Prevents piglit regression in the next commit when a testcase started trying to do a multisampled resolve through the old glCopyTexSubImage() path. Reviewed-and-tested-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Paul Berry <[email protected]>
* i965: Consistently do depth resolves before blitting.Eric Anholt2013-05-282-6/+6
| | | | | | | | | | | | | We were protected for a long time by the fact that depth was Y tiled and you couldn't blit Y. Now that we can blit Y, we were failing to resolve depth in glCopyPixels(). Note in the comment about swrast, that the swrast map path does resolves appropriately already. Reviewed-and-tested-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Paul Berry <[email protected]>
* intel: Make a wrapper for intelEmitCopyBlit using miptrees.Eric Anholt2013-05-285-111/+127
| | | | | | | | | | | | | | I had previously asserted that it was hard to write a useful, simpler blit function, but I think this might be it. This has the side effect of extending the 32k pitch check to a few more places that were missing it. v2: Update comment for being moved inside intel_miptree_blit(). Reviewed-and-tested-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Paul Berry <[email protected]>
* intel: Rename intel_renderbuffer_tile_offsets.Eric Anholt2013-05-283-6/+6
| | | | | | | | This makes it more consistent with intel_miptree_get_tile_offsets(). Reviewed-and-tested-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Paul Berry <[email protected]>
* intel: Reduce intel_renderbuffer_tile_offsets to a thin wrapper.Eric Anholt2013-05-282-28/+7
| | | | | | Reviewed-and-tested-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Acked-by: Paul Berry <[email protected]>
* intel: Make intel_miptree_get_tile_offsets return a page offset.Eric Anholt2013-05-284-10/+26
| | | | | | | | | Right now, the callers in i965 don't expect a nonzero page offset to actually occur (since that's being handled elsewhere), but it seems like a trap to leave it this way. Reviewed-and-tested-by: Ian Romanick <[email protected]> Acked-by: Paul Berry <[email protected]>
* glsl: Fix MSVC build.José Fonseca2013-05-281-3/+3
| | | | | | | | | | | | It appears that `sizeof(Class::member)` is either non-standard or merely unsupported in MSVC. So use `sizeof(instance->member)` instead, which is guaranteed to work everywhere. Also promote the assert to a static assert. Trivial.
* mesa: fix GLSL program objects with more than 16 samplers combinedMarek Olšák2013-05-289-113/+167
| | | | | | | | | | | | | | | | | | | | | | | | | | The problem is the sampler units are allocated from the same pool for all shader stages, so if a vertex shader uses 12 samplers (0..11), the fragment shader samplers start at index 12, leaving only 4 sampler units for the fragment shader. The main cause is probably the fact that samplers (texture unit -> sampler unit mapping, etc.) are tracked globally for an entire program object. This commit adapts the GLSL linker and core Mesa such that the sampler units are assigned to sampler uniforms for each shader stage separately (if a sampler uniform is used in all shader stages, it may occupy a different sampler unit in each, and vice versa, an i-th sampler unit may refer to a different sampler uniform in each shader stage), and the sampler-specific variables are moved from gl_shader_program to gl_shader. This doesn't require any driver changes, and it fixes piglit/max-samplers for gallium and classic swrast. It also works with any number of shader stages. v2: - converted tabs to spaces - added an assertion to _mesa_get_sampler_uniform_value Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* swrast: increase array size of TextureSampleMarek Olšák2013-05-282-4/+4
| | | | | | | | to match the size of ctx->Texture.Unit, and it will also fix piglit/max-samplers with the following commit. Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* mesa: declare UniformBufferBindings as an array with a static sizeMarek Olšák2013-05-284-14/+9
| | | | | | | | Some Gallium drivers were crashing, because the array was not large enough. v2: clamp the per-shader maximum in st/mesa, then sum them all up NOTE: This is a candidate for the stable branches.
* radeonsi: Enable GLSL 1.30Michel Dänzer2013-05-281-1/+1
|
* radeonsi: Handle TGSI TXQ opcodeMichel Dänzer2013-05-282-3/+33
|
* radeonsi: Add support for TGSI TXF opcodeMichel Dänzer2013-05-282-14/+51
|
* radeonsi: Use tgsi_util_get_texture_coord_dim()Michel Dänzer2013-05-281-25/+7
|
* radeonsi: Handle TGSI_SEMANTIC_CLIPDISTMichel Dänzer2013-05-281-4/+17
|
* radeonsi: Make border colour state handling safe for integer texturesMichel Dänzer2013-05-282-20/+27
|
* radeonsi: Fix hardware state for dual source blendingMichel Dänzer2013-05-284-6/+17
| | | | | Set up CB_SHADER_MASK register according to pixel shader exports, and enable some minimal state for colour buffer 1 in case dual source blending is used.
* r600g/sb: handle more cases for folding in gvn passVadim Girlin2013-05-282-28/+118
| | | | Signed-off-by: Vadim Girlin <[email protected]>
* st/vdpau: destroy handle table only when it's emptyChristian König2013-05-271-1/+1
| | | | Signed-off-by: Christian König <[email protected]>
* st/vdpau: remove vlCreateHTAB from surface functionsChristian König2013-05-271-9/+0
| | | | Signed-off-by: Christian König <[email protected]>
* st/vdpau: invalidate the handles on destructionChristian König2013-05-273-0/+4
| | | | | | Fixes a problem with xbmc when switching channels. Signed-off-by: Christian König <[email protected]>
* r600g/sb: improve folding for SETccVadim Girlin2013-05-271-8/+98
| | | | Signed-off-by: Vadim Girlin <[email protected]>
* r600g/sb: optimize CNDcc instructionsVadim Girlin2013-05-273-1/+113
| | | | Signed-off-by: Vadim Girlin <[email protected]>
* r600g/sb: improve optimization of conditional instructionsVadim Girlin2013-05-276-21/+96
| | | | Signed-off-by: Vadim Girlin <[email protected]>
* ilo: enable multiple constant buffersChia-I Wu2013-05-271-1/+1
| | | | This effectively enables uniform buffer object support.
* ilo: add support for indirect access of CONST in FSChia-I Wu2013-05-272-2/+99
| | | | | Unlike other register files, CONST is read with a message and indirect access is easier to implement.
* ilo: add support for TBOs on GEN6Chia-I Wu2013-05-271-8/+26
| | | | This hunk was missing in the last commit.
* ilo: advertise supports for pure integer formatsChia-I Wu2013-05-271-2/+3
| | | | For pure integer formats, no filtering nor blending is needed.
* ilo: add support for texture buffer objectsChia-I Wu2013-05-272-10/+32
| | | | | Take care of sampler views that have buffers as the underlying resources. Update caps related to TBOs.
* tgsi: add buffer texture to tgsi_util_get_texture_coord_dim()Chia-I Wu2013-05-272-0/+3
| | | | | | | | TGSI_TEXTURE_BUFFER is one-dimensional. Assert that exec_tex() is never called with TGSI_TEXTURE_BUFFER. Signed-off-by: Chia-I Wu <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* r600g/sb: improve handling of KILL instructionsVadim Girlin2013-05-273-89/+139
| | | | | | | This patch improves handling of unconditional KILL instructions inside the conditional blocks, uncovering more opportunities for if-conversion. Signed-off-by: Vadim Girlin <[email protected]>
* r600g/sb: fix peephole optimization for PRED_SETEVadim Girlin2013-05-271-1/+1
| | | | | | | Fixes incorrect condition that prevented optimization for PRED_SETE/PRED_SETE_INT. Signed-off-by: Vadim Girlin <[email protected]>
* r600g/sb: fix scheduling of PRED_SET instructionsVadim Girlin2013-05-272-2/+18
| | | | | | | | | | | | | | PRED_SET instructions that update exec mask should be scheduled immediately prior to the "if-then-else" block, because any instruction that is inserted after alu clause with PRED_SET and before conditional block is also conditionally executed by hw (exec mask is already updated at that moment). Propbably it's better to make PRED_SET a part of conditional "if-then-else" block in the IR to handle this more cleanly, but for now this temporary solution should prevent the problem. Signed-off-by: Vadim Girlin <[email protected]>
* r600g/sb: fix handling of preloaded inputs for compute shadersVadim Girlin2013-05-251-0/+4
| | | | | | | | | | For compute shaders we need to let the backend know that GPRs 0 and 1 are preloaded with some compute-specific input values, otherwise any use of these regs without previous definition is considered as undefined value and usually is simply replaced with 0. Signed-off-by: Vadim Girlin <[email protected]>
* xlib: add null ctx check in glXDestroyContext()Brian Paul2013-05-241-10/+12
| | | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=64934 NOTE: This is a candidate for the stable branches. Reviewed-by: Jose Fonseca <[email protected]>
* st/glx: add null ctx check in glXDestroyContext()Brian Paul2013-05-241-10/+12
| | | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=64934 NOTE: This is a candidate for the stable branches. Reviewed-by: Jose Fonseca <[email protected]>
* st/mesa: add switch cases for new IR enums to silence warningsBrian Paul2013-05-241-0/+2
|
* st/glx/xlib: assorted whitespace, comment fixesBrian Paul2013-05-241-8/+17
|
* r600g/sb: fix incorrect assertVadim Girlin2013-05-241-1/+1
| | | | Signed-off-by: Vadim Girlin <[email protected]>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-27 07:01:33 +0000