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This adds VALIGN_2 and VALIGN_4 defines for IVB and HSW
RENDER_SURFACE_STATE.
Signed-off-by: Kristian Høgsberg Kristensen <[email protected]>
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This update brings usable IVB/HSW RENDER_SURFACE_STATE structs
and adds more float fields that we previously failed to
recognize.
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This adds zeroing of reserved blocks of dwords and removes an
instruction definition.
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This update fixes cases where a 48-bit address field was split into
two parts:
__gen_address_type MemoryAddress;
uint32_t MemoryAddressHigh;
which cases this pack code to be generated:
dw[1] =
__gen_combine_address(data, &dw[1], values->MemoryAddress, dw1);
dw[2] =
__gen_field(values->MemoryAddressHigh, 0, 15) |
0;
which breaks for addresses above 4G.
This update also fixes arrays of structs in commands and structs, for
example, we now have:
struct GEN8_BLEND_STATE_ENTRY Entry[8];
and the pack functions now write all dwords in the packet, making
valgrind happy.
Finally, we would try to pack 64 bits of blend state into a uint32_t -
that's also fixed now.
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The new headers use stdbool for enable/disable fields which
implicitly converts expressions like (flags & 8) to 0 or 1.
Also handles MBO (must-be-one) fields by setting them to one,
corrects a bspec typo (_3DPRIM_LISTSTRIP_ADJ -> LINESTRIP) and
makes a few enum values less clashy.
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These must be set to one.
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The generated headers now convert float in the template struct to the
correct fixed point format.
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This will let us do MOCS settings right.
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This fixes a problem where register addresses where incorrectly shifted.
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