| Commit message (Expand) | Author | Age | Files | Lines |
* | pan/midgard: Pack load/store masks | Alyssa Rosenzweig | 2019-11-11 | 1 | -2/+30 |
* | pan/midgard: Implement nir_intrinsic_load_output_u8_as_fp16_pan | Alyssa Rosenzweig | 2019-11-11 | 1 | -0/+20 |
* | pan/midgard: Identify ld_color_buffer_u8_as_fp16* | Alyssa Rosenzweig | 2019-11-11 | 2 | -2/+7 |
* | pan/midgard: Switch base for vertex texturing on T720 | Alyssa Rosenzweig | 2019-11-08 | 1 | -11/+16 |
* | pan/midgard: Pass shader stage to disassembler | Alyssa Rosenzweig | 2019-11-08 | 4 | -4/+7 |
* | pan/midgard: Disassemble half-steps correctly | Alyssa Rosenzweig | 2019-11-08 | 1 | -3/+15 |
* | pan/midgard: Fix printing of half-registers in texture ops | Alyssa Rosenzweig | 2019-11-08 | 1 | -35/+32 |
* | panfrost: Pipe the GPU ID into compiler and disassembler | Tomeu Vizoso | 2019-11-07 | 7 | -26/+27 |
* | panfrost: Print the right zero field | Tomeu Vizoso | 2019-11-06 | 1 | -1/+1 |
* | panfrost: Decode blend shaders for SFBD | Tomeu Vizoso | 2019-11-06 | 1 | -22/+29 |
* | panfrost: Rework format encoding on SFBD | Tomeu Vizoso | 2019-11-06 | 2 | -47/+109 |
* | panfrost: Add checksum fields to SFBD descriptor | Tomeu Vizoso | 2019-11-06 | 2 | -1/+10 |
* | pan/midgard: Extend default_phys_reg to !32-bit | Alyssa Rosenzweig | 2019-11-04 | 1 | -5/+5 |
* | pan/midgard: Extend swizzle packing for vec4/16-bit | Alyssa Rosenzweig | 2019-11-04 | 1 | -3/+24 |
* | pan/midgard: Extend offset_swizzle to non-32-bit | Alyssa Rosenzweig | 2019-11-04 | 1 | -3/+4 |
* | pan/midgard: offset_swizzle doesn't need dstsize | Alyssa Rosenzweig | 2019-11-04 | 1 | -9/+9 |
* | pan/midgard: Add bizarre corner case | Alyssa Rosenzweig | 2019-11-04 | 1 | -1/+8 |
* | pan/midgard: Compute bundle interference | Alyssa Rosenzweig | 2019-11-04 | 1 | -0/+57 |
* | pan/midgard: Fix quadword_count handling | Alyssa Rosenzweig | 2019-11-04 | 3 | -4/+8 |
* | pan/midgard: Validate tags when branching | Alyssa Rosenzweig | 2019-11-04 | 1 | -6/+32 |
* | panfrost: MALI_DEPTH_TEST is actually MALI_DEPTH_WRITEMASK | Boris Brezillon | 2019-11-04 | 2 | -3/+3 |
* | pan/midgard: Eliminate blank_alu_src | Alyssa Rosenzweig | 2019-11-01 | 6 | -36/+22 |
* | pan/midgard: Refactor swizzles | Alyssa Rosenzweig | 2019-11-01 | 13 | -385/+258 |
* | pan/midgard: Add a dummy source for loads | Alyssa Rosenzweig | 2019-11-01 | 3 | -29/+11 |
* | pan/midgard: Remove OP_IS_STORE_VARY | Alyssa Rosenzweig | 2019-11-01 | 1 | -7/+0 |
* | android: Add panfrost support to build scripts | Robert Foss | 2019-10-31 | 7 | -1/+258 |
* | panfrost: Remove unused definitions in mali-job.h | Alyssa Rosenzweig | 2019-10-29 | 1 | -9/+1 |
* | panfrost: Cleanup _shader_upper -> shader | Alyssa Rosenzweig | 2019-10-29 | 2 | -13/+10 |
* | pan/midgard: Express allocated registers as offsets | Alyssa Rosenzweig | 2019-10-25 | 1 | -104/+62 |
* | pan/midgard: Expose more typesize manipulation routines | Alyssa Rosenzweig | 2019-10-25 | 2 | -2/+4 |
* | pan/midgard: Add mir_set_bytemask helper | Alyssa Rosenzweig | 2019-10-25 | 2 | -0/+7 |
* | nir/lower_idiv: add new llvm-based path | Rhys Perry | 2019-10-21 | 1 | -1/+1 |
* | pan/midgard: Implement SIMD-aware dead code elimination | Alyssa Rosenzweig | 2019-10-20 | 1 | -8/+57 |
* | pan/midgard: Create dependency graph bytewise | Alyssa Rosenzweig | 2019-10-20 | 1 | -12/+12 |
* | pan/midgard: Handle nontrivial masks in texture RA | Alyssa Rosenzweig | 2019-10-20 | 1 | -1/+1 |
* | pan/midgard: Implement per-byte liveness tracking | Alyssa Rosenzweig | 2019-10-20 | 1 | -3/+2 |
* | pan/midgard: Simplify mir_bytemask_of_read_components | Alyssa Rosenzweig | 2019-10-20 | 1 | -18/+4 |
* | pan/midgard: Report byte masks for read components | Alyssa Rosenzweig | 2019-10-20 | 6 | -31/+31 |
* | pan/midgard: Add helpers for manipulating byte masks | Alyssa Rosenzweig | 2019-10-20 | 2 | -0/+177 |
* | pan/midgard: Implement OP_IS_STORE with table | Alyssa Rosenzweig | 2019-10-20 | 2 | -13/+2 |
* | pan/midgard: Tableize load/store ops | Alyssa Rosenzweig | 2019-10-20 | 5 | -70/+102 |
* | pan/midgard: Factor out mir_get_alu_src | Alyssa Rosenzweig | 2019-10-20 | 1 | -6/+8 |
* | pan/midgard/disasm: Fix printing 8-bit/16-bit masks | Alyssa Rosenzweig | 2019-10-20 | 1 | -49/+30 |
* | pan/midgard: Identify 64-bit atomic opcodes | Alyssa Rosenzweig | 2019-10-20 | 2 | -0/+20 |
* | pan/midgard: Debug mir_insert_instruction_after_scheduled | Alyssa Rosenzweig | 2019-10-20 | 1 | -2/+6 |
* | panfrost: do not report alpha-test as supported | Erik Faye-Lund | 2019-10-17 | 1 | -11/+0 |
* | pan/midgard: Do not repeatedly spill same value | Alyssa Rosenzweig | 2019-10-16 | 1 | -2/+14 |
* | pan/midgard: Fix memory corruption in register spilling | Alyssa Rosenzweig | 2019-10-16 | 1 | -2/+2 |
* | pan/midgard: Use 16-bit liveness masks | Alyssa Rosenzweig | 2019-10-16 | 3 | -15/+14 |
* | pan/midgard: Fix mir_mask_of_read_components with dot products | Alyssa Rosenzweig | 2019-10-15 | 1 | -5/+5 |