| Commit message (Collapse) | Author | Age | Files | Lines |
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We can statically determine from the disassembly if helper invocations
will be needed, so we can validate the corresponding bit in the
cmdstream and thus avoid printing the bit itself in the decode.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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We check for texture ops which calculate derivatives (either explicitly
via dFd* or implicitly) and mark the shader as requiring helper
invocations.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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shader-db regression in the scheduler.
Fixes: dff4986b1aa ("pan/midgard: Emit store_output branch just-in-time")
total bundles in shared programs: 2055 -> 2019 (-1.75%)
bundles in affected programs: 1055 -> 1019 (-3.41%)
helped: 36
HURT: 0
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 0.35% max: 20.00% x̄: 6.71% x̃: 5.16%
95% mean confidence interval for bundles value: -1.00 -1.00
95% mean confidence interval for bundles %-change: -8.45% -4.97%
Bundles are helped.
total quadwords in shared programs: 3444 -> 3408 (-1.05%)
quadwords in affected programs: 1897 -> 1861 (-1.90%)
helped: 36
HURT: 0
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 0.19% max: 14.29% x̄: 3.97% x̃: 2.99%
95% mean confidence interval for quadwords value: -1.00 -1.00
95% mean confidence interval for quadwords %-change: -5.08% -2.86%
Quadwords are helped.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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Rather than passing through the transformed gl_Position, we can use the
hardware-level varying for this, which will correctly handle
gl_FragCoord.w
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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We need a special path for special varyings so we parse them correctly
instead of throwing an error when they inevitably point to bad memory.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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The hardware doesn't care, and a lot of Panfrost code relies on an
oversized buffer. The important part is that (stride *
padded_num_vertices) is no greater than size, which we'll need to check
once we validate instancing.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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They are independent fields, so the parser should reflect that.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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We don't need to dump the contents necessary, but having the stub with
the address is useful.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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I don't know who thought this mask was a good idea but unfortunately it
must have been me.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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If we permit more $whatever through than the shader needs, that's a bit
of a waste, but it isn't an error.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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We don't actually care about the *contents* of the index buffer, but we
would rather like to ensure it is present and of the correct size.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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We can infer these stats in many cases from the disassembly, so we
should try to sanity check where we can. We may need to be fuzzy about
analysis, since analysis gives us a bound but we don't mind if it's not
used fully by the shader.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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This allows the shader descriptor to access the disassembled stats.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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There is no reason this should happen to an in-spec program, as far as I
know.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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Lazypasting from UBOs.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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We could do better by forcing the checks to *equal* zero (right now, an
indeterminate answer will pass the checks), but this is a start to guard
against some egregious cases.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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There are a number of conditions we need to test for to statically check
for TILE_RANGE_FAULTs, but once these checks are in order, we can print
as-is.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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These tags need to match up with what's actually described by the MFBD,
so check this. Once this is checked, since the type and contents of the
FBD are obvious from printing above, there's no need to explicitly mark
off the framebuffer line.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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We don't need *more* cases to deal with.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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We can do single line prints:
ubuf_0[192] = memory_161f5000 + 896;
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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It doesn't give any real added value.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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It's usually easier to parse mentally.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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Signed-off-by: Alyssa Rosenzweig <[email protected]>
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For shaders using exclusively direct attribute/varyings, we can work
this out statically. For shaders with indirect access, we just set an
upper bound of 16 (the max attributes/varyings we support) and the
actual count will be reported regardless.
We proceed similarly for textures/samplers, as well as for UBOs. While
UBOs can be *indexed* indirectly, the *UBO itself* -- which is what we
count in the shader descriptor (rather than the UBO descriptors) -- is
statically determinable.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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This is exact.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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This one is a little tricky, but the idea is that:
r16-r23 are always uniforms
r8-r15 are sometimes work, sometimes uniforms...
...but as work, they are always written before use
...and as uniforms, they are never written before use
So we use that heuristic to determine the count to feed the machine.
We'll record work register use in the next commit.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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We'll want all this information to validate the shader descriptor.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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Panfrost is the only user of the macro; we are better off expanding than
having random stuff in nir.h.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
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A pair of special flags can turn the texture/sampler handle fields into
register selects. This means code like:
texture(uTextures[hr28.w], ...)
can be compiled to something like:
texture ..., fsampler[hr28.w], texture[hr28.w]
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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This data structure is shared in other parts of the texture word, so
let's streamline printing.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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Signed-off-by: Alyssa Rosenzweig <[email protected]>
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Signed-off-by: Alyssa Rosenzweig <[email protected]>
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Coverity.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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Coverity.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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This allows nodes to be unsigned and prevents a class of weird
signedness bugs identified by Coverity.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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This path shouldn't be possible for in-spec shaders, but let's be
defensive. (Because security, right? Mostly because Coverity.)
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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The checks confuse Coverity, so let's make it explicit what's going on.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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Signed-off-by: Alyssa Rosenzweig <[email protected]>
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It's small; this way we don't leak memory.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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Signed-off-by: Alyssa Rosenzweig <[email protected]>
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We can smush this into one-line per record as per usual. We still need
more validation and cleaning this up, especially around instancing. But
for LINEAR records, it works okay already.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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Signed-off-by: Alyssa Rosenzweig <[email protected]>
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No need to break it out into extra lines.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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This consolidates texture format and dimensionality into something simple:
tiled rgba8_unorm.rgb1: 512x512
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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This is another bit field describing layout.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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We can just stick an "s" in if it's sRGB.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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No need to be so verbose.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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Textures of a smaller dimension don't need higher dimensions printed.
This allows us to be more compact, while enforcing verification that
higher dimensions must be zero.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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It's massive and hugely nested indentation -- break it out so it's
legible.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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unknown3A I think I've actually seen on T6xx but.. we'll see what
happens in traces going forward. We don't want the zero noise normally,
and if they show up in the wild, we want to draw attention to them.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
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