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* pan/midgard: Pack load/store masksAlyssa Rosenzweig2019-11-111-2/+30
* pan/midgard: Implement nir_intrinsic_load_output_u8_as_fp16_panAlyssa Rosenzweig2019-11-111-0/+20
* pan/midgard: Identify ld_color_buffer_u8_as_fp16*Alyssa Rosenzweig2019-11-112-2/+7
* pan/midgard: Switch base for vertex texturing on T720Alyssa Rosenzweig2019-11-081-11/+16
* pan/midgard: Pass shader stage to disassemblerAlyssa Rosenzweig2019-11-084-4/+7
* pan/midgard: Disassemble half-steps correctlyAlyssa Rosenzweig2019-11-081-3/+15
* pan/midgard: Fix printing of half-registers in texture opsAlyssa Rosenzweig2019-11-081-35/+32
* panfrost: Pipe the GPU ID into compiler and disassemblerTomeu Vizoso2019-11-077-26/+27
* panfrost: Print the right zero fieldTomeu Vizoso2019-11-061-1/+1
* panfrost: Decode blend shaders for SFBDTomeu Vizoso2019-11-061-22/+29
* panfrost: Rework format encoding on SFBDTomeu Vizoso2019-11-062-47/+109
* panfrost: Add checksum fields to SFBD descriptorTomeu Vizoso2019-11-062-1/+10
* pan/midgard: Extend default_phys_reg to !32-bitAlyssa Rosenzweig2019-11-041-5/+5
* pan/midgard: Extend swizzle packing for vec4/16-bitAlyssa Rosenzweig2019-11-041-3/+24
* pan/midgard: Extend offset_swizzle to non-32-bitAlyssa Rosenzweig2019-11-041-3/+4
* pan/midgard: offset_swizzle doesn't need dstsizeAlyssa Rosenzweig2019-11-041-9/+9
* pan/midgard: Add bizarre corner caseAlyssa Rosenzweig2019-11-041-1/+8
* pan/midgard: Compute bundle interferenceAlyssa Rosenzweig2019-11-041-0/+57
* pan/midgard: Fix quadword_count handlingAlyssa Rosenzweig2019-11-043-4/+8
* pan/midgard: Validate tags when branchingAlyssa Rosenzweig2019-11-041-6/+32
* panfrost: MALI_DEPTH_TEST is actually MALI_DEPTH_WRITEMASKBoris Brezillon2019-11-042-3/+3
* pan/midgard: Eliminate blank_alu_srcAlyssa Rosenzweig2019-11-016-36/+22
* pan/midgard: Refactor swizzlesAlyssa Rosenzweig2019-11-0113-385/+258
* pan/midgard: Add a dummy source for loadsAlyssa Rosenzweig2019-11-013-29/+11
* pan/midgard: Remove OP_IS_STORE_VARYAlyssa Rosenzweig2019-11-011-7/+0
* android: Add panfrost support to build scriptsRobert Foss2019-10-317-1/+258
* panfrost: Remove unused definitions in mali-job.hAlyssa Rosenzweig2019-10-291-9/+1
* panfrost: Cleanup _shader_upper -> shaderAlyssa Rosenzweig2019-10-292-13/+10
* pan/midgard: Express allocated registers as offsetsAlyssa Rosenzweig2019-10-251-104/+62
* pan/midgard: Expose more typesize manipulation routinesAlyssa Rosenzweig2019-10-252-2/+4
* pan/midgard: Add mir_set_bytemask helperAlyssa Rosenzweig2019-10-252-0/+7
* nir/lower_idiv: add new llvm-based pathRhys Perry2019-10-211-1/+1
* pan/midgard: Implement SIMD-aware dead code eliminationAlyssa Rosenzweig2019-10-201-8/+57
* pan/midgard: Create dependency graph bytewiseAlyssa Rosenzweig2019-10-201-12/+12
* pan/midgard: Handle nontrivial masks in texture RAAlyssa Rosenzweig2019-10-201-1/+1
* pan/midgard: Implement per-byte liveness trackingAlyssa Rosenzweig2019-10-201-3/+2
* pan/midgard: Simplify mir_bytemask_of_read_componentsAlyssa Rosenzweig2019-10-201-18/+4
* pan/midgard: Report byte masks for read componentsAlyssa Rosenzweig2019-10-206-31/+31
* pan/midgard: Add helpers for manipulating byte masksAlyssa Rosenzweig2019-10-202-0/+177
* pan/midgard: Implement OP_IS_STORE with tableAlyssa Rosenzweig2019-10-202-13/+2
* pan/midgard: Tableize load/store opsAlyssa Rosenzweig2019-10-205-70/+102
* pan/midgard: Factor out mir_get_alu_srcAlyssa Rosenzweig2019-10-201-6/+8
* pan/midgard/disasm: Fix printing 8-bit/16-bit masksAlyssa Rosenzweig2019-10-201-49/+30
* pan/midgard: Identify 64-bit atomic opcodesAlyssa Rosenzweig2019-10-202-0/+20
* pan/midgard: Debug mir_insert_instruction_after_scheduledAlyssa Rosenzweig2019-10-201-2/+6
* panfrost: do not report alpha-test as supportedErik Faye-Lund2019-10-171-11/+0
* pan/midgard: Do not repeatedly spill same valueAlyssa Rosenzweig2019-10-161-2/+14
* pan/midgard: Fix memory corruption in register spillingAlyssa Rosenzweig2019-10-161-2/+2
* pan/midgard: Use 16-bit liveness masksAlyssa Rosenzweig2019-10-163-15/+14
* pan/midgard: Fix mir_mask_of_read_components with dot productsAlyssa Rosenzweig2019-10-151-5/+5
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