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* pan/midgard: Implement barriersAlyssa Rosenzweig2020-02-166-2/+37
| | | | | | | | | | | | | Barriers execute on the texture pipeline on Midgard, so let's tentatively handle barrier() as conservatively as possible (forcing memory barriers of both buffers and shared memory). Implementation isn't quite there yet -- it doesn't look at interactions of adjacent barriers like it's supposed to -- but the core is there. Fixes dEQP-GLES31.functional.compute.basic.ssbo_local_barrier_single_invocation Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
* pan/midgard: Fix swizzles harderAlyssa Rosenzweig2020-02-161-54/+46
| | | | | | | Just for disassembly for now~ Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
* pan/midgard: Fix missing prefixesAlyssa Rosenzweig2020-02-161-1/+1
| | | | | | | | I was wondering where those were going... :) Signed-off-by: Alyssa Rosenzweig <[email protected]> Fixes: c1952779d68 ("pan/decode: Dump to a file") Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
* pan/midgard: Track pressure when scheduling ld/stAlyssa Rosenzweig2020-02-161-0/+35
| | | | | | | | | Fixes RA failure in dEQP-GLES31.functional.shaders.builtin_functions.common.modf.* (which uses multiple indirect SSBO writes) Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3835>
* panfrost: Remove unused anonymous enum variables.Vinson Lee2020-02-111-2/+2
| | | | | | | | | | | | | | This patch fix these build errors with GCC 10. /usr/bin/ld: src/gallium/drivers/panfrost/libpanfrost.a(pan_resource.c.o):src/panfrost/midgard/midgard_compile.h:52: multiple definition of `pan_sysval'; src/gallium/drivers/panfrost/libpanfrost.a(pan_screen.c.o):src/panfrost/midgard/midgard_compile.h:52: first defined here /usr/bin/ld: src/gallium/drivers/panfrost/libpanfrost.a(pan_resource.c.o):src/panfrost/midgard/midgard_compile.h:68: multiple definition of `pan_special_attributes'; src/gallium/drivers/panfrost/libpanfrost.a(pan_screen.c.o):src/panfrost/midgard/midgard_compile.h:68: first defined here Fixes: 7e8de5a707f7 ("panfrost: Implement system values") Fixes: 306800d747bc ("pan/midgard: Lower gl_VertexID/gl_InstanceID to attributes") Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3752> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3752>
* pan/midgard: Fix scheduling issue with csel + render target referenceAlyssa Rosenzweig2020-02-051-12/+18
| | | | | | | | | Fixes dEQP-GLES3.functional.shaders.fragdepth.write.dynamic_conditional_write Signed-off-by: Alyssa Rosenzweig <[email protected]> Signed-off-by: Boris Brezillon <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3697> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3697>
* pan/midgard: Add nir_intrinsic_store_zs_output_pan supportBoris Brezillon2020-02-055-26/+73
| | | | | | | | | | | | | ZS fragment stores are done like color fragment stores, except it's using a different RT id (0xFF), the depth and stencil values are stored in r1.x and r1.y. Signed-off-by: Boris Brezillon <[email protected]> [Fix the scheduling part] Signed-off-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3697>
* pan/midgard: Turn Z/S stores into zs_output_pan intrinsicsBoris Brezillon2020-02-051-0/+98
| | | | | | | | | | | | | | Midgard can't write depth and stencil separately. It has to happen in a single store operation containing both. Let's add a panfrost specific intrinsic and turn all depth/stencil stores into a packed depth+stencil one. Note that this intrinsic is not yet handled in emit_intrinsic(), but we'll address that later. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3697>
* pan/midgard: Remove unused variableAlyssa Rosenzweig2020-02-041-2/+0
| | | | | | | | | | | ../src/panfrost/midgard/mir.c: In function ‘mir_bytemask_of_read_components_index’: ../src/panfrost/midgard/mir.c:471:18: warning: unused variable ‘mask’ [-Wunused-variable] 471 | uint16_t mask = 0; Signed-off-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Tomeu Vizoso <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3684> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3684>
* pan/midgard: Check for null constsAlyssa Rosenzweig2020-02-041-0/+2
| | | | | | | | | | | | | | Valid shaders shouldn't hit this, but Coverity doesn't know that. CID 1458029: (FORWARD_NULL) Passing null pointer "consts" to "print_scalar_field", which dereferences it. Tomeu: Fix name of variable Signed-off-by: Alyssa Rosenzweig <[email protected]> Signed-off-by: Tomeu Vizoso <[email protected]> Reviewed-by: Tomeu Vizoso <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3684>
* pan/midgard: Stop leaking instruction objects in mir_schedule_alu()Boris Brezillon2020-02-031-18/+16
| | | | | | | | Allocate those instructions with ralloc() instead of using mem_dup. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3676>
* pan/midgard: Don't check 'branch && branch->writeout' twice in ↵Boris Brezillon2020-02-031-1/+1
| | | | | | | | | | | mir_schedule_alu() There's a writeout bool storing the result of this test. Use it instead of duplicating the test. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3676>
* pan/midgard: Lower bitfield extract to shiftsBoris Brezillon2020-02-031-0/+1
| | | | | | | | | Let's lower bitfield extract to shifts until we figure out if it can be natively supported. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3676>
* pan/midgard: Make sure we pass the right RT id to emit_fragment_store()Boris Brezillon2020-02-031-1/+26
| | | | | | | | | | | | | | | | | nir_intrinsic_base() is assigned nir_variable.data.driver_location, which is assigned a unique ID based on the variable position in the shader variable list. There's no guarantee that this position will match the RT id we want to pass to emit_fragment_store(). Add a search_var() helper to retrieve a nir_variable based on its driver location, so we can pass the right RT value to emit_fragment_store(). We also make sure the shader output is color, since emit_fragment_store() is not ready for depth/stencil stores yet. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3676>
* pan/midgard: Add an enum to describe the render targetsBoris Brezillon2020-02-031-1/+9
| | | | | | | | | We are about to add a special ZS render target, let's add a enum so we can easily know which render target we're dealing with. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3676>
* pan/midgard: Implement mixed-type constant packingAlyssa Rosenzweig2020-02-021-52/+47
| | | | | | | | | | Lot of churn but mostly just specializes types per source instead of per instruction. Signed-off-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3653> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3653>
* pan/midgard: Break out one-src read_componentsAlyssa Rosenzweig2020-02-022-23/+31
| | | | | | | | For constant packing, this is interesting to break down further. Signed-off-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3653>
* pan/midgard: Handle nir_intrinsic_load_barycentric_centroidTomeu Vizoso2020-01-311-1/+2
| | | | | | | | | | | To avoid hitting the assert in the default case, add a nop for this intrinsic. dEQP-GLES3.functional.transform_feedback.random.interleaved.lines.3 Signed-off-by: Tomeu Vizoso <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3625>
* panfrost: Add more info to some assertionsTomeu Vizoso2020-01-311-5/+9
| | | | | | Signed-off-by: Tomeu Vizoso <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3625>
* pan/midgard: Fix a liveness info leakIcecream952020-01-291-6/+7
| | | | | | Reviewed-by: Alyssa Rosenzweig <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3566> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3566>
* pan/midgard: Remove float_bitcastAlyssa Rosenzweig2020-01-271-12/+0
| | | | | | | | Now unused. Signed-off-by: Alyssa Rosenzweig <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3588> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3588>
* panfrost/midgard: Prettify embedded constant printsBoris Brezillon2020-01-273-68/+292
| | | | | | | | | | | | | | | | Until now, embedded constants were printed as all 32 bits integer or floats, but the compiler can pack constant from different types if severa instructions with different reg_mode and native type refer to the constant register. Let's implement something smarter so users don't have to do a manual conversion when looking at a trace. Note that 8-bit constants are not decoded yet, as we're not sure how the writemask is encoded in that case. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3536> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3536>
* panfrost/midgard: Add a condense_writemask() helperBoris Brezillon2020-01-271-0/+22
| | | | | | | | | | | | This way we can convert an 8-bit writemask (Midgard specific representation) into the more common 1-bit/component representation. 8-bit mode is not supported yet, as we're not sure how the writemask is encoded for this mode. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3536>
* pan/midgard: Handle tag 0x4 as textureAlyssa Rosenzweig2020-01-271-2/+2
| | | | | | | | Used for barriers which work as texture ops. Signed-off-by: Alyssa Rosenzweig <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3580> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3580>
* pan/midgard: Validate barriers use a barrier tagAlyssa Rosenzweig2020-01-271-1/+5
| | | | | | | | ...and that non-barriers don't use a barrier tag. It's not clear what the difference means quite yet, though. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3580>
* pan/midgard: Disassemble barrier instructionsAlyssa Rosenzweig2020-01-272-3/+60
| | | | | | | | We don't need to print all the usual texture noise; just the relevant fields and the rest can be guarded to zero. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3580>
* pan/midgard: Record TEXTURE_OP_BARRIERAlyssa Rosenzweig2020-01-272-0/+4
| | | | | | | It's 0x0B for whatever reason. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3580>
* pan/midgard: Remove pack_color defineAlyssa Rosenzweig2020-01-241-1/+0
| | | | | | | | | | | | | | | | | Unused at the moment. ../src/panfrost/midgard/midgard_compile.c:124:29: warning: ‘m_pack_colour’ defined but not used [-Wunused-function] 124 | static midgard_instruction m_##name(unsigned ssa, unsigned address) { \ | ^~ ../src/panfrost/midgard/midgard_compile.c:145:22: note: in expansion of macro ‘M_LOAD_STORE’ 145 | #define M_LOAD(name) M_LOAD_STORE(name, false) | ^~~~~~~~~~~~ ../src/panfrost/midgard/midgard_compile.c:213:1: note: in expansion of macro ‘M_LOAD’ 213 | M_LOAD(pack_colour); | ^~~~~~ Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3543>
* pan/midgard: Support disassembling to a fileIcecream952020-01-233-278/+278
| | | | | Reviewed-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3525>
* pan/midgard: Fix a memory leak in the disassemblerIcecream952020-01-231-0/+2
| | | | | Reviewed-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3525>
* pan/midgard: Fix bundle dynarray leakIcecream952020-01-231-1/+2
| | | | | | Reviewed-by: Alyssa Rosenzweig <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3496> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3496>
* util: Remove tmp argument from BITSET_FOREACH_SET macroMatt Turner2020-01-231-5/+3
| | | | | | Reviewed-by: Jason Ekstrand <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3499> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3499>
* panfrost/midgard: Add missing lowering passes for type/size conversion opsBoris Brezillon2020-01-221-13/+34
| | | | | | | | | | Replace the manual type/size conversion lowering description by one that's automatically generated and covers all type/size conversions. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3478> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3478>
* panfrost/midgard: Add 64 bits float <-> int convertersBoris Brezillon2020-01-221-0/+5
| | | | | | | | The 64 bit converter cases were missing, add them now. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3478>
* panfrost/midgard: Fix mir_print_instruction() for branch instructionsBoris Brezillon2020-01-221-7/+31
| | | | | | | | Branch instructions should not be treated as regular ALUs. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3478>
* panfrost/midgard: Add f2f64 supportBoris Brezillon2020-01-221-2/+4
| | | | | | | | So we can convert floats into doubles. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3478>
* panfrost/midgard: Factorize f2f and u2u handlingBoris Brezillon2020-01-221-20/+7
| | | | | | | | | | Those size conversion operations work the same way apart from f2f using an fmov op code and u2u using an imov. Let's handle them in the same case block to avoid code duplication. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3478>
* panfrost/midgard: Make sure promote_fmov() only promotes 32-bit imovsBoris Brezillon2020-01-221-0/+1
| | | | | | | | | mir_constant_float() assumes we're dealing with 32-bit integers/floats, which is only the case if reg_mode is equal to midgard_reg_mode_32. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3478>
* panfrost/midgard: Rework mir_adjust_constants() to make it type/size agnosticBoris Brezillon2020-01-221-94/+69
| | | | | | | | | | Right now, constant combining is not supported in 16 bit mode, and 64 bit mode is simply ignored. Let's rework the function to make it type/bit-size agnostic. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3478>
* panfrost/midgard: Use a union to manipulate embedded constantsBoris Brezillon2020-01-228-49/+85
| | | | | | | | | | | | Each instruction bundle can contain up to 16 constant bytes. The meaning of those byte is instruction dependent: it depends on the instruction native type (int, uint or float) and the instruction reg_mode (8, 16, 32 or 64 bit). Those different layouts can be exposed as a union to facilitate constants manipulation. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3478>
* panfrost/midgard: Print the actual source register for store operationsBoris Brezillon2020-01-211-1/+1
| | | | | | | | | | | Store operation use r26/r27 but have a word->reg set to 0 or 1 (base is r26). Let's take this base offset into account in print_load_store_instr(). Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3482> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3482>
* pan/midgard: Fix recursive csel schedulingAlyssa Rosenzweig2020-01-181-0/+4
| | | | | | | | | | | | | | | | Corner case causing invalid scheduling on shaders with nested csels, i.e. GLSL code resembling: (foo ? bool1 : bool2) ? x : y By explicitly disallowing csels this is fixed. Fixes INSTR_INVALID_ENC on a glamor shader (noticeable with slowdown and visual corruption when scrolling "too far" on GTK apps). Signed-off-by: Alyssa Rosenzweig <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3463> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3463>
* panfrost: Identify un/pack colour opcodesAlyssa Rosenzweig2020-01-183-0/+9
| | | | | | | | | We still need to identify formats in the disassembler, but this will at least get the opcode name clear. Signed-off-by: Alyssa Rosenzweig <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3462> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3462>
* pan/midgard: Bytemasks should round up, not round downAlyssa Rosenzweig2020-01-183-9/+8
| | | | | | | Otherwise we'll lost components in DCE. Signed-off-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3462>
* panfrost/midgard: Fix swizzle for store instructionsBoris Brezillon2020-01-171-3/+15
| | | | | | | | | | | | | | | | The current logic considers that the nir_intrinsic_component(store_intr) encodes the source components start, but it actually encodes the destination one. Source component offset adjustment is taken care of in install_registers_instr(), when offset_swizzle() is called. This fixes dEQP-GLES2.functional.shaders.random.all_features.fragment.45 when PAN_MESA_DEBUG=deqp (looks like exposing GLES3 features has an impact on the varyings layout). Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3429> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3429>
* panfrost: Prefix schedule_program to prevent collisionRobert Foss2020-01-153-3/+3
| | | | | | | | | | | | Currently the schedule_program implementation being used is picked at compile time, which on the Android platform means that the bifrost compiler & scheduler is used for all targets, including midgard based hardware. This commit disambiguates between the two schedule_program functions. Signed-off-by: Robert Foss <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]>
* pan/midgard: Fix midgard_compile.h includesAfonso Bordado2020-01-141-0/+1
| | | | | | | We now use enum mali_format which is defined in panfrost-job.h Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3243> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3243>
* panfrost: Remove unneeded phi nodesBoris Brezillon2020-01-131-0/+1
| | | | | | | | | Add a pass to remove unneeded phi nodes as done in other drivers. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3294> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3294>
* pan/midgard: Support indirect UBO offsetsAlyssa Rosenzweig2020-01-102-22/+7
| | | | | | | | | ...in case we have arrays in a UBO block that we'd like to access indirectly. Signed-off-by: Alyssa Rosenzweig <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3352> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3352>
* panfrost: Don't double-flip Z/W for 2D arraysAlyssa Rosenzweig2020-01-071-2/+5
| | | | | | | | | We need to mindful that we don't clobber the shadow comparator. Fixes dEQP-GLES3.functional.shaders.texture_functions.texture.sampler2darrayshadow_* Signed-off-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Tomeu Vizoso <[email protected]>