Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | pan/bi: Generate TEX_COMPACT instruction | Alyssa Rosenzweig | 2020-04-22 | 1 | -1/+21 |
* | pan/bi: Stub out tex_compact logic | Alyssa Rosenzweig | 2020-04-22 | 1 | -3/+36 |
* | remove final imports.h and imports.c bits | Dylan Baker | 2020-04-21 | 1 | -2/+1 |
* | pan/bi: Round constants to 32-bit | Alyssa Rosenzweig | 2020-04-17 | 1 | -1/+1 |
* | pan/bi: Try to reuse constants in ALU | Alyssa Rosenzweig | 2020-04-17 | 1 | -2/+11 |
* | pan/bi: Handle st_vary with <4 components | Alyssa Rosenzweig | 2020-04-17 | 1 | -2/+8 |
* | pan/bi: Implement flog2 | Alyssa Rosenzweig | 2020-04-17 | 1 | -0/+3 |
* | pan/bi: Add fexp2 implementation | Alyssa Rosenzweig | 2020-04-17 | 1 | -1/+10 |
* | pan/bi: Ensure CONSTANT srcs have types | Alyssa Rosenzweig | 2020-04-17 | 1 | -0/+2 |
* | panfrost: Fix BI_BLEND packing | Alyssa Rosenzweig | 2020-04-10 | 1 | -4/+4 |
* | pan/bi: Remove nontrivial SPECIAL ops | Alyssa Rosenzweig | 2020-04-06 | 1 | -8/+0 |
* | pan/bi: Match CSEL argument order with hw | Alyssa Rosenzweig | 2020-04-05 | 1 | -5/+11 |
* | pan/bi: Fix handling of constants with COMBINE | Alyssa Rosenzweig | 2020-03-31 | 1 | -0/+6 |
* | pan/bi: Handle round opcodes in frontend | Alyssa Rosenzweig | 2020-03-31 | 1 | -0/+22 |
* | pan/bi: Fix missing type for fmul | Alyssa Rosenzweig | 2020-03-31 | 1 | -0/+1 |
* | pan/bi: Handle f2f* opcodes | Alyssa Rosenzweig | 2020-03-31 | 1 | -0/+4 |
* | Move compiler.h and imports.h/c from src/mesa/main into src/util | Marek Olšák | 2020-03-27 | 1 | -1/+1 |
* | pan/bi: Ingest vecN directly (again) | Alyssa Rosenzweig | 2020-03-24 | 1 | -48/+15 |
* | pan/bi: Default csel to "!= 0" mode | Alyssa Rosenzweig | 2020-03-22 | 1 | -0/+5 |
* | pan/bi: Implement csel fusing | Alyssa Rosenzweig | 2020-03-22 | 1 | -21/+65 |
* | pan/bi: Add `soft` NIR->BIR condition translation | Alyssa Rosenzweig | 2020-03-22 | 1 | -3/+11 |
* | pan/bi: Remove hacks for 1-bit booleans in IR | Alyssa Rosenzweig | 2020-03-22 | 1 | -1/+1 |
* | pan/bi: Lower bool to ints | Alyssa Rosenzweig | 2020-03-22 | 1 | -25/+36 |
* | pan/bi: Pack LD_ATTR | Alyssa Rosenzweig | 2020-03-22 | 1 | -8/+15 |
* | pan/bi: Add store_channels property | Alyssa Rosenzweig | 2020-03-22 | 1 | -1/+2 |
* | pan/bi: Flesh out st_vary IR | Alyssa Rosenzweig | 2020-03-22 | 1 | -8/+8 |
* | pan/bi: Pack ld_var_addr | Alyssa Rosenzweig | 2020-03-22 | 1 | -0/+6 |
* | pan/bi: Include UBO index for sysval reads | Alyssa Rosenzweig | 2020-03-22 | 1 | -1/+1 |
* | pan/bi: Add move lowering pass | Alyssa Rosenzweig | 2020-03-22 | 1 | -0/+43 |
* | pan/bi: Implement FMA/MOV without modifiers | Alyssa Rosenzweig | 2020-03-22 | 1 | -4/+5 |
* | pan/bi: Flesh out BI_BLEND | Alyssa Rosenzweig | 2020-03-19 | 1 | -1/+7 |
* | pan/bi: Flesh out ATEST in IR | Alyssa Rosenzweig | 2020-03-19 | 1 | -1/+16 |
* | pan/bi: Pass second src for load_vary ops | Alyssa Rosenzweig | 2020-03-19 | 1 | -1/+10 |
* | pan/bi: Setup initial clause packing | Alyssa Rosenzweig | 2020-03-19 | 1 | -0/+2 |
* | pan/bi: Interpret register allocation results | Alyssa Rosenzweig | 2020-03-12 | 1 | -0/+1 |
* | pan/bi: Add register allocator | Alyssa Rosenzweig | 2020-03-12 | 1 | -0/+1 |
* | pan/bi: Fix missing src_types | Alyssa Rosenzweig | 2020-03-12 | 1 | -0/+7 |
* | pan/bi: Fix swizzle for second argument to ST_VARY | Alyssa Rosenzweig | 2020-03-11 | 1 | -0/+1 |
* | pan/bi: Implement nir_op_ffma | Alyssa Rosenzweig | 2020-03-11 | 1 | -0/+1 |
* | pan/bi: Add dead code elimination pass | Alyssa Rosenzweig | 2020-03-11 | 1 | -0/+11 |
* | panfrost: Sync Midgard/Bifrost control flow | Alyssa Rosenzweig | 2020-03-11 | 1 | -37/+14 |
* | pan/bi: Implement sysvals | Alyssa Rosenzweig | 2020-03-11 | 1 | -0/+55 |
* | pan/bi: Switch to panfrost_program | Alyssa Rosenzweig | 2020-03-11 | 1 | -1/+1 |
* | pan/bi: Implement comparison opcodes via BI_CMP | Alyssa Rosenzweig | 2020-03-10 | 1 | -0/+41 |
* | pan/bi: Implement nir_op_bcsel | Alyssa Rosenzweig | 2020-03-10 | 1 | -0/+3 |
* | pan/bi: Import algebraic pass from midgard | Alyssa Rosenzweig | 2020-03-10 | 1 | -0/+2 |
* | pan/bi: Add isub op | Alyssa Rosenzweig | 2020-03-10 | 1 | -0/+2 |
* | pan/bi: Disable lower_sub | Alyssa Rosenzweig | 2020-03-10 | 1 | -0/+4 |
* | pan/bi: Implement fabs, fneg as fmov with mods | Alyssa Rosenzweig | 2020-03-10 | 1 | -0/+8 |
* | pan/bi: Handle special ops in NIR->BIR | Alyssa Rosenzweig | 2020-03-10 | 1 | -0/+21 |