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* Remove O(n^2) debugging code from non-debug path of dri_bufmgr_fake.Eric Anholt2008-02-131-4/+7
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* _mesa_swizzle_ubyt_image: Don't use single swizzle_copy callXiang, Haihao2008-02-131-0/+1
| | | | if components don't match. fix #13508
* [intel] Remove cached reloc data buffer now that it's not a BO.Eric Anholt2008-02-121-26/+4
| | | | | | It's not worth the extra effort to avoid a free/malloc, and we'd rather auto-size the reloc data buffer at some point so we don't need to have max_relocs.
* [intel] Fix type of some more flags variables for uint64_t flags.Eric Anholt2008-02-121-2/+3
| | | | Harmless since we don't yet have any bits above 31 for flags.
* [intel] Note when BO map/unmap fail with TTM.Eric Anholt2008-02-121-6/+26
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* [intel] Fix INTEL_DEBUG=bufmgr after relocation interface fixups.Eric Anholt2008-02-121-2/+1
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* [965] Remove stale brw_state_cache.c comment and function export.Eric Anholt2008-02-122-33/+12
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* glapi: Correct prerequisites for gl_and_glX_API.xmlDan Nicholson2008-02-121-2/+2
| | | | | | | The indirect_dispatch.h and indirect_table.c source files use gl_and_glX_API.xml in their generation rather than glX_API.xml, but it wasn't listed in their prerequisites. In turn, gl_and_glX_API.xml uses glX_API.xml, but this is already listed in $(COMMON_GLX).
* glapi: Use make automatic variables to clean up the commandsDan Nicholson2008-02-121-46/+50
| | | | | | | Make use of the make automatic variables $@ (the target) and $< (first prerequisite) to clean up the commands for the glapi generation. This improves readability and guards against typos since words are repeated less frequently.
* glapi: Use variable for indent and flagsDan Nicholson2008-02-121-9/+7
| | | | | | Put the path to indent and the flags to call it with in configs/default rather than in the Makefile. This makes it easier to change the values globally.
* nouveau: ddx versioning changedBen Skeggs2008-02-121-1/+6
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* [directfb] Added RGB444 and RGB555.Claudio Ciccani2008-02-081-13/+75
| | | | Also added color expansion for RGB16, ARGB1555 and ARGB4444.
* [965] Flush icache on new batch, not just new context.Eric Anholt2008-02-071-1/+1
| | | | | This is required since our buffer manager may now move our instruction-containing buffers at any batchbuffer emit.
* [915] Fix COS function using same plan as SIN.Eric Anholt2008-02-061-35/+63
| | | | The previous COS function failed badly outside of [-pi/2, pi/2].
* [915] Use a quartic term to improve the accuracy of SIN results.Eric Anholt2008-02-061-23/+54
| | | | | This is described in the link in the comment, and is the same technique that r300 uses.
* [915] Fix fp SIN function, and use a quadratic approximation instead of Taylor.Eric Anholt2008-02-061-42/+57
| | | | | | | | | | | The Taylor series notably fails at producing sin(pi) == 0, which leads to discontinuity every 2*pi. The quadratic gets us sin(pi) == 0 behavior, at the expense of going from 2.4% THD with working Taylor series to 3.8% THD (easily seen on comparative graphs of the two). However, our previous implementation was producing sin(pi) < -1 and worse, so any reasonable approximation is an improvement. This also fixes the repeating behavior, where the previous implementation would repeat sin(x) for x>pi as sin(x % pi) and the opposite for x < -pi.
* [965] Bug 14314: assertion failure with with !AIGLX and depth=24 visual.Eric Anholt2008-02-051-1/+4
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* [965] Fix TTM relocation caching overzealousness.Eric Anholt2008-02-051-0/+47
| | | | | | | | | | | | | | The failure mode that was a available was: reloc 1 -> target_buf exec: PRESUMED_OFFSET wrong, buffer migrates, r1 entry updated. reloc 2 -> target_buf exec: suppose buffer migrates again. PRESUMED_OFFSET wrong. r2 entry updated. reloc 1 -> target_buf exec: suppose buffer doesn't migrate. PRESUMED_OFFSET right. no relocations performed. r1 has stale pointer at original location. Failures were reported with OGLconform's VBO test and SPECviewperf90, though I haven't confirmed that this fixes it.
* i965: adjust the byte order of clear color. fix #14165Xiang, Haihao2008-02-051-1/+2
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* Replace usage of DRM_BO_FLAG_MEM_TT in intel_regions.c with local/cached.Eric Anholt2008-02-041-2/+8
| | | | | | In addition to potentially binding when it was about to be mapped anyway, failure to use CACHED_MAPPED means eating a full wbinvd on validate. Thanks to airlied for catching this.
* Allow first != 0 in mesa CVA handling, and add more error checking.Eric Anholt2008-02-043-9/+27
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* [965] Convert brw_draw_upload to managing dri_bos, not gl_buffer_objects.Eric Anholt2008-02-044-209/+126
| | | | | This helps us avoid a bunch of mess with gl_client_arrays that we filled with unused data and confused readers.
* [965] Remove dead structure in brw_draw_upload.c.Eric Anholt2008-02-041-24/+0
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* [965] Move temporary vbo array storage into the function using it.Eric Anholt2008-02-042-38/+25
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* [965] Remove dead brw_vertex_element members.Eric Anholt2008-02-042-5/+0
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* [965] Add a wrapper around interleaved copy_array_to_vbo_array for profiling.Eric Anholt2008-02-041-7/+18
| | | | | If compiled with optimization, it shouldn't appear at all, and helps me for now.
* [965] Avoid overloaded use of the term 'input' for clarity.Eric Anholt2008-02-041-13/+9
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* [965] Replace VEP/VBP state structures with inline batch emits.Eric Anholt2008-02-042-67/+66
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* r300: fix isosurf on rs690Dave Airlie2008-02-041-2/+9
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* i965: fix potential NULL pointer dereference. The third regionXiang, Haihao2008-02-031-0/+3
| | | | isn't created at all for 965
* [965] Fix indentation.Eric Anholt2008-02-011-6/+6
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* Revert "intel: don't apply the relocation optimization if a target"Eric Anholt2008-02-011-14/+4
| | | | | | | | | This reverts commit e2cb905bc6e23eaafaeeb2abdc9480e70959ee3f. It was a reversion of an optimization hidden as otherwise. pre_target_buf_handle was always NULL, so the optimization was never enabled, rather than fixing the important optimization (resulting in 25-50% performance loss).
* [965] Replace XXX comment about constant swizzle with an assert.Eric Anholt2008-02-012-2/+2
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* [965] Fix some indentation in brw_vs_tnl.c.Eric Anholt2008-02-011-6/+6
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* mesa: re-define NEED_SECONDARY_COLOR. fix #14310.Xiang, Haihao2008-02-021-0/+2
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* [intel] fix for previous fixZou Nan hai2008-02-011-4/+4
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* [intel] use _mesa_copy_rect for upload compressed texture,Zou Nan hai2008-02-013-2/+22
| | | | this fix bad texture issue in some games(UT and quake).
* i965: Don't emit state if fall back to software rendering. fix #14116Xiang, Haihao2008-02-011-2/+11
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* [i965] renable regative rhw testZou Nan hai2008-01-313-16/+12
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* intel: don't apply the relocation optimization if a targetXiang, Haihao2008-01-311-4/+14
| | | | | | buffer is used for a relocatee in the former relocation process then another target buffer is used for this relocatee at the same offset in the current relocation process.
* regenerate glsl library functionsRoland Scheidegger2008-01-311-41/+42
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* fix w component of glsl vec4 asinRoland Scheidegger2008-01-311-0/+1
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* check if fb->Delete is null (bugs 13507,14293)Brian2008-01-301-1/+6
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* Add new RV380 pci idAlex Deucher2008-01-292-0/+2
| | | | bug 14289
* i965: new integrated graphics chipset supportXiang, Haihao2008-01-2924-75/+259
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* r300: add initial rs690 support to MesaDave Airlie2008-01-272-1/+22
| | | | | | The rs690 has an rs4xx style vertex-shader less 3D engine. It uses the new r500 output engine though. It also needs a new drm with rs690 support, which is just getting cleaned up.
* i965: valid message length includes message header.Xiang, Haihao2008-01-251-1/+1
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* i965: re-define the type of reg.loopcount.Xiang, Haihao2008-01-251-1/+1
| | | | | avoid some issues such that 1 + (-2) gets a big positive value.
* Bufmgr cleanup from intel-batchbuffer branch of 2d driver.Eric Anholt2008-01-243-15/+14
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* Clean up comments/dead code from relocation buffer change.Eric Anholt2008-01-241-5/+0
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