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* intel: Fix intel_draw_buffer() to accomodate hiz and separate stencilChad Versace2011-05-251-5/+11
| | | | | | | | The logic of intel_draw_buffers() expected that stencil buffers were always combined depth/stencil. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Add hiz_region to intel_mipmap_treeChad Versace2011-05-253-0/+36
| | | | | | | | | | When a texture is attached to multiple FBO's, a separate renderbuffer wrapper is created for each attachment. This necessitates storing the hiz region for these renderbuffers in the texture itself instead of the renderbuffer wrapper. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Refactor the wrapping of textures with renderbuffersChad Versace2011-05-251-7/+8
| | | | | | | | | | | | | Before this commit, the renderbuffer's region was updated in intel_renderbuffer_texture(). This commit moves the update into intel_update_wrapper(), which is a more logical location for updates. This is in preparation for the next commit, which allocates and updates the texture's hiz region in intel_update_wrapper(). Having the two region updates located in the same function makes good form. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Add hiz_region to intel_renderbufferChad Versace2011-05-252-0/+46
| | | | | | | | | | | | | | | | | | | | | | A hiz surface must be supplied to the hardware when rendering to a depth buffer with hiz. There are three potential places to store that surface: 1. Allocate a larger intel_region for the depthbuffer, and let the region's tail be the hiz surface. 2. Allocate a separate intel_region for hiz, and store it as brw_context state. 3. Allocate a separate intel_region for hiz, and store it in intel_renderbuffer. We choose method 3. Method 1 has not been chosen due to future complications it might cause when requesting a DRI drawable's depth buffer attachment from X. Method 2 has not been chosen because storing the hiz region apart from the depth region makes lazy hiz/depth resolves difficult to implement. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Add is_hiz_depth_format() to intel_contex.vtblChad Versace2011-05-253-0/+24
| | | | | | | | | Given a format, is_hiz_depth_format() indicates if HiZ can be enabled on a depthbuffer of that format. Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Allocate region for separate stencil bufferChad Versace2011-05-251-3/+30
| | | | | | | | | ... in intel_alloc_renderbuffer_storage(). The stencil buffer has quirky pitch requirements, so its region allocation is a special case. Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Change supported texture formats for separate stencilChad Versace2011-05-252-1/+7
| | | | | | | | | | | When hardware supports separate stencil, enable support for separate depth/stencil texture formats in the table intel_context.ctx.TextureFormatsSupported. If the hardware must use separate stencil, then disable support for combined depth/stencil formats. Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* mesa: Add MESA_FORMAT_X8_Z24 to _mesa_choose_tex_formatChad Versace2011-05-251-0/+2
| | | | | | | | | | | Prefer MESA_FORMAT_X8_Z24 over MESA_FORMAT_S8_Z24 for textures with internal format GL_DEPTH_COMPONENT*. i965 needs MESA_FORMAT_X8_Z24 for HiZ and separate stencil. Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* intel: Add flags to intel_context for hiz and separate stencilChad Versace2011-05-252-0/+58
| | | | | | | | | | | | | | | | | | | Add the following flags: intel_context.has_separate_stencil intel_context.must_use_separate_stencil intel_context.has_hiz The flags are currently set to false, and will be enabled for a given chipset once the feature is completely implemented. Since it may be some time before these features are completed, their values can be overridden with environment variables INTEL_HIZ and INTEL_SEPARATE_STENCIL. Valid values for these environment variables are "0" and "1". Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* mesa: fix glGetTexImage for cases when srgb decode is skippedMike Kaplinskiy2011-05-241-101/+19
| | | | | | See http://bugs.freedesktop.org/show_bug.cgi?id=37150 Signed-off-by: Brian Paul <[email protected]>
* st/mesa: prefer formats without stencil for DEPTH_COMPONENTBrian Paul2011-05-241-4/+6
| | | | | | | for fast Z clears to be used more often. Original patch by Marek Olšák. Rebased to table-driven st_choose_format() by Brian Paul.
* st/mesa: rewrite st_choose_format() to be table drivenBrian Paul2011-05-241-905/+549
| | | | | | | | | | | Instead of using a giant switch statement with lots of code, use a table to convert GL format enums to pipe formats. Tested by running the old code next to the new and asserting that the return value was the same for piglit tests. We're doing a linear search, but if that ever appears to be too slow the table could easily be sorted or hashed.
* mesa: Fix remap_table setup.Thierry Reding2011-05-231-4/+0
| | | | | | | | | | | Since the SET_xxx and GET_xxx macros used to initialize the remap_table have been replaced by inline functions, the missing late macro expansion leads to driDispatchRemapTable not being redefined to remap_table, which in turn causes the remap_table not to be setup properly. This commit fixes the issue by moving the table redefinition after the definition of driDispatchRemapTable but in front of the inline function definitions.
* mesa: Fix return type of _mesa_get_format_bytes() (#37351)Adam Jackson2011-05-232-2/+4
| | | | | | | | | | | | | | | | | | | | | | | Despite that negative values aren't sensible here, making this unsigned is dangerous. Consider get_pointer_generic, which computes a value of the form: void *base + (int x * int stride + int y) * unsigned bpp The usual arithmetic conversions will coerce the (x*stride + y) subexpression to unsigned. Since stride can be negative, this is disastrous. Fixes at least the following piglit tests on Ironlake: fbo/fbo-blit-d24s8 spec/ARB_depth_texture/fbo-clear-formats spec/EXT_packed_depth_stencil/fbo-clear-formats NOTE: This is a candidate for the 7.10 branch. Reviewed-by: Chad Versace <[email protected]> Signed-off-by: Adam Jackson <[email protected]>
* i965/gen7: Fix miptree layout for cube surfaces.Kenneth Graunke2011-05-221-1/+1
| | | | | | | | | | | | | | | | | Volume 1a section 8.20.4.7.3 gives new equations which multiply by 12 instead of 11. Fixes 8 piglit tests: - fbo-cubemap - texCube - glsl-fs-texturecube - glsl-fs-texturecube-2 - glsl-fs-texturecube-2-bias - glsl-fs-texturecube-bias - arb_seamless_cubemap - cubemap Signed-off-by: Kenneth Graunke <[email protected]>
* i965: Remove comments about pre-965 hardware.Kenneth Graunke2011-05-221-3/+0
| | | | | | They're irrelevant for this driver. Signed-off-by: Kenneth Graunke <[email protected]>
* st/mesa: assign renderbuffer's format field when allocating storagepepp2011-05-211-0/+1
| | | | | | | | See http://bugs.freedesktop.org/show_bug.cgi?id=36173 NOTE: This is a candidate for the 7.10 branch. Signed-off-by: Brian Paul <[email protected]>
* i965: Fix sampling on Ivybridge after headerless change.Kenneth Graunke2011-05-201-2/+13
| | | | | | Fixes a regression since 90e922267a89fa9bef254bb257405531ceff7356. Signed-off-by: Kenneth Graunke <[email protected]>
* i965: Remove "TXD" from justification of sampler message headers.Kenneth Graunke2011-05-201-1/+1
| | | | | | | The coordinate offsets set in the m1 header are for textureOffset; they have nothing to do with textureGrad (TXD). Signed-off-by: Kenneth Graunke <[email protected]>
* i965/gen7: Add support for rendering to depthbuffer mipmap levels > 0.Kenneth Graunke2011-05-202-31/+18
| | | | | | | | | | | The same as 3e43adef95ee24dd218279d2de56939b90edcb4c but for Gen7. This doesn't quite fix GL_ARB_depth_texture/fbo-clear-formats; there's still a 1 pixel wide black line on the right edge of the smaller squares. The results were entirely wrong before, and are at least close now. Signed-off-by: Kenneth Graunke <[email protected]>
* mesa: Emit definition of GLAPIENTRYP in es_generator.py.Thierry Reding2011-05-201-0/+4
| | | | | | GLES uses GL_APIENTRYP instead of GLAPIENTRYP, which breaks with the latest API table generation code. This fixes the issue by emitting a definition for GL_APIENTRYP when generating the GLES files.
* glapi: More type-checking in Get_xxx too.José Fonseca2011-05-201-2784/+7424
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* r300: move declaration before codeBrian Paul2011-05-191-1/+1
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* mesa: fix vertex array enable checking in check_valid_to_render()Brian Paul2011-05-191-6/+28
| | | | | | | | | | In particular, this fixes the case where a vertex shader only uses generic vertex attributes (non-0th). Before, we were no-op'ing the glDrawArrays/Elements(). This fixes the new piglit pos-array test. NOTE: This is a candidate for the 7.10 branch.
* mesa: handle some srgb cases in the fast path in _mesa_get_teximageRoland Scheidegger2011-05-201-4/+7
| | | | | | | | | | Previously, always did unorm8->float/nonlinear-to-linear conversion (using lookup table), then convert back to nonlinear (using the expensive math func pow among others), and finally convert back to int (assuming caller wants unorm8), because the float texture fetch function is used for getting the actual texel values. This should probably all be changed at some point, but for now simply enable the memcpy path also for srgb formats (but if for instance swizzling is required, still the whole conversion will be done).
* glapi: Implement SET_xxx as inline functions instead of macros.José Fonseca2011-05-191-928/+3712
| | | | | In order to have the benefit of type checking, and detect missing GLAPIENTRY keywords on public entrypoints.
* mesa: add another missing GLAPIENTRY keywordJosé Fonseca2011-05-192-2/+2
| | | | NOTE: this is a candidate for the 7.10 branch.
* i965: Add support for rendering to depthbuffer mipmap levels > 0.Eric Anholt2011-05-184-32/+58
| | | | | | Fixes GL_ARB_depth_texture/fbo-clear-formats GL_EXT_packed_depth_stencil/fbo-clear-formats
* i965: Stop caching the combined depth/stencil region in brw_context.c.Eric Anholt2011-05-187-55/+53
| | | | | | This was going to get in the way of separate depth/stencil (which wants to know about both, and whether they are the same rb), and also wasn't a sufficient flag for the fix in the following commit.
* i965/gen6: Add support for point min/max size from ARB_point_parameters.Eric Anholt2011-05-181-2/+7
| | | | Fixes glean pointAtten.
* i965/fs: Don't emit a header on gen5+ sample messages unless required.Eric Anholt2011-05-181-7/+19
| | | | | | Improves glbenchmark egypt performance 0.6% +/- 0.4% (n=6). Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Fix GPU hang on texture2d-bias on pre-Ironlake.Eric Anholt2011-05-181-4/+7
| | | | | | | In the 16-wide rework, I missed that we were setting some things to be SIMD16 mode (corresponding to their setup in emit_texture_gen4()). Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Add support for correct GL_CLAMP behavior by clamping coordinates.Eric Anholt2011-05-189-69/+90
| | | | | | | | This removes the stupid strict-conformance fallback code I broke when adding ARB_sampler_objects. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=36572 Reviewed-by: Kenneth Graunke <[email protected]> (v1)
* i965/fs: Drop the viewport index/rtai clearing in gen6 fb writes.Eric Anholt2011-05-181-6/+0
| | | | | | | These fields are documented to be in the payload, and though the FB write docs say they *aren't* in the payload, for all other fields the payload and header is structured so that no overwriting is required except for non-default options.
* i965/fs: Add support for "if" statements in 16-wide mode on gen6+.Eric Anholt2011-05-182-3/+7
| | | | | | | | | | | It turns out there's nothing in the hardware preventing this. It appears that it ought to work on pre-gen6 as well, but just produces GPU hangs. Improves glbenchmark Egypt framerate 4.4% +/- 0.3% (n=3), and Pro by 2.6% +/- 0.6% (n=3). Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Fix discard and alpha test in 16-wide.Eric Anholt2011-05-181-6/+8
| | | | | | | | | | | | | As of gen6, alt-mode (which we use) MOVs of floats are not raw -- they'll modify infs/nans. This broke discard and alpha test in 16-wide, where apparently the upper 8 bits of the pixel enables being set were causing the whole value to get trashed upon being moved. Treating the values as UD instead of float makes sure they get preserved. While I'm here, replace the two 8-wide moves of the halves of the header with a single compressed move. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=36648 Reviewed-by: Kenneth Graunke <[email protected]>
* i965/gen6: Fix blending state when no color buffer is bound.Eric Anholt2011-05-181-2/+12
| | | | | | | This is part of fixing fbo-alphatest-nocolor -- a regression in 35e8fe5c99b285f348cb8a1bba2931f120f7c0a1 after the initial regression, that had us using a garbage BLEND_STATE[0] (in particular, the alpha test enable) if no color buffer was bound.
* i965/fs: Cut an instruction and a temporary from gen6 discard statements.Eric Anholt2011-05-182-40/+30
| | | | | | | | I thought I was thwarted initially when I couldn't do conditional mod on a MOV, and couldn't use two immediate constants in one instruction. But g0 != g0 is also a way to produce a failing comparison. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Fix compiler warnings about dead code from 963431829055f63ec94dEric Anholt2011-05-181-19/+0
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* swrast: anisotropic filtering extensionAndreas Faenger2011-05-184-0/+415
| | | | | | | | | Anisotropic filtering extension for swrast intended to be used by osmesa to create high quality renderings. Based on Higher Quality Elliptical Weighted Avarage Filter (EWA). A 2nd implementation using footprint assembly is also provided. Signed-off-by: Brian Paul <[email protected]>
* mesa: simplify error check in _mesa_MapBufferRange()Brian Paul2011-05-181-8/+7
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* mesa: only update array _MaxElement if array is enabledBrian Paul2011-05-181-2/+3
| | | | Fixes failed assertion when calling _mesa_print_arrays() debug function.
* mesa: check that flex/bison are installedBrian Paul2011-05-181-2/+2
| | | | | | Fixes https://bugs.freedesktop.org/show_bug.cgi?id=36651 NOTE: This is a candidate for the 7.10 branch.
* i965: Rename IS_GT1 and IS_GT2 to IS_SNB_GT1 and IS_SNB_GT2.Kenneth Graunke2011-05-182-4/+4
| | | | | | This should help distinguish Sandybridge GT1/GT2 from Ivybridge GT1/GT2. Signed-off-by: Kenneth Graunke <[email protected]>
* mesa/st: split updating vertex and fragment shader stages.Dave Airlie2011-05-183-8/+12
| | | | | | | this seems like a logical thing to do and sets the correct st flags for vertex textures. Signed-off-by: Dave Airlie <[email protected]>
* st/mesa: only memset sampler when about to use it.Dave Airlie2011-05-181-3/+2
| | | | | | | | | | | This function was taking a lot more CPU than required due to it memsetting a bunch of memory that didn't require it from what I can see. We should only memset here when we are about to fill out the sampler, otherwise we end up doing a bunch of memsets for everytime this function is called, basically setting 0 memory to 0. Signed-off-by: Dave Airlie <[email protected]>
* i965: Instead of fallback on missing region, just bind a null renderbuffer.Eric Anholt2011-05-172-12/+4
| | | | | | | | | | | | | | The change for GPU hanging in 13bab58f04c1ec6d0d52760eab490a0997d9abe2 fell back even when rb == NULL, which is wrong for GLES2 and caused segfaulting in GLES2 conformance. For the GPU hang case (where the broken 2D driver failed to allocate a BO for the window system renderbuffer), it also would assertion fail/segfault immediately after the fallback setup when the renderbuffer map failed. Fixes GLES2 conformance packed_depth_stencil. Signed-off-by: Eric Anholt <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]>
* i965: Updated fixed-point sizes in Ivybridge SAMPLER_STATE.Kenneth Graunke2011-05-171-3/+3
| | | | | | | | | Texture LOD Bias is now S4.8 instead of S4.6; Min LOD, and Max LOD are now U4.8 instead of U4.6. Fixes piglit test tex-miplevel-selection. Signed-off-by: Kenneth Graunke <[email protected]>
* i965: Ivybridge uses the Gen4 SAMPLER_BORDER_COLOR_STATE.Kenneth Graunke2011-05-171-1/+4
| | | | | | Volume 5c 1.13.7 lists it as [PreDevILK] and [DevIVB+]. Signed-off-by: Kenneth Graunke <[email protected]>
* intel: Recognize new Ivybridge PCI IDs.Kenneth Graunke2011-05-172-2/+22
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>