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* i965/nir/vec4: Select between new nir_vec4 or current vec4_visitor code-pathsEduardo Lima Mitev2015-08-032-10/+22
| | | | | | | | | | The NIR->vec4 pass will be activated if both the following conditions are met: * INTEL_USE_NIR environment variable is defined and is positive (1 or true) * The stage is vertex shader (support for geometry shaders and ARB_vertex_program will be added later). Reviewed-by: Jason Ekstrand <[email protected]>
* i965/nir/vec4: Add implementation placeholders for a new NIR->vec4 passEduardo Lima Mitev2015-08-033-0/+273
| | | | | | | | | | This patch will add a brw_vec4_nir.cpp file filled with entry point methods to the main functionality, following a structure similar to brw_fs_nir.cpp. Subsequent patches in this series will be adding the implementations for these methods, incrementally. Reviewed-by: Jason Ekstrand <[email protected]>
* mesa: Replace F_TO_I() with _mesa_lroundevenf().Matt Turner2015-08-035-42/+17
| | | | | | | | | | | I'm not sure what the true meaning of "The rounding mode may vary." is, but it is the case that the IROUND() path rounds differently than the other paths (and does it wrong, at that). Like _mesa_roundeven{f,}(), just add an use _mesa_lroundeven{f,}() that has known semantics. Reviewed-by: Roland Scheidegger <[email protected]>
* mesa: fix type for array indexing validationTimothy Arceri2015-08-031-1/+1
| | | | | | | | | | | | | parse_program_resource_name returns -1 when the index is invalid this needs to be tested before assigning the value to the unsigned array_index. In link_varyings.cpp (the other place parse_program_resource_name is used) after the -1 check is done the value is just assigned to an unsigned variable so it seems long is just used so we can return the -1 rather than actually expecting index values to be ridiculously large. Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* mesa/es3.1: Allow multisampled textures for GLES 3.1Marta Lofstedt2015-08-031-2/+2
| | | | | | | GLES 3.1 must be allowed to create multisampled textures. Signed-off-by: Marta Lofstedt <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* mesa/es3.1: Allow query of GL_TEXTURE_MULTISAMPLEMarta Lofstedt2015-08-031-1/+3
| | | | | | | GLES 3.1 must allow a query for GL_TEXTURE_MULTISAMPLE. Signed-off-by: Marta Lofstedt <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* mesa/es3.1: Allow enable of GL_SAMPLE_MASKMarta Lofstedt2015-08-031-1/+1
| | | | | | | GLES 3.1 must be able to enable GL_SAMPLE_MASK. Signed-off-by: Marta Lofstedt <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* mesa/es3.1: Allow textures with target GL_TEXTURE_2D_MULTISAMPLEMarta Lofstedt2015-08-032-3/+3
| | | | | | | | GLES 3.1 should be able to bind a texture with the target GL_TEXTURE_2D_MULTISAMPLE. Signed-off-by: Marta Lofstedt <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* mesa/es3.1: Allow GL_DEPTH_STENCIL_TEXTURE_MODEMarta Lofstedt2015-08-031-1/+3
| | | | | | | GLES 3.1 must support the parameter GL_DEPTH_STENCIL_TEXTURE_MODE. Signed-off-by: Marta Lofstedt <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* mesa/es3.1: Allow GL_SAMPLE_MASKMarta Lofstedt2015-08-031-1/+1
| | | | | | | GLES 3.1 should be allowed to enable GL_SAMPLE_MASK. Signed-off-by: Marta Lofstedt <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* mesa/es3.1: Allow binding GL_DRAW_INDIRECT_BUFFER with gles 3.1Marta Lofstedt2015-08-031-2/+3
| | | | | Signed-off-by: Marta Lofstedt <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* i965/fs: Fix regression with SIMD8 VS since ↵Francisco Jerez2015-07-311-1/+2
| | | | | | | | | | | | | | b5f1a48e234d47b24df38cb562cffb8941d43795. With num_direct_uniforms == 0 there's no space allocated in the param_size array for the one block of direct uniforms -- On the FS stage this would be a harmless no-op because it would simply re-set one of the param_size entries allocated for the sampler units to zero, but on the VS stage it has been reported to cause memory corruption followed by a crash -- Surprising how a full piglit run on Gen8 didn't catch it. Reported-and-reviewed-by: "Lofstedt, Marta" <[email protected]>
* i965/gen9: Add hs, ds, and cs thread + urb infoBen Widawsky2015-07-301-0/+10
| | | | | | | | | | | | | | | | | For SKL: These are the production values. For BXT: These are low estimates to enable platforms. This patch was originally part of i965/skl: Add production thread counts and URB size but was split out at Jordan's request (which I found to be reasonable). Note on stable inclusion: 10.6 does not care about hs, and ds. It does care about cs, but since Jordan was the one that asked me to extract it, I'll leave it up to him to deal with a backport to stable is required. Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965/bxt: Use more conservative thread countsBen Widawsky2015-07-301-2/+4
| | | | | | | | | | | | Since we really do not know what may occur in the future, pick a more conservative value for thread counts until we know better what values are correct. As far as I can tell, the old values will work fine, but some of the registers seem to indicate that going even lower is possible and the purpose of having early support is to enable as many configurations that can possibly exist (we can trim things down after platforms begin shipping later). Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965/skl: Add production thread counts and URB sizeBen Widawsky2015-07-301-5/+5
| | | | | | | | | | | | | This patch adjusts the SKL values to the best known values we have. v2: Remove HS/DS/CS fields. Adding this makes most sense to add to the GEN9_FEATURES macro, however, doing that would require updating BXT values, and Jordan requested I not do that. Conveniently, this request makes a lot of sense wrt to stable backport as HS, and DS do not even exist there. Cc: [email protected] Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* st/mesa: don't draw instead of asserting in transform feedbackDave Airlie2015-07-313-4/+7
| | | | | | | | | | | | if we get a request to take the count from feedback, but there is no buffer to take it from, just draw as if we got 0 vertices so nothing. This fixes this assert killing the ogl conform, and a piglit test I've sent. Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* mesa: remove now unused _mesa_get_uniform_locationTimothy Arceri2015-07-302-79/+0
| | | | | Cc: Tapani Pälli <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* mesa: remove now unused subscript validationsTimothy Arceri2015-07-302-108/+0
| | | | | Cc: Tapani Pälli <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* mesa: fix and simplify resource query for arraysTimothy Arceri2015-07-305-92/+106
| | | | | | | | | | | | | | | | | | | | | | This removes the need for multiple functions designed to validate an array subscript and replaces them with a call to a single function. The change also means that validation is now only done once and the index is retrived at the same time, as a result the getUniformLocation code can be simplified saving an extra hash table lookup (and yet another validation call). This chage also fixes some tests in: ES31-CTS.program_interface_query.uniform V3: rebase on subroutines, and move the resource index array == 0 check into _mesa_GetProgramResourceIndex() to simplify things further V2: Fix bounds checks for program input/output, split unrelated comment fix and _mesa_get_uniform_location() removal into their own patch. Cc: Tapani Pälli <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* i965/bxt: Don't use brw_device_info_skl_early on BXTNeil Roberts2015-07-301-1/+3
| | | | | | | | Previously it could end up using the “SKL early” device on BXT depending on the revision number. This would probably break things because for example has_llc would be wrong. Reviewed-by: Kenneth Graunke <[email protected]>
* Delete unused functions in format parserAnuj Phogat2015-07-291-7/+0
| | | | | Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Neil Roberts <[email protected]>
* i965: Change the type of max_{vs, hs, ...}_threads variables to unsignedAnuj Phogat2015-07-292-7/+7
| | | | | | | | | Fixes following compiler warning: brw_cs.cpp:386:27: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* Delete duplicate function is_power_of_two() and use _mesa_is_pow_two()Anuj Phogat2015-07-298-26/+15
| | | | | | Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* i965/bxt: Support 3src simd16 instructionsBen Widawsky2015-07-291-3/+1
| | | | | | | | | This is easily accomplished by moving simd16 3src to GEN9_FEATURES. v2: small cleanup to make it more similar to GEN8_FEATURES Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: Avoid double promotion.Matt Turner2015-07-2914-49/+49
| | | | Reviewed-by: Iago Toral Quiroga <[email protected]>
* mesa/math: Avoid double promotion.Matt Turner2015-07-293-46/+46
| | | | Reviewed-by: Iago Toral Quiroga <[email protected]>
* program: Avoid double promotion.Matt Turner2015-07-291-15/+15
| | | | Reviewed-by: Iago Toral Quiroga <[email protected]>
* swrast: Avoid double promotion.Matt Turner2015-07-2913-50/+50
| | | | Reviewed-by: Iago Toral Quiroga <[email protected]>
* tnl: Avoid double promotion.Matt Turner2015-07-297-30/+28
| | | | | | There are a couple of unrelated changes in t_vb_lighttmp.h that I hope you'll excuse -- there's a block of code that's duplicated modulo a few trivial differences that I took the liberty of fixing.
* vbo: Avoid double promotion.Matt Turner2015-07-292-5/+5
| | | | Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965: Use float calculations when double is unnecessary.Matt Turner2015-07-2914-34/+35
| | | | | | | | | | | | | | | | | Literals without an f/F suffix are of type double, and implicit conversion rules specify that the float in (float op double) be converted to a double before the operation is performed. I believe float execution was intended (in nearly all cases) or is sufficient (in the case of gen7_urb.c). Removes a lot of float <-> double conversion instructions and replaces many double instructions with float instructions which are cheaper. text data bss dec hex filename 4928659 195160 26192 5150011 4e953b i965_dri.so before 4928315 195152 26192 5149659 4e93db i965_dri.so after Reviewed-by: Iago Toral Quiroga <[email protected]>
* program: Use exp2(x) instead of pow(2.0, x).Matt Turner2015-07-291-2/+2
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* mesa: Use floats for viewport bounds.Matt Turner2015-07-2914-22/+22
| | | | | | | | | | | | | | | | | | ARB_viewport_array specifies that DEPTH_RANGE consists of double- precision parameters (corresponding commit d4dc35987), and a preparatory commit (6340e609a) added _mesa_get_viewport_xform() which returned double-precision scale[3] and translate[3] vectors, even though X, Y, Width, and Height were still floats. All users of _mesa_get_viewport_xform() immediately convert the double scale and translation vectors into floats (which were floats originally, but were converted to doubles in _mesa_get_viewport_xform(), sigh). i965 at least cannot consume doubles (see SF_CLIP_VIEWPORT). If we want to pass doubles to hardware, we should have a different function that does that. Acked-by: Mathias Froehlich <[email protected]>
* i965/fs: Make the default builder 64-wide before entering the optimization loop.Francisco Jerez2015-07-292-2/+7
| | | | | | | | | | | Not a typo. Replace the default builder with one of bogus width to catch cases in which optimization passes assume that the default dispatch width is good enough. The execution controls of instructions emitted during optimization should in general match the original code that is being manipulated. Many of the problems fixed in this series were caught by the assertions introduced in this patch. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/fs: Don't set exec_all on instructions wider than the original in ↵Francisco Jerez2015-07-291-9/+11
| | | | | | | | | | | | | lower_simd_width. This could have led to somewhat increased bandwidth usage for lowered texturing instructions on Gen4 (which is the only case in which lower_width may be greater than inst->exec_size). After the previous patches the invariant mentioned in the comment should no longer be assumed by any of the other optimization and lowering passes, so the exec_all() call shouldn't be necessary anymore. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/fs: Initialize a builder explicitly in the gen4 send dependency ↵Francisco Jerez2015-07-291-4/+7
| | | | | | | | | | | work-arounds. Instead of relying on the default one. This shouldn't lead to any functional changes because DEP_RESOLVE_MOV overrides the execution size of the instruction anyway and other execution controls are irrelevant. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/cfg: Assert that cur_do/while/if pointers are non-NULL.Matt Turner2015-07-291-0/+3
| | | | More.. like in commit 4d93a07c.
* i965/fs: Switch opt_cse() to the fs_builder constructor from instruction.Francisco Jerez2015-07-291-8/+8
| | | | Reviewed-by: Jason Ekstrand <[email protected]>
* i965/fs: Switch lower_logical_sends() to the fs_builder constructor from ↵Francisco Jerez2015-07-291-3/+1
| | | | | | instruction. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/fs: Switch lower_load_payload() to the fs_builder constructor from ↵Francisco Jerez2015-07-291-5/+2
| | | | | | instruction. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/fs: Don't rely on the default builder to create a null register in ↵Francisco Jerez2015-07-291-1/+1
| | | | | | | | | emit_spill. It's not guaranteed to have the same width as the instruction generating the spilled variable. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/fs: Set up the builder execution size explicitly in opt_sampler_eot().Francisco Jerez2015-07-291-4/+7
| | | | | | | | | | | opt_sampler_eot() was relying on the default builder to have the same width as the sampler and FB write opcodes it was eliminating, the channel selects didn't matter because the builder was only being used to allocate registers, no new instructions were being emitted with it. A future commit will change the width of the default builder what will break this assumption, so initialize it explicitly here. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/fs: Initialize a builder explicitly in opt_peephole_predicated_break().Francisco Jerez2015-07-291-3/+5
| | | | | | | | This wasn't taking into account the execution controls of the original instruction, but it was most likely not a bug because control flow instructions are typically full width. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/fs: Set execution controls explicitly in opt_peephole_sel().Francisco Jerez2015-07-291-3/+9
| | | | | | | | | | | Emit the SELs and MOVs with the same execution controls as the original MOVs, and the CMP with the same execution controls as the IF. Also explicitly check that the execution controls of any pair of MOVs being folded into a SEL are compatible (which is almost always going to be the case), since otherwise it would seem wrong to initialize the builder object below from the then_mov instruction only. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/fs: Set execution controls correctly in lower_integer_multiplication().Francisco Jerez2015-07-291-1/+1
| | | | | | | | lower_integer_multiplication() was ignoring the execution controls of the original MUL instruction. Fix it by using the new fs_builder constructor. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/fs: Set execution controls correctly for lowered pull constant loads.Francisco Jerez2015-07-291-3/+3
| | | | | | | | | | | | demote_pull_constants() was ignoring the execution size and channel selects of the instruction that wanted the constant, which doesn't matter for uniform pull constant loads because all channels get the same scalar value, but it might for varying pull constant loads. Fix it by using the new fs_builder() constructor that takes care of setting execution controls compatible with the instruction passed as argument. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/fs: Set the execution size of the MOVs correctly in ↵Francisco Jerez2015-07-291-1/+1
| | | | | | | | | | opt_combine_constants(). The execution size was being left equal to the default of 8/16, which AFAICT would have overwritten components other than the one we wanted to initialize and could potentially have corrupted other registers. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/fs: Define a new fs_builder constructor taking an instruction as argument.Francisco Jerez2015-07-291-0/+16
| | | | | | | | | | | | | | | | | | | | | | | We have a number of optimization passes that repeat the same pattern before inserting new instructions into the program based on some previous instruction: They point the default builder at the original instruction, then call exec_all() and group() to select the same execution controls the original instruction had, and then maybe call annotate() to clone the debug annotation from the original instruction. In fact an optimization pass missing any of these steps is likely to be broken if the intention was to emit new code based on a preexisting instruction, so let's make it easy for passes to do the right thing by having an fs_builder constructor that automates the task of setting up a builder to emit a given instruction provided as argument. The following patches fix all cases I've found in which we weren't explicitly initializing the execution controls of the emitted instructions, and clean-up optimization passes which were already doing the right thing to use the new constructor. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/fs: Translate memory barrier NIR intrinsics.Francisco Jerez2015-07-291-0/+7
| | | | Reviewed-by: Jason Ekstrand <[email protected]>
* i965/fs: Execute nir_setup_uniforms, _inputs and _outputs unconditionally.Francisco Jerez2015-07-291-15/+7
| | | | | | | | | | | | | | | Images take up zero uniform slots in the nir_shader::num_uniforms calculation, but nir_setup_uniforms needs to be executed even if the program has no non-image uniforms so the driver-specific image parameters are uploaded. nir_setup_uniforms is a no-op if there are really no uniforms, so checking the num_uniform count is useless in any case. The nir_setup_inputs and _outputs changes shouldn't lead to any functional change, they are just meant to preserve the symmetry between them and nir_setup_uniforms. Reviewed-by: Jason Ekstrand <[email protected]>
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