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* configure: allow building with python3Emil Velikov2018-08-232-2/+2
| | | | | | | | | | | | Pretty much all of the scripts are python2+3 compatible. Check and allow using python3, while adjusting the PYTHON2 refs. Note: - python3.4 is used as it's the earliest supported version - python3 chosen prior to python2 Signed-off-by: Emil Velikov <[email protected]> Acked-by: Eric Engestrom <[email protected]>
* meson: Run the install script with Python 3Mathieu Bridon2018-08-231-0/+1
| | | | | | | | The script was being run directly as an executable, and it has a Python 2 shebang. Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* i965: Enable INTEL_shader_atomic_float_minmax on Gen9+Ian Romanick2018-08-221-0/+1
| | | | | Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* i965: Sort Gen9+ extension enablesIan Romanick2018-08-221-3/+3
| | | | | | | | | This is a strictly alphabetic sort, as is done in extensions_table.h There are other options. We should pick one and document it. Right now, this file is chaos. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* mesa: Extension boilerplate for INTEL_shader_atomic_float_minmaxIan Romanick2018-08-222-0/+2
| | | | | Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* mesa: Extension boilerplate for NV_shader_atomic_floatIan Romanick2018-08-222-0/+2
| | | | | Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* i965/miptree: Fix can_blit_slice()Nanley Chery2018-08-221-4/+3
| | | | | | | | | | | | | | | Check the destination's row pitch against the BLT engine's row pitch limitation as well. Fixes: 0288fe8d0417730bdd5b3477130dd1dc32bdbcd3 ("i965/miptree: Use the correct BLT pitch") v2: Fix the Fixes tag (Dylan). Check the destination row pitch (Chris). Reported-by: Dylan Baker <[email protected]> Cc: <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/miptree: Use miptree_map in map_blit functionsNanley Chery2018-08-221-8/+6
| | | | | | | | | This struct contains all the data of interest. can_blit_slice() will use it in the next patch to calculate the correct pitch. Suggested-by: Chris Wilson <[email protected]> Cc: <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/icl: Allow headerless sampler messages for pre-emptable contextsAnuj Phogat2018-08-212-0/+15
| | | | | | | | | It fixes simulator warnings in piglit tests complaining about missing support for headerless sampler messages for pre-emptable contexts. Bit 5 in SAMPLER MODE register is newly introduced for ICLLP. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Implement EGL_KHR_mutable_render_bufferChad Versace2018-08-213-4/+107
| | | | | | | | | | | | | | Testing: - Manually tested a low-latency handwriting demo that toggles EGL_RENDER_BUFFER. Toggling changed the display latency as expected. Used Android on Chrome OS, Kabylake GT2. - No change in dEQP-EGL.functional.* on Fedora 27, Wayland, Skylake GT2. Used deqp at tag android-p-preview-5. - No regressions in dEQP-EGL.functional.*, ran on Android on Chrome OS, Kabylake GT2. Some dEQP-EGL.functional.mutable_render_buffer.* test change from NotSupported to Pass. Reviewed-by: Tapani Pälli <[email protected]>
* mesa: move legacy hyperz option from dri configTimothy Arceri2018-08-211-0/+5
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: remove unused dri config option disable_shader_bit_encodingTimothy Arceri2018-08-211-3/+1
| | | | | | | This was added as a workaround for Heaven 3.0 but was later removed by 5ead448719f3 to allow Heaven 4.0 to work correctly. Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: drop legacy no_rast dri optionTimothy Arceri2018-08-216-11/+3
| | | | | | Add enviroment var overrides to legacy drivers instead. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: remove unused no_rast boolTimothy Arceri2018-08-211-1/+0
| | | | | | | Forcing software fallbacks for i965 hasn't been an option since 5e3c093ff866. Reviewed-by: Kenneth Graunke <[email protected]>
* i915: remove early_z dri optionTimothy Arceri2018-08-214-16/+0
| | | | | | | This driver is in maintenance mode so lets remove this hidden unsafe option. Reviewed-by: Kenneth Graunke <[email protected]>
* Add NV_fragment_shader_interlock support.Kevin Rogovin2018-08-201-0/+1
| | | | | | | | The main purpose for having NV_fragment_shader_interlock extension is because that extension is also for GLES31 while the ARB extension is for GL only. Reviewed-by: Plamena Manolova <[email protected]>
* i965: Advertise 8 bits subpixel precision for viewport bounds on gen6+Danylo Piliaiev2018-08-201-1/+1
| | | | | | | | | | We use floating-points for viewport bounds so VIEWPORT_SUBPIXEL_BITS should reflect this. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105975 Signed-off-by: Danylo Piliaiev <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* mesa: move legacy dri config option texture_unitsTimothy Arceri2018-08-201-0/+5
| | | | Reviewed-by: Ian Romanick <[email protected]>
* mesa: move legacy dri config option texture_blend_qualityTimothy Arceri2018-08-201-0/+6
| | | | Reviewed-by: Ian Romanick <[email protected]>
* xmlconfig: add kernel_driver device attributeQiang Yu2018-08-176-6/+8
| | | | | | | | | This attribute can be used by loader to apply different option to device use specific kernel driver. Signed-off-by: Qiang Yu <[email protected]> Acked-by: Michel Dänzer <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* bin: always define MESA_GIT_SHA1 to make it directly usable in codeEric Engestrom2018-08-162-10/+2
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* git_sha1: simplify logicEric Engestrom2018-08-161-1/+1
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* i965: drop unused assignmentEric Engestrom2018-08-161-2/+0
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* mesa/st: fix array indices off-by-one error in remappingGert Wollny2018-08-162-6/+6
| | | | | | | | | | | | | | | When moving the array sizes from the old list to the new one it was not taken into account that the array indices start with one, but the array_size array started at index zero, which resulted in incorrect array sizes when arrays were merged. Correct this by copying the array_size values of the retained arrays with an offset of -1. Also fix whitespaces for the replaced lines. Fixes: d8c2119f9b0b257a23ceb398f6d0d78da916417e mesa/st/glsl_to_tgsi: Expose array live range tracking and merging Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* i965: do not emit empty surface stateErik Faye-Lund2018-08-151-0/+5
| | | | | | | | | | | | | | If called with an empty size, brw_emit_buffer_surface_state asserts. We already have a dedicated helper for uploading nothing, so let's use that instead. Avoids an assert in dEQP-GLES31.functional.shaders.opaque_type_indexing.ssbo.const_literal_vertex when running a debug build of i965. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/ppgtt: 4096 replaced by PAGE_SIZESergii Romantsov2018-08-151-6/+6
| | | | | | | Usage of number 4096 replaced by PAGE_SIZE. Signed-off-by: Sergii Romantsov <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/ppgtt: memory address alignmentSergii Romantsov2018-08-151-4/+3
| | | | | | | | | | | | | | | | | | Kernel (for ppgtt) requires memory address to be aligned to page size (4096). -v2: added marking that also fixes initial commit 01058a552294. -v3: numbers replaced by PAGE_SIZE; buffer-object size is aligned instead of alignment of offsets (Chris Wilson). -v4: changes related to PAGE_SIZE moved to separate commit -v5: restored alignment to page-size for 0-size. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106997 Fixes: a363bb2cd0e2 (i965: Allocate VMA in userspace for full-PPGTT systems.) Fixes: 01058a552294 (i965: Add virtual memory allocator infrastructure to brw_bufmgr.) Signed-off-by: Sergii Romantsov <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* i965: Emitting 3DSTATE_SO_BUFFER of 0-size.Sergii Romantsov2018-08-151-4/+5
| | | | | | | Avoided filling of whole structure and bo-allocation if size of surface is 0. Signed-off-by: Sergii Romantsov <[email protected]>
* mesa: shader dump/read support for ARB programsTapani Pälli2018-08-153-7/+31
| | | | | | Signed-off-by: Tapani Pälli <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106283 Reviewed-by: Alejandro Piñeiro <[email protected]>
* compiler: add SYSTEM_VALUE_VARYING_COORDRob Clark2018-08-141-0/+1
| | | | | | | | Used internally in freedreno/ir3 for the vec2 value that hw passes to shader to use as coordinate for bary.f (varying fetch) instruction. This is not the same as SYSTEM_VALUE_FRAG_COORD. Signed-off-by: Rob Clark <[email protected]>
* mesa/glspirv: fix compilation with MSVCAlejandro Piñeiro2018-08-131-1/+1
| | | | | | | From AppVeyor #8582, it seems that MSVC doesn't like uint, so this patch replaces it with unsigned. Reviewed-by: Roland Scheidegger <[email protected]>
* mesa/st/glsl_to_tgsi: fixup copy-paste mistakeErik Faye-Lund2018-08-131-1/+1
| | | | | | | | | | | | | This is clearly a copy-paste error; if we validate the reladdr2-pointer, we don't want to traverse to the reladdr-pointer. Especially since the check above shows that reladdr could be NULL here. Noticed by Coverity. CID: 1438389, 1438390 Fixes: 568bda2f2d3 ("mesa/st/glsl_to_tgsi: Split arrays whose elements are only accessed directly") Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Gert Wollny <[email protected]>
* i965/nir: Use the nir copy of shader_info to handle gl_PatchVerticesInNeil Roberts2018-08-131-1/+1
| | | | | | | | | | | | | | | | | | Instead of using the copy of shader_info stored in gl_program, it now uses the one in nir_shader. This is needed for SPIR-V because the info.tess.tcs_vertices_out is filled in via _mesa_spirv_to_nir which happens much later than with a GLSL shader. The copy of shader_data in gl_program is only updated later via brw_shader_gather_info but that is too late. For GLSL this shouldn't create any problems because the nir copy of the shader_info is immediately copied from the gl_program in glsl_to_nir. v2: updated after commit "i965: Combine both gl_PatchVerticesIn lowering passes." (488972) (Alejandro Piñeiro) Reviewed-by: Timothy Arceri <[email protected]>
* mesa/glspirv: Set separate_shader on shader_infoNeil Roberts2018-08-131-0/+2
| | | | | | | | | The value is copied from the gl_program. If we don’t do this then it will get reset back to zero in brw_shader_gather_info. This isn’t a problem for GLSL because in that case the nir_shader is initialised with a copy of the shader_info from the gl_program. Reviewed-by: Timothy Arceri <[email protected]>
* mesa/glspirv: pick off the only entry point we needIago Toral Quiroga2018-08-131-0/+15
| | | | | | | | | This is the same we do for vulkan drivers This is needed to pass the following CTS test: KHR-GL45.gl_spirv.spirv_modules_shader_binary_multiple_shader_objects_test Reviewed-by: Timothy Arceri <[email protected]>
* mesa/glspirv: compute double inputs and remap attributesAlejandro Piñeiro2018-08-131-0/+19
| | | | | | | | | | | | | | input locations used by input attributes are not handled in the same way in OpenGL vs Vulkan. There is a detailed explanation of such differences on the following commit: c2acf97fcc9b32eaa9778771282758e5652a8ad4 So with this commit, the same adjustment that is done after glsl_to_nir, is being done after spirv_to_nir, when it is used on OpenGL (ARB_gl_spirv). Reviewed-by: Timothy Arceri <[email protected]>
* i965: enable EXT_render_snormTapani Pälli2018-08-131-0/+1
| | | | | Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Nanley Chery <[email protected]>
* mesa: enable EXT_render_snorm extensionTapani Pälli2018-08-136-9/+61
| | | | | | | | | | | | | | | | Patch sets additional formats renderable and enables the extension when OpenGL ES 3.1 is supported. v2: instead of dummy_true, have a separate toggle for extension (Eric Anholt) v3: add missing checks, simplify some existing checks and fix glCopyTexImage2D check (Nanley Chery) add SHORT and BYTE support in read_pixels_es3_error_check Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Nanley Chery <[email protected]>
* intel: Switch the order of the 2x MSAA sample positionsJason Ekstrand2018-08-112-9/+9
| | | | | | | | The Vulkan 1.1.82 spec flipped the order to better match D3D. Cc: [email protected] Reviewed-by: Iago Toral Quiroga <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* mesa/st/tests: Add array life range estimation and renumbering testsGert Wollny2018-08-111-0/+211
| | | | | Signed-off-by: Gert Wollny <[email protected]> Acked-by: Dave Airlie <[email protected]>
* mesa/st/tests: Add array life range tests infrastructure to common test classGert Wollny2018-08-112-27/+186
| | | | | Signed-off-by: Gert Wollny <[email protected]> Acked-by: Dave Airlie <[email protected]>
* mesa/st/glsl_to_tgsi: Expose array live range tracking and mergingGert Wollny2018-08-115-17/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch ties in the array split, merge, and interleave code. shader-db changes in the TGSI code are: original code | array-merge | change mean max | mean max | best mean % worst ----------------------------------------------------------- arrays 0.05 2 | 0.00 0 | -2 -100 0 total temps 5.05 21 | 4.92 20 | -15 -2.59 1 instr 55.33 988 | 55.20 988 | -15 -0.24 0 Evaluation: Run shader-db in single thread mode (otherwise the output is not ordered and the best and worst column don't make sense) to get results pre-stats.txt and post-stats.txt. Then using python pandas: import pandas as pd old_stats = pd.read_csv('pre-stats.txt') new_stats = pd.read_csv('post-stats.txt') omean = old_stats.mean() omax = old_stats.max() nmean = new_stats.mean() nmax = new_stats.max() delta = new_stats - old_stats pd.concat([omean, omax, nmean, nmax, delta.min(), delta.mean()/old_stats.mean()*100, delta.max()], axis=1, keys=['mean', 'max', 'mean', 'max', 'best', 'avg change %', 'worst']) v4: - Correct typo and add bugs that are fixed by this series. - Update stats and describe stats evaluation Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105371 https://bugs.freedesktop.org/show_bug.cgi?id=100200 Signed-off-by: Gert Wollny <[email protected]> Acked-by: Dave Airlie <[email protected]>
* mesa/st/glsl_to_tgsi: add array life range evaluation into tracking codeGert Wollny2018-08-111-12/+50
| | | | | | | | v4: Also track the register given in inst->resource. (thanks: Benedikt Schemmer for testing the patches on radeonsi, which revealed that I was missing tracking this) Signed-off-by: Gert Wollny <[email protected]> Acked-by: Dave Airlie <[email protected]>
* mesa/st/glsl_to_tgsi: add class for array access trackingGert Wollny2018-08-111-0/+102
| | | | | | | | | | | | | | | | | | Because of the indirect access it is impossible to obtain an accurate per component and array element tracking. Therefore, the tracking is simplified to only track whether any element was accessed, whether this happend conditionally in a loop. In addition, while tracking of temporaries requires a per-componet tracking that is later fused, for arrays only the components access mask is neede. The resulting tracking code and evaluation of the array live range is sufficiently different from the evaluation of the live range of temporaries to justify implementing this in a different class instead of adding more complexity to the already existing code for temporary life range evaluation. v4: Update commit message to make it clearer why this class is seperate from the tracking of temporaries. Signed-off-by: Gert Wollny <[email protected]> Acked-by: Dave Airlie <[email protected]>
* mesa/st/glsl_to_tgsi: move evaluation of read mask up in the call hierarchyGert Wollny2018-08-111-7/+8
| | | | | | | | | In preparation of the array live range tracking the evaluation of the read mask is moved out the register live range tracking to the enclosing call of the generalized read access tracking. Signed-off-by: Gert Wollny <[email protected]> Acked-by: Dave Airlie <[email protected]>
* mesa/st/glsl_to_tgsi: rename access_record to register_merge_record and some ↵Gert Wollny2018-08-112-32/+33
| | | | | | | | | | | more renames In preparartion of adding the tracking of the live range the classes that refer to temporary registers are renamed. Reviewed-by: Nicolai Hähnle <[email protected]> Signed-off-by: Gert Wollny <[email protected]> Acked-by: Dave Airlie <[email protected]>
* mesa/st/tests: Add tests for array merge helper classes.Gert Wollny2018-08-114-7/+787
| | | | | | | | | | v2: - Define tests also in the meson.build file. v4: - Check no-op mapping of all bits. - Convert tests to the new class layout used in the merge evaulation. - remove dependency on llvm in meson build (Thanks Dylan Baker for pointing out that this might not needed) Signed-off-by: Gert Wollny <[email protected]> Acked-by: Dave Airlie <[email protected]>
* mesa/st/glsl_to_tgsi: Add array merge logicGert Wollny2018-08-112-2/+407
| | | | | | | v4: - Update the code to use the new merge logic. - Use a cleaner, class-based approach for the evaluation of merges. Signed-off-by: Gert Wollny <[email protected]> Acked-by: Dave Airlie <[email protected]>
* mesa/st/glsl_to_tgsi: Add helper classes to apply array merging and interleavingGert Wollny2018-08-112-1/+164
| | | | | | | | | v4: - Remove logic for evaluation of swizzles and merges since this was moved to array_live_range. This class now only handles the actual remapping. Signed-off-by: Gert Wollny <[email protected]> Acked-by: Dave Airlie <[email protected]>
* mesa/st/glsl_to_tgsi: Add helper class for array live range merging and ↵Gert Wollny2018-08-114-0/+319
| | | | | | | | | | | | | | | | | interleaving This class holds the array length, live range, and accessed components, and it implements the logic for evaluating how arrays are merged and interleaved. v4: - Add logic to evaluate merge and interleave of a pair of arrays to the class array_live_range. - document class - update commit message Thanks Nicolai Hähnle for the pointers given. Signed-off-by: Gert Wollny <[email protected]> Acked-by: Dave Airlie <[email protected]>
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