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* mesa: whitespace fixes in get.cBrian Paul2017-07-181-110/+110
| | | | | | Remove trailing whitespace. Replace tabs with spaces. Trivial.
* mesa: fix GL_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION_EXT queryBrian Paul2017-07-182-1/+13
| | | | | | | | This query is not allowed in GL core profile 3.3 and later (since GL_QUADS and GL_QUAD_STRIP are disallowed). The query was (mistakenly) supported in GL 3.2. This fixes the glGet error test accordingly. Reviewed-by: Neha Bhende<[email protected]>
* i965: Delete brw_sf_state.c againKenneth Graunke2017-07-171-200/+0
| | | | | | | | | | | | "...and stay dead!" Rafael deleted this file in c2b5a26dc25b9c62954a75465e25294c7fd3851a (i965: Convert SF_STATE to genxml.) but Marek accidentally brought it back in commit e7a091936fb6fd578c6ced9baa38b306b638a11b (mesa: replace ctx->Polygon._FrontBit with a helper function) when resolving conflicts. It's not actually even compiled, but it's still here trolling people into thinking it still exists and needs patching.
* i965: Check if the modifier is supported in select_best_modifierJason Ekstrand2017-07-171-0/+3
| | | | | | | | Otherwise, if a client gave us a list of modifiers that contained a modifier we understand but which is not supported on the hardware, we might return that one and then fail to create the image. Reviewed-by: Daniel Stone <[email protected]>
* i965: Rework the modifier info mapJason Ekstrand2017-07-171-23/+25
| | | | | | | | | | This commit splits the mapping in half. The modifier_infos table now only contains the modifier and the since_gen field. The tiling bits have been moved into a table in tiling_to_modifier as that's the only place it was ever used. The modifier_is_supported function now takes a devinfo and does the since_gen check. Reviewed-by: Daniel Stone <[email protected]>
* i965/surface_state: Remove the mcs_buf->offset == 0 restrictionJason Ekstrand2017-07-171-1/+0
| | | | | | | | | This assert was removed in b0cc55f29831638069407a4c1a5c809b26902ab6 but got added back in 1a43d774b613d0b00e26b28cc752d944ce8049aa, probably by accident. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* intel/isl: Add a row_pitch parameter to surf_get_ccs_surfJason Ekstrand2017-07-171-1/+2
| | | | | Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/miptree: Use BO_ALLOC_ZEROED for CCS_E buffersJason Ekstrand2017-07-171-23/+13
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/screen: Allocate ZEROED BOs for imagesJason Ekstrand2017-07-171-1/+5
| | | | Reviewed-by: Chad Versace <[email protected]>
* i965/bufmgr: Add a BO_ALLOC_ZEROED flagJason Ekstrand2017-07-172-2/+27
| | | | | Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/miptree: Replace is_lossless_compressed with mt->aux_usage checksJason Ekstrand2017-07-175-41/+10
| | | | | | | | | | Now that we have an actual aux_usage field, we no longer need the complex logic of is_lossless_compressed in order to figure out if a miptree is CCS_E compressed. As a side-effect, there is not longer any need to overload MSAA_LAYOUT_CMS for CCS_E and we can stop doing so. Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/miptree: Allocate HiZ up-frontJason Ekstrand2017-07-172-17/+6
| | | | | | | | | | | | | HiZ, like MCS and CCS_E, can compress more than just clear colors so we want it turned on whenever the miptree is being used as a depth attachment. It's theoretically possible for someone to create a depth texture, upload data with glTexSubImage2D, and texture from it without ever binding it as a depth target. If this happens, we would end up wasting a bit of space by allocating a HiZ surface we never use. However, this is rather unlikely out side of test cases, so we're better off just allocating it up-front. Reviewed-by: Chad Versace <[email protected]>
* i965/miptree: Add an intel_tiling_supports_hiz helperJason Ekstrand2017-07-171-1/+11
| | | | | | | | | | We need this split for the same reason that we need the split for CCS: intel_miptree_supports_hiz is called *before* we choose the actual tiling. Adding a tiling_supports_hiz helper lets choose_aux_usage more accurately decide whether or not to enable hiz. In particular, this prevents us from enabling HiZ on linear depth buffers. Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/miptree: Gather initial aux allocation into a single functionJason Ekstrand2017-07-171-30/+53
| | | | | Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* st/mesa: init winsys buffers list only if context creation succeedsCharmaine Lee2017-07-111-3/+3
| | | | | | | | Fixes piglit test crash when context creation fails. v2: As suggested by Brian, move the init to st_create_context_priv() Reviewed-by: Brian Paul <[email protected]>
* i965: use strtol to convert the integer deviceID overrideEmil Velikov2017-07-171-1/+1
| | | | | | | | | | | | | | | | One can override the deviceID, by setting the INTEL_DEVID_OVERRIDE variable. A few symbolic names or a numerical value for the actual device ID is accepted. At the same time we're using strtod (string to double) to convert the string to a decimal numeral. A seeming thinko, made by the original commit that introduces the code in libdrm_intel and got here with the import. Fixes: 514db96c117a ("i965: Import libdrm_intel.") Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: miptree: silence coverity warningLionel Landwerlin2017-07-171-1/+1
| | | | | | | | | | This probably can't happen, but we're better off with initialized variables. CID: 1415114 Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
* mesa: flag _NEW_TEXTURE_OBJECT for GL_TEXTURE_LOD_BIAS_EXTMarek Olšák2017-07-171-1/+1
| | | | | | | Only the compatibility profile can set it. It was done incorrectly when we split _NEW_TEXTURE. Reviewed-by: Nicolai Hähnle <[email protected]>
* meta: Actually initialize ImmutableLevels to 1.Kenneth Graunke2017-07-171-0/+1
| | | | | | | | | | | | | | Otherwise, ImmutableLevels is 0, which is an illegal value. Later, _mesa_meta_setup_sampler will use _mesa_texture_parameteriv to set texObj->MaxLevel = CLAMP(params[0], texObj->BaseLevel, texObj->ImmutableLevels - 1); which turns into a completely bogus CLAMP(value, 0, -1)...where the upper bound is smaller than the lower bound. This ends up being -1 today due to the way CLAMP is implemented, which is a bogus MaxLevel. Reviewed-by: Ian Romanick <[email protected]>
* dri: Make classic drivers allow __DRI_CTX_FLAG_NO_ERROR.Kenneth Graunke2017-07-175-6/+7
| | | | | | | | | | | | | Grigori recently added EGL_KHR_create_context_no_error support, which causes EGL to pass a new __DRI_CTX_FLAG_NO_ERROR flag to drivers when requesting an appropriate context mode. driContextSetFlags() will already handle it properly for us, but the classic drivers all have code to explicitly balk at unknown flags. We need to let it through or they'll fail to create a no_error context. Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Grigori Goronzy <[email protected]>
* i965: Compile with -msse2 (instead of -msse2)Matt Turner2017-07-141-1/+1
| | | | | Ian noted that were were two Pentium 4 Extreme Edition LGA 775 CPUs, and they only have SSE2.
* i965: Compile with -msse3Matt Turner2017-07-141-1/+2
| | | | | | | | | | | | All CPUs that can be paired with a GPU supported by i965_dri.so supports SSE3. This allows us to ensure that some vectorized version of the tiled memcpy path is enabled on 32-bit systems. This also ensures that __builtin_ia32_clflush is always usable. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101774 Tested-by: Tobias Klausmann <[email protected]> Acked-by: Kenneth Graunke <[email protected]>
* drirc: whitelist glthread for Euro Truck Simulator 2Petr Sebor2017-07-141-0/+3
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* drirc: whitelist glthread for American Truck SimulatorPetr Sebor2017-07-141-0/+3
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* mesa/marshal: fix Windows buildGrigori Goronzy2017-07-141-3/+3
| | | | | | | This was broken by commit 1ad24faa. Reported by AppVeyor: https://ci.appveyor.com/project/mesa3d/mesa/build/4918
* drirc: whitelist glthread for The Witcher 2Edmondo Tommasina2017-07-141-0/+3
| | | | | | | | Performance delta on AMD Phenom II X3 720 / RX 470 The Witcher 2: +18% Signed-off-by: Marek Olšák <[email protected]>
* drirc: whitelist glthread for Civilization 5Edmondo Tommasina2017-07-141-0/+3
| | | | | | | | Performance delta on AMD Phenom II X3 720 Civilization 5: +28% Signed-off-by: Marek Olšák <[email protected]>
* st/mesa: Add KHR_no_error toggle to driconfGrigori Goronzy2017-07-141-0/+5
| | | | | | | | Allows applications to be whitelisted. v2: Remove misguided DRI common part. Reviewed-by: Marek Olšák <[email protected]>
* st/mesa: Add support for KHR_no_error flagGrigori Goronzy2017-07-143-5/+14
| | | | | | | Add a new context flag and plumb it through the various layers of the context creation code to set up dispatch tables for the no-error mode. Reviewed-by: Marek Olšák <[email protected]>
* dri: Add KHR_no_error DRI extensionGrigori Goronzy2017-07-147-2/+18
| | | | | | | | | | This basic extension allows usage of the __DRI_CTX_FLAG_NO_ERROR flag. This includes support code for classic Mesa drivers to switch on the no-error mode if the flag is set. v2: Move to common DRI code. Reviewed-by: Marek Olšák <[email protected]>
* mesa/marshal: fix glNamedBufferData with NULL dataGrigori Goronzy2017-07-141-4/+13
| | | | | | | The semantics are similar to glBufferData. Tested-by: Marc Dietrich <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* mesa/marshal: add marshalling for glClearBuffer*Grigori Goronzy2017-07-142-2/+160
| | | | | | | | | Add async marshalling/unmarshalling for all glClearBuffer variants. These entry points are commonly used in general and Alien Isolation specifically uses glClearBufferiv. Slightly reduces the number of thread synchronizations with glthread in that game. Reviewed-by: Marek Olšák <[email protected]>
* mesa/marshal: extract ClearBuffer helpersGrigori Goronzy2017-07-142-29/+50
| | | | | | | | | Extract clear buffer helper functions in preparation for adding marshal/unmarshal functions for the various glClearBuffer variants. v2: Fix command size. Reviewed-by: Marek Olšák <[email protected]>
* st/mesa: handle stfbi being NULL on entry of st_framebuffer_reuse_or_createLucas Stach2017-07-141-0/+3
| | | | | | | | | | | Apparently this can happen. Just bail out early in that case, as all the called functions return NULL in that case. Fixes weston-terminal for me. Fixes: 147d7fb772a7 ("st/mesa: add a winsys buffers list in st_context") Signed-off-by: Lucas Stach <[email protected]> Reviewed-by: Charmaine Lee <[email protected]>
* i965: Push UBO data, but don't use it just yet.Kenneth Graunke2017-07-132-7/+64
| | | | | | | | | | | This patch starts uploading UBO data via 3DSTATE_CONSTANT_* packets, and updates the compiler to know that there's extra payload data, so things continue working. However, it still issues pull loads for all data. I wanted to separate the two aspects for greater bisectability. v2: Update for new intel_bufferobj_buffer parameter. Reviewed-by: Matt Turner <[email protected]>
* i965: Pad buffer objects by 2kB in robust contexts to avoid OOB access.Kenneth Graunke2017-07-131-2/+20
| | | | | | | This is an annoyingly big hammer, but it seems less mean than disabling UBO pushing, and I'm not sure what else to do. Reviewed-by: Matt Turner <[email protected]>
* i965: Stop re-uploading push constants after URB reconfiguration.Kenneth Graunke2017-07-132-8/+7
| | | | | | | | | | | Previously we would re-upload the constant data to the batchbuffer, then re-emit the packets. We only need to do the last step (causing the existing data in the batchbuffer to be re-uploaded to the push constant staging area in the L3). Now that we've separated the two, it's pretty easy to accomplish. Reviewed-by: Matt Turner <[email protected]>
* i965: Separate uploading push constant data from the pointer packets.Kenneth Graunke2017-07-133-34/+52
| | | | | | | | | | | | | | | | | | I hope to upload UBO via 3DSTATE_CONSTANT_XS packets, in addition to normal uniforms. In order to do that, I'll need to re-emit the packets when UBOs change. But I don't want to re-copy the regular uniform data to the batchbuffer every time. This patch separates out the data uploading from the packet submission. We're running low on dirty bits, so I made the new atom happen on every draw call, and added a flag to stage_state indicating that we want the packet for that stage emitted. I would have preferred to do this outside the atom system, but it has to happen between the uploading of push constant data and the binding table upload. Reviewed-by: Matt Turner <[email protected]>
* i965: Introduce a BRW_NEW_DRAW_CALL dirty bit.Kenneth Graunke2017-07-133-0/+8
| | | | | | This allows us to have atoms which are signalled on every draw call. Reviewed-by: Matt Turner <[email protected]>
* i965: Store per-stage push constant BO pointers.Kenneth Graunke2017-07-133-3/+6
| | | | | | | | | | | | | | | | | | | | Right now, we always upload new push constant data, and immediately emit 3DSTATE_CONSTANT_* packets. We call intel_upload_space and store the resulting BO pointer in brw->curbe.curbe_bo. We read that when emitting the packets. This works today, but is fragile - it depends on upload and packet emission being interleaved. If we instead were to upload all the data, then emit all the packets, then upload BO wrapping will get us into trouble. For example, the VS constants may land in one upload BO, but the FS constants may not fit and land in a second upload BO. Uploading FS constants would overwrite the brw->curbe.curbe_bo pointer, so when we emitted 3DSTATE_CONSTANT_VS, we'd get the wrong BO. I intend to separate out this code in a future commit, so I need to fix this. To fix it, we simply store a per-stage BO pointer. Reviewed-by: Matt Turner <[email protected]>
* i965: Select ranges of UBO data to be uploaded as push constants.Kenneth Graunke2017-07-135-0/+10
| | | | | | | | | | | | | | | This adds a NIR pass that decides which portions of UBOS we should upload as push constants, rather than pull constants. v2: Switch to uint16_t for the UBO block number, because we may have a lot of them in Vulkan (suggested by Jason). Add more comments about bitfield trickery (requested by Matt). v3: Skip vec4 stages for now...I haven't finished wiring up support in the vec4 backend, and so pushing the data but not using it will just be wasteful. Reviewed-by: Matt Turner <[email protected]>
* i965: Require a UBO offset alignment of 32 bytes.Kenneth Graunke2017-07-131-1/+4
| | | | | | | | | | Soon, we're going to start providing UBO data to shaders as push constants, rather than requiring them to issue pull loads. The 3DSTATE_CONSTANT_* commands require 32 byte aligned pointers. So, we need to increase this from 16 to 32. Reviewed-by: Matt Turner <[email protected]>
* i965: Switch to absolute addressing for constant buffer 0.Kenneth Graunke2017-07-133-0/+31
| | | | | | | | | | | | | | | | | By default, 3DSTATE_CONSTANT_* Constant Buffer 0 is relative to dynamic state base address. This makes it unusable for pushing UBOs. I'd like to be able to use all four push buffers. There is a bit in the INSTPM register (or CS_DEBUG_MODE2 on Skylake) which controls whether buffer 0 is relative to dynamic state base address, or simply a normal pointer. Setting that gives us full flexibility. We can't currently write this on Haswell and earlier, and will need to update the kernel command parser, and then do the whole version checking song and dance. Reviewed-by: Matt Turner <[email protected]>
* i965: Use async maps for BufferSubData to regions with no valid data.Kenneth Graunke2017-07-131-1/+3
| | | | | | | | | | | | | | | When writing a region of a buffer via glBufferSubData(), we can write the data asynchronously if the destination doesn't contain any data. Even if it's busy, the data was undefined, so the new data is fine too. Removes all stall avoidance blits on BufferSubData calls in "Total War: WARHAMMER" on my Skylake GT4. Decreases the number of stall avoidance blits in Manhattan 3.1: - Skylake GT4: -18.3544% +/- 6.76483% (n=13) - Apollolake: -12.1095% +/- 5.24458% (n=13) Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Track a range of the buffer which contains valid data.Kenneth Graunke2017-07-132-4/+48
| | | | | Reviewed-by: Chris Wilson <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Add a "write" parameter to intel_bufferobj_buffer.Kenneth Graunke2017-07-139-19/+26
| | | | | | | This doesn't do anything yet, but soon we'll want to know whether an access to a buffer section may write that data, or simply reads it. Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Convert GS_STATE to genxml.Rafael Antognolli2017-07-135-172/+54
| | | | | | | | Merge the code with gen6+ 3DSTATE_GS, and delete brw_gs_state.c, together with brw_gs_unit_state. Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Prepare gs_state emitting code to include gen4-5.Rafael Antognolli2017-07-131-13/+11
| | | | | | | | | | | | Since we always call brw_batch_emit anyways, we can hopefully make things simpler by calling it only once, and then branching inside its body. This can be helpful when bringing the gen4-5 code into this function. Additionally, check for GEN_GEN == 6 instead of < 7 in cases that won't apply to lower gens. Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Remove upload_gs_state_for_tf.Rafael Antognolli2017-07-134-60/+16
| | | | | | | | | | | | This function only emits a particular case of 3DSTATE_GS. Instead, we can do that inside genX(upload_gs_state), and later reuse part of that code for emitting gen4-5 state. There's the additional benefit of allowing us to remove gen6_gs_state.c, which was only left because of this function. Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Convert BLEND_CONSTANT_COLOR state to genxml.Rafael Antognolli2017-07-133-64/+27
| | | | | | | It's a very simple conversion, and it allows us to delete brw_cc.c. Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
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