aboutsummaryrefslogtreecommitdiffstats
path: root/src/mesa
Commit message (Collapse)AuthorAgeFilesLines
* Replace gl_framebuffer's _ColorDrawBufferMask with _ColorDrawBufferIndexesBrian2008-01-0634-216/+230
| | | | | | | Each array element is now a BUFFER_x token rather than a BUFFER_BIT_x bitmask. The number of active color buffers is specified by _NumColorDrawBuffers. This builds on the previous DrawBuffer changes and will help with drivers implementing GL_ARB_draw_buffers.
* Simplify ctx->_NumColorDrawBuffers, _ColorDrawBuffers and fix bug 13835.Brian2008-01-0626-225/+220
| | | | | | | | | | | These fields are no longer indexed by shader output. Now, we just have a simple array of renderbuffer pointers. If the shader writes to gl_FragData[i], send those colors to the N _ColorDrawBuffers. Otherwise, replicate the single gl_FragColor (or the fixed-function color) to the N _ColorDrawBuffers. A few more changes and simplifications can follow from this...
* fix depth/1 typo in glTexImage3D proxy codeBrian2008-01-051-3/+3
|
* check if span length > 0 before calling _swrast_write_rgba_span()Brian2008-01-051-5/+7
|
* i915: don't validate PS program when falling back to softwareXiang, Haihao2008-01-041-1/+2
| | | | rendering. fix #12786
* intel: some initialization for dri_bufmgr_ttmXiang, Haihao2008-01-041-0/+2
|
* [intel] Add a single-entry relocation buffer cache.Eric Anholt2008-01-031-26/+53
| | | | | | | By avoiding the repeated relocation buffer creation/map/unmap/destroy for each new batch buffer, this improves OpenArena framerates by 30%. Caching batch buffers themselves doesn't appear to be a significant performance win over this change.
* [intel] Convert relocations to not be cleared out on buffer submit.Eric Anholt2008-01-0313-417/+388
| | | | | | | | We have two consumers of relocations. One is static state buffers, which want the same relocation every time. The other is the batchbuffer, which gets thrown out immediately after submit. This lets us reduce repeated computation for static state buffers, and clean up the code by moving relocations nearer to where the state buffer is computed.
* [965] Fix some missing initialization in WM keys.Eric Anholt2008-01-031-0/+6
|
* fix fd.o bug #13761Zou Nan hai2008-01-031-2/+2
| | | | MRD computation is now changed in mesa core
* [965] Convert WM unit to use a cache key instead of brw_cache_data.Eric Anholt2008-01-022-80/+126
|
* [965] Convert VS unit to use a cache key instead of brw_cache_data.Eric Anholt2008-01-021-26/+63
|
* [965] Convert SF unit to use a cache key instead of brw_cache_data.Eric Anholt2008-01-021-47/+105
|
* [965] Convert GS unit to use a cache key instead of brw_cache_data.Eric Anholt2008-01-021-23/+62
|
* [965] Convert clip unit to use a cache key instead of brw_cache_data.Eric Anholt2008-01-021-21/+64
|
* [965] Convert CC unit to use a cache key instead of brw_cache_data.Eric Anholt2008-01-021-59/+166
|
* [965] Convert surface state to use a cache key instead of brw_cache_data.Eric Anholt2008-01-021-48/+87
|
* [965] Convert sampler state to use a cache key instead of brw_cache_data.Eric Anholt2008-01-022-59/+101
|
* Revert "[intel] Use the memory type mask containing the caching flags."Eric Anholt2008-01-021-1/+1
| | | | | | | This reverts commit 8bb9ae3693362a302206255c61f512d942df9bbf. Validating our kernel buffers with the caching off in flags but on in mask means that the kernel migrates the buffer to be uncached, which is undesired.
* [intel] Use the memory type mask containing the caching flags.Eric Anholt2008-01-021-1/+1
|
* Set correct flags mask when validating buffers.Keith Packard2008-01-021-22/+22
| | | | | | | | | | The 'mask' value used in the validation operation specifies which of the 'flags' bits are being modified. Buffer validation wants to pass the memory type and access mode (rwx) to the kernel so that the buffer will be placed correctly, and so that the right kind of fence will be created (read vs write). That means we actually want a constant mask for these operations, and not something computed from the bits coming in. The constant we want is DRM_BO_MASK_MEM | DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE | DRM_BO_FLAG_EXE.
* [965] Improve performance by including reloc target buffer pointers in keys.Eric Anholt2008-01-021-4/+11
| | | | | Without this, the WM binding tables would all collide, for example. Improves openarena performance by around 2%.
* additional stub functionsBrian2008-01-021-0/+4
|
* additional GL_COLOR_ATTACHMENTx_EXT cases (bug 13767)Brian2008-01-021-0/+8
|
* i915: Needn't adjust pixel centers. fix #12944Xiang, Haihao2008-01-022-4/+4
|
* Revert "r300: fix bug with maniadrive rendering"Dave Airlie2008-01-021-13/+13
| | | | | | this is correct, there is another issue with sw fallbacks This reverts commit cc50edbca2fd3111f9987d4117fa6656599d79dc.
* remove unneeded conditionalBrian2008-01-011-2/+3
|
* fix vbo display list memleak upon context destructionBrian2008-01-012-0/+16
|
* additional GL_COLOR_ATTACHMENTx_EXT cases (bug 13767)Brian2008-01-011-0/+8
|
* Convert to 0/1 when setting boolean uniformsBruce Merry2008-01-011-0/+7
| | | | Also add some extra tests to the shader_api regression tests
* Make use of count in _mesa_uniform_matrixBruce Merry2008-01-011-13/+25
|
* More fixes to shader_apiBruce Merry2008-01-011-7/+16
| | | | | | - return GL_INVALID_OPERATION instead of GL_INVALID_VALUE if location is bad - correct the type-checking of uniforms from my previous commit - accept location of -1 in _mesa_uniform_matrix
* Fix several bugs relating to uniforms and attributes in GLSL APIBruce Merry2008-01-011-11/+73
| | | | | | | | | | | - fix sizes for GL_FLOAT_MAT2x3 and GL_FLOAT_MAT4x3 in sizeof_glsl_type - fix size returns in _mesa_get_active_attrib - fix out-of-bounds array access to vec_types in _mesa_get_active_attrib - fix queries of matrix uniforms in _mesa_get_uniformfv - fix _mesa_get_uniformfv to only return one base, even from an array - allow location == -1 in _mesa_uniform - validate types in _mesa_uniform - allow array overruns in _mesa_uniform
* added 'get' info for framebuffer object tokensBrian2008-01-012-8/+18
|
* add 'Get' info for MAX_3D_TEXTURE_SIZE (for bug 13811)Brian2008-01-011-1/+3
|
* t_vp_build: fix temporary register allocation to minimise the allocationsHans de Goede2008-01-021-8/+11
|
* rx00: fix off by one error in tempreg checkHans de Goede2008-01-022-6/+9
|
* r300: fix bug with maniadrive renderingDave Airlie2008-01-021-13/+13
| | | | I've no idea why I added this so I'll have to spend time tracking it down
* fix fd.o bug #13847Zou Nan hai2007-12-292-2/+7
|
* Bug #13839: Fix 3D texture offset miscalculation with pixels versus bytes.Roland Scheidegger2007-12-282-3/+4
|
* i915: reset swrast state after calling swrast DrawPixels.Xiang, Haihao2007-12-271-0/+1
| | | | | | | In order to optimize DrawPixels, the i915 texenv program isn't applied to swrast DrawPixels in the i915 driver. This causes this program isn't applied to any following swrast functions. Resetting the swrast state fixes this issue. Fix #13614
* i915: apply commit a0a5e8cfc04c14873441b50f7d594ef11806b9a8 from 965.Xiang, Haihao2007-12-253-1/+28
| | | | fix #11925
* mesa: fix a bad cast in put_values_z24.Xiang, Haihao2007-12-251-1/+1
| | | | | The values passed to put_values_z24 are GLuint, not GLubyte. fix #13543
* __driConfigOptions must be PUBLIC.Adam Jackson2007-12-242-2/+2
|
* R300: RV410 SE chips have half the pipes of regular RV410Alex Deucher2007-12-241-2/+7
| | | | | This fixes 3D rendering on x700 SE chips. Reported by Kano.
* fix GL_LINE_LOOP with drivers using own render pipeline stage (#12410, #13527)Roland Scheidegger2007-12-229-9/+9
| | | | | | primitive needs to include the begin/end flags (broken since vbo-0.2). Should fix missing first/last line segment on gamma, i810, i915, mga, r200, radeon, s3v, savage, unichrome (r300 already correct). Tested on r200, fixes #13527.
* Silence compiler warnings from XML error macros.Kristian Høgsberg2007-12-211-12/+12
|
* [965] Fix and enable separate stencil.Eric Anholt2007-12-213-4/+14
| | | | | | Note that this does not enable GL_EXT_stencil_two_side, because Mesa's computed _TestTwoSide ends up respecting only STENCIL_TEST_TWO_SIDE_EXT (defaults to GL_FALSE), even if the application uses only GL 2.0 / ATI entrypoints.
* [intel] Move some pixel path support from drivers to shared.Eric Anholt2007-12-219-1245/+1249
|
* intel: cast a pointer to unsigned long, avoid potential error.Xiang, Haihao2007-12-212-2/+2
|
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-29 23:46:13 +0000