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| * r300/r500: fixup some of the register write sizesDave Airlie2008-05-201-6/+7
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| * r300: some ctrl-m's wierd.Dave Airlie2008-05-201-20/+20
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| * r300/r500: fix RS col fmt bitsDave Airlie2008-05-201-2/+2
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| * r5xx: Fixup emit_tex, add debugging info, enable temp temps.Corbin Simpson2008-05-191-65/+105
| | | | | | | | | | emit_tex now chases itself with an OUT if needed. Added airlied's dump_program, with some fixes.
| * r500: add more input srcsDave Airlie2008-05-191-16/+26
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| * r500: fix swz gets and some returnsDave Airlie2008-05-191-6/+7
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| * r500: add mask debuggingDave Airlie2008-05-191-1/+26
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| * r500: add fragment program debug dumperDave Airlie2008-05-191-0/+145
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| * r5xx: Fix magic offsets for output fifo write masks.Corbin Simpson2008-05-191-2/+2
| | | | | | | | Well, this sure explains a lot.
| * r5xx: Swap sources for CMP.Corbin Simpson2008-05-181-8/+13
| | | | | | | | Follows the same pattern as the op on r3xx/r4xx. Thanks airlied.
| * r5xx: Fix typo of epic proportions.Corbin Simpson2008-05-181-1/+1
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| * r5xx: ALU/OUT fixups.Corbin Simpson2008-05-181-56/+43
| | | | | | | | Lots of small changes. Intentionally breaks some tex stuffs.
| * r300: fixup US_OUT_FMT bitsDave Airlie2008-05-181-5/+9
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| * r500: you can have a single texcoordDave Airlie2008-05-181-2/+5
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| * r5xx: Add OPCODE_KIL.Corbin Simpson2008-05-171-0/+6
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| * r5xx: Added OPCODE_DPH.Corbin Simpson2008-05-171-0/+20
| | | | | | | | Like DP4, but with one swizzle change.
| * r5xx: Fix FRC.Corbin Simpson2008-05-171-0/+2
| | | | | | | | | | This makes tri-frc work. (Remind me again why I'm allowed near a compiler, lawl.)
| * r5xx: Fix SCS.Corbin Simpson2008-05-171-11/+21
| | | | | | | | | | Output instructions need to be marked OUT so they can write to the fifo. Also, negation doesn't work with SWZ yet.
| * r5xx: Add OPCODE_SWZ.Corbin Simpson2008-05-171-0/+4
| | | | | | | | It's so easy!
| * r5xx: Add OPCODE_SCS.Corbin Simpson2008-05-171-1/+51
| | | | | | | | It's disabled, though, because it doesn't work. I'll figure it out later...
| * r5xx: Adding more opcodes.Corbin Simpson2008-05-171-0/+82
| | | | | | | | | | | | EX2, FRC, LG2, SIN, RCP, and RSQ, if you care. All of these except FRC are like COS. This pretty much rounds out the set of opcodes which can be done in one ALU inst.
| * r5xx: First swing at OPCODE_COS.Corbin Simpson2008-05-171-0/+14
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| * r5xx: Unbreak MAX and MIN.Corbin Simpson2008-05-171-2/+2
| | | | | | | | Both of them had faulty copypasta.
| * r500: set fragprog end to correct placeDave Airlie2008-05-171-3/+4
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| * r300: SC register naming cleanupAlex Deucher2008-05-172-31/+37
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| * r500: write out the correct FP registersAlex Deucher2008-05-176-6/+43
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| * r500: default rsunit swizzle like fglrxDave Airlie2008-05-152-3/+14
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| * r500: shift tex src properlyDave Airlie2008-05-151-2/+2
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| * r500: fixup r500 rs unit texture coordinate countingDave Airlie2008-05-151-13/+15
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| * r500: remove some debuggingDave Airlie2008-05-151-3/+1
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| * r500: split output/pixel masks and emit in the correct placesDave Airlie2008-05-151-19/+20
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| * r3/500: emit RS state before VAPDave Airlie2008-05-151-3/+4
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| * r500: fixup the program allocations to be the correct sizesDave Airlie2008-05-151-10/+31
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| * r300: set screen so that context init can find out chip idsDave Airlie2008-05-151-1/+1
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| * r500: add cmp support in theoryDave Airlie2008-05-151-0/+24
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| * r500: some trivial fixups to get tri working.Dave Airlie2008-05-152-10/+14
| | | | | | | | the counter was being used one instruction over the end
| * r500: we just need to emit a colour for clear drop tex instructionDave Airlie2008-05-151-34/+1
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| * R300: clean up GA registersAlex Deucher2008-05-133-177/+177
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| * R3xx: clean up ZB registersAlex Deucher2008-05-135-186/+181
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| * R300: clean up CB registersAlex Deucher2008-05-134-67/+76
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| * R300: clean up Fog registersAlex Deucher2008-05-134-72/+71
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| * R500: fixup r300EmitClearState() FP for r5xxAlex Deucher2008-05-131-8/+19
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| * R300: cleanup FS code and fill in missing detailsAlex Deucher2008-05-136-375/+409
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| * R3xx: more PVS cleanupAlex Deucher2008-05-134-34/+32
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| * Merge branch 'r500-support' of ↵Alex Deucher2008-05-126-201/+270
| |\ | | | | | | | | | git+ssh://[email protected]/git/mesa/mesa into r500-support
| | * r500: cleanup r500 RS setupDave Airlie2008-05-072-49/+67
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| | * r500: for rectangular textures set to unscaled coordinates.Dave Airlie2008-05-071-0/+4
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| | * r5xx: Fix FP inputs. (For good?)Corbin Simpson2008-05-071-8/+59
| | | | | | | | | | | | | | | FP inputs are now counted and mapped correctly, and temps are allocated tightly and correctly.
| | * r5xx: Fix false error with DP3/DP4.Corbin Simpson2008-05-061-18/+8
| | | | | | | | | | | | | | | DP3/DP4 only takes two arguments, but tried to load three, causing a false fallback to the dumb shader.
| | * r5xx: Index inputs and temps.Corbin Simpson2008-05-062-95/+41
| | | | | | | | | | | | | | | | | | | | | | | | This is not the same as r3xx indexing. It only tries to protect inputs on the pixel stack from getting clobbered by temps or texs. Texs don't need special treatment since they read from special input regs and write to the same temp regs as ALU/FC instructions.
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