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* mesa: Use bitmask/ffs to iterate the active_samplers bitmask.Mathias Fröhlich2016-06-161-3/+5
| | | | | | | | | | | Replaces an iterate and test bit in a bitmask loop by a loop only iterating over the bits set in the bitmask. v2: Use _mesa_bit_scan{,64} instead of open coding. v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* mesa: Use bitmask/ffs to iterate the enabled textures.Mathias Fröhlich2016-06-161-15/+16
| | | | | | | | | | | Replaces an iterate and test bit in a bitmask loop by a loop only iterating over the bits set in the bitmask. v2: Use _mesa_bit_scan{,64} instead of open coding. v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* mesa: Use designated bool value to check texture unit completeness.Mathias Fröhlich2016-06-161-1/+4
| | | | | | | The change helps to use the bitmask/ffs in the next change. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* mesa: Use bitmask/ffs to iterate SamplersUsedMathias Fröhlich2016-06-161-21/+21
| | | | | | | | | | | Replaces an iterate and test bit in a bitmask loop by a loop only iterating over the bits set in the bitmask. v2: Use _mesa_bit_scan{,64} instead of open coding. v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* i965: Use bitmask/ffs to iterate used vertex attributes.Mathias Fröhlich2016-06-161-5/+5
| | | | | | | | | | | Replaces an iterate and test bit in a bitmask loop by a loop only iterating over the bits set in the bitmask. v2: Use _mesa_bit_scan{,64} instead of open coding. v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* i965: Use bitmask/ffs to iterate enabled clip planes.Mathias Fröhlich2016-06-161-10/+11
| | | | | | | | | | | Replaces an iterate and test bit in a bitmask loop by a loop only iterating over the bits set in the bitmask. v2: Use _mesa_bit_scan{,64} instead of open coding. v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* radeon/r200: Use bitmask/ffs to iterate enabled clip planes.Mathias Fröhlich2016-06-162-20/+18
| | | | | | | | | | | Replaces an iterate and test bit in a bitmask loop by a loop only iterating over the bits set in the bitmask. v2: Use _mesa_bit_scan{,64} instead of open coding. v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* mesa: Use bitmask/ffs to iterate enabled clip planes.Mathias Fröhlich2016-06-167-121/+117
| | | | | | | | | | | Replaces an iterate and test bit in a bitmask loop by a loop only iterating over the bits set in the bitmask. v2: Use _mesa_bit_scan{,64} instead of open coding. v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* mesa: Use bitmask/ffs to iterate color material attributes.Mathias Fröhlich2016-06-162-9/+12
| | | | | | | | | | | Replaces an iterate and test bit in a bitmask loop by a loop only iterating over the bits set in the bitmask. v2: Use _mesa_bit_scan{,64} instead of open coding. v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* mesa: Use bitmask/ffs to build ff fragment shader keys.Mathias Fröhlich2016-06-161-3/+7
| | | | | | | | | | | | | Replaces an iterate and test bit in a bitmask loop by a loop only iterating over the bits set in the bitmask. The bitmask used here for iteration is a combination of different enabled masks present for texture units. v2: Use _mesa_bit_scan{,64} instead of open coding. v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* mesa: Use bitmask/ffs to build ff vertex shader keys.Mathias Fröhlich2016-06-161-2/+4
| | | | | | | | | | | | | Replaces an iterate and test bit in a bitmask loop by a loop only iterating over the bits set in the bitmask. The bitmask used here for iteration is a combination of different enabled masks present for texture units. v2: Use _mesa_bit_scan{,64} instead of open coding. v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* mesa: Remove the linked list of enabled lightsMathias Fröhlich2016-06-164-22/+1
| | | | | | | Clean up after conversion to bitmasks. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* mesa: Switch to bitmask based enabled lights in gen_matypes.cMathias Fröhlich2016-06-161-3/+1
| | | | | Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* radeon/r200: Use bitmask/ffs to iterate enabled lightsMathias Fröhlich2016-06-162-41/+41
| | | | | | | | | | | | Replaces a loop that iterates all lights and test which of them is enabled by a loop only iterating over the bits set in the enabled bitmask. v2: Use _mesa_bit_scan{,64} instead of open coding. v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* nouveau: Use bitmask/ffs to iterate enabled lightsMathias Fröhlich2016-06-163-26/+38
| | | | | | | | | | | | Replaces a loop that iterates all lights and test which of them is enabled by a loop only iterating over the bits set in the enabled bitmask. v2: Use _mesa_bit_scan{,64} instead of open coding. v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* tnl: Use bitmask/ffs to iterate enabled lightsMathias Fröhlich2016-06-162-8/+21
| | | | | | | | | | | | Replaces loops that iterate all lights and test which of them is enabled by a loop only iterating over the bits set in the enabled bitmask. v2: Use _mesa_bit_scan{,64} instead of open coding. v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* mesa: Use bitmask/ffs to iterate enabled lights for ff shader keys.Mathias Fröhlich2016-06-161-13/+15
| | | | | | | | | | | | Replaces a loop that iterates all lights and test which of them is enabled by a loop only iterating over the bits set in the enabled bitmask. v2: Use _mesa_bit_scan{,64} instead of open coding. v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* mesa: Use bitmask/ffs to iterate enabled lightsMathias Fröhlich2016-06-162-14/+39
| | | | | | | | | | | | Replaces loops that iterate all lights and test which of them is enabled by a loop only iterating over the bits set in the enabled bitmask. v2: Use _mesa_bit_scan{,64} instead of open coding. v3: Use u_bit_scan{,64} instead of _mesa_bit_scan{,64}. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* mesa: Track enabled lights in a bitmaskMathias Fröhlich2016-06-163-0/+5
| | | | | | | This enables some optimizations afterwards. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* mesa: Rename CoordReplaceBits back to CoordReplace.Mathias Fröhlich2016-06-1612-17/+17
| | | | | | | | It used to be called like that and fits better with 80 columns. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* mesa: Remove the now unused CoordsReplace array.Mathias Fröhlich2016-06-163-8/+0
| | | | | | | | Now that all users are converted, remove the array. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* i965: Convert i965 to use CoordsReplaceBits.Mathias Fröhlich2016-06-163-12/+3
| | | | | | | | Switch over to use the CoordsReplaceBits bitmask. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* i915: Convert i915 to use CoordsReplaceBits.Mathias Fröhlich2016-06-161-10/+7
| | | | | | | | Switch over to use the CoordsReplaceBits bitmask. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* r200: convert r200 to use CoordsReplaceBits.Mathias Fröhlich2016-06-161-5/+2
| | | | | | | | Switch over to use the CoordsReplaceBits bitmask. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* gallium: Convert the state_tracker to use CoordsReplaceBits.Mathias Fröhlich2016-06-161-6/+2
| | | | | | | | Switch over to use the CoordsReplaceBits bitmask. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* swrast: Convert swrast to use CoordsReplaceBits.Mathias Fröhlich2016-06-161-2/+2
| | | | | | | | Switch over to use the CoordsReplaceBits bitmask. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* mesa: Add gl_point_attrib::CoordReplaceBits bitfield.Mathias Fröhlich2016-06-165-14/+26
| | | | | | | | | | | | | The aim is to replace the CoordReplace array by a bitfield. Until all drivers are converted, establish the bitfield in parallel to the CoordReplace array. v2: Fix bitmask logic. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* mesa/glsl: stop using GL shader type internallyTimothy Arceri2016-06-1610-48/+43
| | | | | | | | | | | | Instead use the internal gl_shader_stage enum everywhere. This makes things more consistent and gets rid of unnecessary conversions. Ideally it would be nice to remove the Type field from gl_shader altogether but currently it is used to differentiate between gl_shader and gl_shader_program in the ShaderObjects hash table. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Use a uniform for gl_PatchVerticesIn in the TCS on Gen8+.Kenneth Graunke2016-06-152-2/+5
| | | | | | | | | | | | | | We still need to recompile the passthrough shader when this value changes, as it also affects the output vertex count. But otherwise, we can eliminate recompiles on Gen8+. We probably want to do this for Gen7 as well, but that requires rewriting the input release code to use a loop, which is a trade-off I'd need to consider in more detail. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Alejandro Piñeiro <[email protected]> Cc: [email protected]
* glsl: Optionally lower TCS gl_PatchVerticesIn to a uniform.Kenneth Graunke2016-06-153-0/+6
| | | | | | | | | i965 has no special hardware for this, so the best way to implement this is to pass it in via a uniform. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Alejandro Piñeiro <[email protected]> Cc: [email protected]
* i965: Use a uniform for gl_PatchVerticesIn in the TES.Kenneth Graunke2016-06-151-0/+1
| | | | | | | | | | | | | | | | Fixes three GL44-CTS.tessellation_shader subtests: - max_patch_vertices - single.max_patch_vertices - tessellation_control_to_tessellation_evaluation.gl_PatchVerticesIn These use gl_PatchVerticesIn in the TES, but don't link against a TCS (which would allow the linker to lower it to a constant). We had no handling for the system value in the backend, so it would just assert fail. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Alejandro Piñeiro <[email protected]> Cc: [email protected]
* glsl: Optionally lower TES gl_PatchVerticesIn to a uniform.Kenneth Graunke2016-06-153-0/+9
| | | | | | | | | | i965 has no special hardware for this, so we need to pass this value in as a uniform (unless the TES is linked against a TCS, in which case the linker can just replace this with a constant). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Alejandro Piñeiro <[email protected]> Cc: [email protected]
* st_glsl_to_tgsi: don't read potentially uninitialized buffer variableNicolai Hähnle2016-06-151-1/+1
| | | | | | | | Found by -fsanitize=undefined. Note that this should be a harmless issue in practice because the inst->op check always dominates anyway. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* mesa/main: fix integer overflows in _mesa_image_offsetNicolai Hähnle2016-06-151-4/+4
| | | | | | | Found using -fsanitize=undefined. Cc: "11.1 11.2 12.0" <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* i965: remove type_size_vec4_times_4()Timothy Arceri2016-06-154-17/+3
| | | | | | | | type_size_vec4_times_4() was introduced as a fix in 8dcf807cb43383 however since 3810c1561 we can just use type_size_scalar() and get the actual number of outputs we need. Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: Pass gl_constant_value union into _mesa_fetch_state().Kenneth Graunke2016-06-141-3/+5
| | | | | | | | | | | | | | | | | We've had some trouble in the past with copying integers around via float pointers, as the C compiler sometimes uses x87 floating point registers to load values on 32-bit systems. Passing the gl_constant_value union should be safer. To avoid churn, this patch creates a "GLfloat *value" variable so existing uses can stay the same. Not observed to fix anything, but I was in the area adding more integer state vars, and thought it'd be wise. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Cc: [email protected]
* i965: Check return value of screen->image.loader->getBuffers (v2)Tomasz Figa2016-06-141-6/+9
| | | | | | | | | | | | | | | | | | | | The images struct is an uninitialized local variable on the stack. If the callback returns 0, the struct might not have been updated and so should be considered uninitialized. Currently the code ignores the return value, which (depending on stack contents) might end up in reading a non-zero value from images.image_mask and dereferencing further fields. Another solution would be to initialize image_mask with 0, but checking the return value seems more sensible and it is what Gallium is doing. v2: fix typos in commit message, fix indentation, remove unnecessary parentheses and pointer dereference to keep line length reasonable. Cc: 11.2 12.0 <[email protected]> Signed-off-by: Tomasz Figa <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* mesa: Make use of u_bit_scan{,64}.Mathias Fröhlich2016-06-142-5/+5
| | | | | | Reviewed-by: Brian Paul <[email protected]> Tested-by: Brian Paul <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* mesa/gallium: Move u_bit_scan{,64} from gallium to util.Mathias Fröhlich2016-06-142-74/+1
| | | | | | | | | | | | | | | The functions are also useful for mesa. Introduce src/util/bitscan.{h,c}. Move ffs function implementations from src/mesa/main/imports.{h,c}. Move bit scan related functions from src/gallium/auxiliary/util/u_math.h. Merge platform handling with what is available from within mesa. v2: Try to fix MSVC compile. Reviewed-by: Brian Paul <[email protected]> Tested-by: Brian Paul <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* i965/compiler: Bring back the INTEL_PRECISE_TRIG environment variableJason Ekstrand2016-06-132-2/+4
| | | | | | | | | | | This was removed in d9546b0c5d and replced with the precise_trig driconf option. However, we still need precise trig in the Vulkan driver so this commit brings back the environment variable and compiler->precise_trig is effectively the logical OR of the two. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96484 Reviewed-by: Kenneth Graunke <[email protected]> Cc: "12.0" <[email protected]>
* i965: Defeat the register stride checker in pull uniform messages.Samuel Iglesias Gonsálvez2016-06-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pulling DF uniforms from pull constant buffer generates messages like: send(4) g12<1>DF g12<0,1,0>F sampler ld SIMD4x2 Surface = 1 Sampler = 0 mlen 1 rlen 1 which produces GPU hangs in Cherryview/Braswell: "For 64-bit Align1 operation or multiplication of dwords in CHV, source horizontal stride must be aligned to qword." This seems to be documented in the Cherryview PRM, Volume 7, Page 843: "When source or destination datatype is 64b or operation is integer DWord multiply, regioning in Align1 must follow these rules: 1. Source and Destination horizontal stride must be aligned to the same qword." We should set the destination type to UD, D, or F so that the register stride checker doesn't notice. The destination type of send messages is basically irrelevant anyway. Cc: "12.0" <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95462 Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965: Defeat the register stride checker in URB reads.Kenneth Graunke2016-06-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pulling DF inputs from the URB generates messages like: send(8) g23<1>DF g1<8,8,1>UD urb 3 SIMD8 read mlen 1 rlen 2 { align1 1Q }; which makes the simulator angry: "For 64-bit Align1 operation or multiplication of dwords in CHV, source horizontal stride must be aligned to qword." This seems to be documented in the Cherryview PRM, Volume 7, Page 823: "When source or destination datatype is 64b or operation is integer DWord multiply, regioning in Align1 must follow these rules: 1. Source and Destination horizontal stride must be aligned to the same qword." Setting the source horizontal stride to QWord is insane, as it's the message header containing 8 URB handles in a single 32-bit DWord. Instead, we should whack the destination type to UD, D, or F so that the register stride checker doesn't notice. The destination type of send messages is basically irrelevant anyway. Cc: "12.0" <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95462 Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965: Fix issues with number of VS URB entries on Cherryview/Broxton.Kenneth Graunke2016-06-132-2/+5
| | | | | | | | | | | | | | | | Cherryview/Broxton annoyingly have a minimum number of VS URB entries of 34, which is not a multiple of 8. When the VS size is less than 9, the number of VS entries has to be a multiple of 8. Notably, BLORP programmed the minimum number of VS URB entries (34), with a size of 1 (less than 9), which is invalid. It seemed like this could be a problem in the regular URB code as well, so I went ahead and updated that to be safe. Cc: "12.0" <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965/fs: Fix regs_written for SIMD-lowered instructions some more.Francisco Jerez2016-06-131-3/+3
| | | | | | | | | | | | | | | | | ISTR having suggested this during review of the recent FP64 changes to the SIMD lowering pass, but it doesn't look like it was taken into account in the end. Using the fs_reg::component_size helper instead of this open-coded variant makes sure that the stride is taken into account correctly. Fixes at least the following piglit tests with spilling forced on (since otherwise regs_written would be calculated incorrectly and the spilling code would be rather confused about how much data needs to be spilled): spec.arb_gpu_shader_fp64.shader_storage.layout-std140-fp64-shader spec.arb_gpu_shader_fp64.shader_storage.layout-std140-fp64-mixed-shader Cc: <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965: Fix cross-primitive scratch corruption when changing the per-thread ↵Francisco Jerez2016-06-1317-18/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | allocation. I haven't found any mention of this in the hardware docs, but experimentally what seems to be going on is that when the per-thread scratch slot size is changed between two pipelined draw calls, shader invocations using the old and new scratch size setting may end up being executed in parallel, causing their scratch offset calculations to be based in a different partitioning of the scratch space, which can cause their thread-local scratch space to overlap leading to cross-thread scratch corruption. I've been experimenting with alternative workarounds, like emitting a PIPE_CONTROL with DC flush and CS stall between draw (or dispatch compute) calls using different per-thread scratch allocation settings, or avoiding reuse of the scratch BO if the per-thread scratch allocation doesn't exactly match the original. Both seem to be as effective as this workaround, but they have potential performance implications, while this should be basically for free. Fixes over 40 failures in our CI system with spilling forced on (including CTS, dEQP and Piglit failures) on a number of different platforms from Gen4 to Gen9. The 'glsl-max-varyings' piglit test seems to be able to reproduce this bug consistently in the vertex shader on at least Gen4, Gen8 and Gen9 with spilling forced on. Cc: <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Keep track of the per-thread scratch allocation in brw_stage_state.Francisco Jerez2016-06-138-49/+70
| | | | | | | | | | | | | | | | This will be used to find out what per-thread slot size a previously allocated scratch BO was used with in order to fix a hardware race condition without introducing additional stalls or memory allocations. Instead of calling brw_get_scratch_bo() manually from the various codegen functions, call a new helper function that keeps track of the per-thread scratch size and conditionally allocates a larger scratch BO. v2: Handle BO allocation manually instead of relying on brw_get_scratch_bo (Ken). Cc: <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Fix scratch overallocation if the original slot size was already a ↵Francisco Jerez2016-06-131-1/+1
| | | | | | | | | | | | | | power of two. The bitwise arithmetic trick used in brw_get_scratch_size() to clamp the scratch allocation to 1KB has the unintended side effect that it will cause us to allocate 2x the required amount of scratch space if the original per-thread scratch size happened to be already a power of two. Instead use the obvious MAX2 idiom to clamp the scratch allocation to the expected range. Cc: <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: Make TexSubImage check negative dimensions sooner.Kenneth Graunke2016-06-131-19/+43
| | | | | | | | | | | | | | | | | | | Two dEQP tests expect INVALID_VALUE errors for negative width/height parameters, but get INVALID_OPERATION because they haven't actually created a destination image. This is arguably not a bug in Mesa, as there's no specified ordering of error conditions. However, it's also really easy to make the tests pass, and there's no real harm in doing these checks earlier. Fixes: dEQP-GLES3.functional.negative_api.texture.texsubimage3d_neg_width_height dEQP-GLES31.functional.debug.negative_coverage.get_error.texture.texsubimage3d_neg_width_height v2: Drop redundant check (caught by Anuj Phogat). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i965: Fix encode_slm_size() to take a generation, not a device info.Kenneth Graunke2016-06-132-3/+4
| | | | | | | | | | | | | | | In the Vulkan driver, we have the generation number (a compile time constant) but not necessarily the brw_device_info struct. I meant to rework the function to take a generation number instead of a brw_device_info pointer to accomodate this. But I forgot, and left it taking a brw_device_info pointer, while making Vulkan pass the generation number (8, 9, ...) directly. This led to crashes. Brown paper bag fix for commit 87d062a94080373995170f51063a9649. Cc: "12.0" <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96504 Signed-off-by: Kenneth Graunke <[email protected]>
* i965: Don't leak scratch BOs for TCS/TES.Kenneth Graunke2016-06-131-0/+4
| | | | | | | These need to be freed too. Cc: "12.0" <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]>
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