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* mesa: Use the common logic for "is this baseformat a color format?"Eric Anholt2011-01-034-12/+16
| | | | | | When figuring out whether a renderbuffer should be used to set the visual bits of an FBO, we were missing important baseformats like GL_RED, GL_RG, and GL_LUMINANCE.
* mesa: Allow color renderbuffers besides just RGB and RGBA.Eric Anholt2011-01-031-2/+1
| | | | | | We did so already for textures to do ARB_fbo's GL_ALPHA/GL_LUMINANCE/etc. support and for ARB_texture_rg's GL_RED and GL_RG, but this path was missed.
* mesa: Update comment about the list of BaseFormats for gl_formats.Eric Anholt2011-01-031-3/+4
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* intel: Handle forced swrast clears before other clear bits.Eric Anholt2011-01-031-22/+20
| | | | | Fixes a potential segfault on a non-native depthbuffer, and possible accidental swrast fallback on extra color buffers.
* st/mesa: fix renderbuffer pointer check in st_Clear()Brian Paul2011-01-031-6/+2
| | | | | | Fixes http://bugs.freedesktop.org/show_bug.cgi?id=30694 NOTE: This is a candidate for the 7.9 and 7.10 branches.
* mesa: s/GLuint/gl_buffer_index/Brian Paul2011-01-032-6/+10
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* st/mesa: 80-column wrappingBrian Paul2011-01-031-2/+4
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* st/mesa: 80-column wrappingBrian Paul2011-01-031-2/+4
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* radeon: fix build on non-KMS systems.Dave Airlie2011-01-031-0/+3
| | | | Reported on irc by adamk.
* st/mesa: Handle wrapped depth buffers in st_copy_texsubimage().Henri Verbeet2010-12-311-0/+3
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* x86: Clean up header file inclusion in mmx.h.Vinson Lee2010-12-301-1/+3
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* tnl: Clean up header file inclusion in t_vertex.h.Vinson Lee2010-12-301-1/+4
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* vbo: Clean up header file inclusion in vbo.h.Vinson Lee2010-12-301-1/+4
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* tnl: Clean up header file inclusion in t_vp_build.h.Vinson Lee2010-12-302-2/+2
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* tnl: Clean up header file inclusion in tnl.h.Vinson Lee2010-12-301-1/+4
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* i965: Do lowering of array indexing of a vector in the FS.Eric Anholt2010-12-281-0/+1
| | | | | Fixes a regression in ember since switching to the native FS backend, and the new piglit tests glsl-fs-vec4-indexing-{2,3} for catching this.
* i965: Fix regression in FS comparisons on original gen4 due to gen6 changes.Eric Anholt2010-12-282-4/+32
| | | | Fixes 26 piglit cases on my GM965.
* i965: Factor out the ir comparision to BRW_CONDITIONAL_* code.Eric Anholt2010-12-281-80/+34
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* i965: Fix occlusion query on sandybridgeZhenyu Wang2010-12-281-0/+6
| | | | | | Clear target query buffer fixed occlusion query on sandybridge. https://bugs.freedesktop.org/show_bug.cgi?id=32167
* Revert "i965: upload multisample state for fragment program change"Zhenyu Wang2010-12-283-38/+25
| | | | | | | This reverts commit de6fd527a545f8344e074312544517d05573fb72. Revert this workaround as it seems the real trouble is caused by lineloop, which doesn't require GS convert on sandybridge actually.
* i965: Internally enable GL_NV_blend_square on ES2.Kenneth Graunke2010-12-271-0/+1
| | | | Hopefully should fix bug #32520.
* i965: don't spawn GS thread for LINELOOP on SandybridgeXiang, Haihao2010-12-271-1/+4
| | | | | LINELOOP is converted to LINESTRIP at the beginning of the 3D pipeline. This fixes https://bugs.freedesktop.org/show_bug.cgi?id=32596
* i965: Flatten if-statements beyond depth 16 on pre-gen6.Kenneth Graunke2010-12-271-0/+10
| | | | | | | | | | Gen4 and Gen5 hardware can have a maximum supported nesting depth of 16. Previously, shaders with control flow nested 17 levels deep would cause a driver assertion or segmentation fault. Gen6 (Sandybridge) hardware no longer has this restriction. Fixes fd.o bug #31967.
* glsl: Support if-flattening beyond a given maximum nesting depth.Kenneth Graunke2010-12-271-1/+1
| | | | | | | | | | | This adds a new optional max_depth parameter (defaulting to 0) to lower_if_to_cond_assign, and makes the pass only flatten if-statements nested deeper than that. By default, all if-statements will be flattened, just like before. This patch also renames do_if_to_cond_assign to lower_if_to_cond_assign, to match the new naming conventions.
* swrast: Clean up header file inclusion in ss_vb.h.Vinson Lee2010-12-251-1/+1
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* swrast: Clean up header file inclusion in ss_triangle.h.Vinson Lee2010-12-251-1/+1
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* swrast: Clean up header file inclusion in s_texfilter.h.Vinson Lee2010-12-251-1/+3
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* swrast: Clean up header file inclusion in s_texcombine.h.Vinson Lee2010-12-251-1/+2
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* swrast: Clean up header file inclusion in s_masking.h.Vinson Lee2010-12-251-1/+4
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* intel: Only do frame throttling at glFlush time when using frontbuffer.Eric Anholt2010-12-251-1/+2
| | | | | | | | | | | This is the hack for input interactivity of frontbuffer rendering (like we do for backbuffer at intelDRI2Flush()) by waiting for the n-2 frame to complete before starting a new one. However, for an application doing multiple contexts or regular rebinding of a single context, this would end up lockstepping the CPU to the GPU because every unbind was considered the end of a frame. Improves WOW performance on my Ironlake by 48.8% (+/- 2.3%, n=5)
* swrast: Clean up header file inclusion in s_logic.h.Vinson Lee2010-12-241-1/+3
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* swrast: Clean up header file inclusion in s_fragprog.h.Vinson Lee2010-12-241-1/+2
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* swrast: Clean up header file inclusion in s_span.h.Vinson Lee2010-12-241-1/+6
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* swrast: Clean up header file inclusion in s_fog.h.Vinson Lee2010-12-241-1/+2
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* swrast: Clean up header file inclusion in s_depth.h.Vinson Lee2010-12-241-1/+4
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* swrast: Clean up header file inclusion in s_blend.h.Vinson Lee2010-12-241-1/+4
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* swrast: Clean up header file inclusion in s_atifragshader.h.Vinson Lee2010-12-241-1/+1
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* swrast: Clean up header file inclusion in s_alpha.h.Vinson Lee2010-12-241-2/+2
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* swrast: Clean up header file inclusion in s_accum.h.Vinson Lee2010-12-241-1/+2
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* swrast: Clean up header file inclusion in s_aatriangle.h.Vinson Lee2010-12-241-1/+1
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* swrast: Clean up header file inclusion in s_aaline.h.Vinson Lee2010-12-241-1/+1
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* st/mesa: Clean up header file inclusion in st_mesa_to_tgsi.h.Vinson Lee2010-12-241-7/+9
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* st/mesa: Clean up header file inclusion in st_gen_mipmap.h.Vinson Lee2010-12-241-1/+3
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* mesa: Assert format is not MESA_FORMAT_COUNT in _mesa_format_to_type_and_comps.Vinson Lee2010-12-231-1/+4
| | | | The case of format being MESA_FORMAT_COUNT should never occur.
* i965: use align1 access mode for instructions with execSize=1 in VSXiang, Haihao2010-12-241-0/+2
| | | | | All operands must be 16-bytes aligned in aligh16 mode. This fixes l_xxx.c in oglconform.
* i965: fix register region descriptionXiang, Haihao2010-12-241-1/+1
| | | | | This fixes brw_eu_emit.c:179: validate_reg: Assertion `width == 1' failed.
* mesa: Assert _mesa_DeleteFragmentShaderATI doesn't ever free static DummyShader.Vinson Lee2010-12-231-0/+1
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* intel: Remove unnecessary headers.Vinson Lee2010-12-232-2/+0
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* mesa/st: set the color write cbuf property for fragColor writesDave Airlie2010-12-241-0/+5
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* i965: Remove unnecessary headers.Vinson Lee2010-12-231-2/+0
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