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* i965/fs: Simplify FS_OPCODE_SET_SAMPLE_ID stride mashing a bit.Kenneth Graunke2014-02-111-2/+1
| | | | | | | | stride(brw_vec1_reg(...) ...) takes some register, changes the strides, then changes the strides again. Let's do it once. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* st/mesa: add support for GL_ARB_viewport_array (v0.2)Dave Airlie2014-02-115-56/+73
| | | | | | | | | | this just ties the mesa code to the pre-existing gallium interface, I'm not sure what to do with the CSO stuff yet. 0.2: fix min/max bounds Acked-by: Ilia Mirkin <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* st/mesa: add support for viewport index semanticDave Airlie2014-02-111-0/+9
| | | | | | | This adds GS output and FS input support, even though FS input support isn't supported until GLSL 4.30 from what I can see. Signed-off-by: Dave Airlie <[email protected]>
* i965: Program 2x MSAA sample positions.Kenneth Graunke2014-02-103-4/+16
| | | | | | | | | There are only two sensible placements for 2x MSAA samples - and one is the mirror image of the other. I chose (0.25, 0.25) and (0.75, 0.75). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965: Store 4x MSAA sample positions in a scalar value, not an array.Kenneth Graunke2014-02-103-4/+4
| | | | | | | | Storing a single value in an array is rather pointless. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965: Duplicate less code in GetSamplePositions driver hook.Kenneth Graunke2014-02-101-11/+12
| | | | | | | | | | | | The 4x and 8x cases contained identical code for extracting the X and Y sample offset values and converting them from U0.4 back to float. Without this refactoring, we'd have to duplicate it a third time in order to support 2x MSAA. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* mesa: Fix MESA_FORMAT_Z24_UNORM_S8_UINT vs. X8_UINT mix-up.Kenneth Graunke2014-02-0933-103/+103
| | | | | | | | | | | | | | | | | | | | In commit eeed49f5f290793870c60b5b635b977a732a1eb4, Mark accidentally renamed MESA_FORMAT_S8_Z24 to MESA_FORMAT_Z24_UNORM_X8_UINT and MESA_FORMAT_X8_Z24 to MESA_FORMAT_Z24_UNORM_S8_UINT, reversing their sense. The commit message was correct, but what sed commands actually got run didn't match that. This patch swaps the two enum names, reversing them. This should undo the damage, but might break things if people have manually fixed a few instances in the meantime... Mark's commit also failed to mention renames: s/MESA_FORMAT_ARGB2101010_UINT\b/MESA_FORMAT_B10G10R10A2_UINT/g s/MESA_FORMAT_ABGR2101010\b/MESA_FORMAT_R10G10B10A2_UNORM/g but those seem okay. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* mesa: remove duplicated init of MaxViewportsMaxence Le Doré2014-02-091-3/+0
| | | | | | | Already declared 5 lines before. Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* gallium: add geometry shader output limitsGrigori Goronzy2014-02-091-0/+2
| | | | | | | | v2: adjust limits for radeonsi and llvmpipe v3: add documentation Cc: "10.1" <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* mesa: Removed unnecessary check for NULL pointer when freeing memorySiavash Eliasi2014-02-091-2/+1
| | | | | | | | | Note that it is OK to pass NULL pointers to this function since this commit: mesa: modified _mesa_align_free() to accept NULL pointer http://cgit.freedesktop.org/mesa/mesa/commit/?id=f0cc59d68a9f5231e8e2111393a1834858820735 Reviewed-by: Marek Olšák <[email protected]>
* mesa: update assertion in detach_shader() for geom shadersBrian Paul2014-02-081-0/+1
| | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74723 Cc: "10.0" "10.1" <[email protected]> Tested-by: Andreas Boll <[email protected]>
* mesa: allocate gl_debug_state on demandBrian Paul2014-02-089-153/+274
| | | | | | | | | | | | We don't need to allocate all the state related to GL_ARB_debug_output until some aspect of that extension is actually needed. The sizeof(gl_debug_state) is huge (~285KB on 64-bit systems), not even counting the 54(!) hash tables and lists that it contains. This change reduces the size of gl_context alone from 431KB bytes to 145KB bytes on 64-bit systems and from 277KB bytes to 78KB bytes on 32-bit systems. Reviewed-by: Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: trivial clean-ups in errors.cBrian Paul2014-02-081-41/+84
| | | | | | | Whitespace changes, 78-column rewrapping, comment clean-ups, add some braces, etc. Reviewed-by: Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: remove _mesa_ prefix from some static functionsBrian Paul2014-02-081-27/+23
| | | | Reviewed-by: Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Label JIP and UIP in Broadwell shader disassembly.Kenneth Graunke2014-02-071-2/+6
| | | | | | | This makes it obvious which number is which. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Don't disassemble UIP field for Broadwell WHILE instructions.Kenneth Graunke2014-02-071-2/+1
| | | | | | | The WHILE instruction doesn't have UIP. It only has JIP. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Don't print source registers for Broadwell flow control.Kenneth Graunke2014-02-071-13/+14
| | | | | | | | | | | The bits which normally contain the source register descriptions actually contain the JIP/UIP jump targets, which we already printed. Interpreting JIP/UIP as source registers results in some really creepy looking output, like IF statements with acc14.4<0,1,0>UD sources. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Fix fast depth clear values on Broadwell.Kenneth Graunke2014-02-071-1/+4
| | | | | | | | | | | | | | Broadwell's 3DSTATE_CLEAR_PARAMS packet expects a floating point value regardless of format. This means we need to stop converting it to UNORM. Storing the value as float would make sense, but since we already have a uint32_t field, this patch continues shoehorning it into that. In a sense, this makes mt->depth_clear_value the DWord you emit in the packet, rather than the clear value itself. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Enable ARB_texture_gather for one component on Gen6.Chris Forbes2014-02-082-1/+3
| | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/vec4: Emit shader w/a for Gen6 gatherChris Forbes2014-02-082-0/+32
| | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Emit shader w/a for Gen6 gatherChris Forbes2014-02-082-0/+35
| | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Add surface format overrides for Gen6 gatherChris Forbes2014-02-081-5/+32
| | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Add Gen6 gather wa to sampler keyChris Forbes2014-02-082-0/+32
| | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Add some informative debug when the X Server botches DRI2 GetBuffers.Eric Anholt2014-02-071-1/+11
| | | | | | | | We've had various bug reports over the years where miptrees are missing, and when I screwed it up while adding DRI2 to the modesetting driver, I figured I should put the info necessary for debug here. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Remove redundant check in blitter-based glBlitFramebuffer().Eric Anholt2014-02-071-10/+0
| | | | | | | The intel_miptree_blit() code checks the format for us now, plus it handles xrgb vs argb for us. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Fix Gen8+ disassembly of half float subregister numbers.Kenneth Graunke2014-02-071-0/+1
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Use the new brw_load_register_mem helper for draw indirect.Kenneth Graunke2014-02-071-31/+22
| | | | | | | | | | | This makes it work on Broadwell, too. v2: Drop bogus double write to 3DPRIM_BASE_VERTEX register (caught by Chris Forbes). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965: Implement a brw_load_register_mem helper function.Kenneth Graunke2014-02-072-0/+32
| | | | | | | | | | | | This saves some boilerplate and hides the OUT_RELOC/OUT_RELOC64 distinction. Placing the function in intel_batchbuffer.c is rather arbitrary; there wasn't really an obvious place for it. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965: Fix INTEL_DEBUG=vs for fixed-function/ARB programs.Kenneth Graunke2014-02-072-4/+4
| | | | | | | | | | | Since commit 9cee3ff562f3e4b51bfd30338fd1ba7716ac5737, INTEL_DEBUG=vs has caused a NULL pointer dereference for fixed-function/ARB programs. In the vec4 generators, "prog" is a gl_program, and "shader_prog" is the gl_shader_program. This is different than the FS visitor. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* st/mesa: avoid sw fallback for getting/decompressing texturesBrian Paul2014-02-071-1/+3
| | | | | | | | | | | If st_GetTexImage() is to decompress the texture, avoid the fallback path even if prefer_blit_based_texture_transfer = false. For drivers that returned PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER = 0, we were always taking the fallback path for texture decompression rather than rendering a quad. The later is a lot faster. Cc: "10.0" "10.1" <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* i965: Add missing null check in fs_visitor::dead_code_eliminate_local()Juha-Pekka Heikkila2014-02-071-0/+4
| | | | | Signed-off-by: Juha-Pekka Heikkila <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* main/get: support ARB_gpu_shader5Jordan Justen2014-02-065-1/+26
| | | | | | | | If a driver enables ARB_gpu_shader5 and sets Const.MaxVertexSteams >= 4, then piglit's arb_gpu_shader5-minmax test should now pass. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* st/vdpau: add flush on unmapChristian König2014-02-061-0/+4
| | | | | | | | Flush the context when we unmap a buffer, otherwise VDPAU might start rendering the next frame while we still reference that buffer. Signed-off-by: Christian König <[email protected]> Tested-by: StrangeNoises ([email protected])
* gallium: remove PIPE_USAGE_STATICMarek Olšák2014-02-061-3/+2
| | | | Reviewed-by: Brian Paul <[email protected]>
* st/mesa: fix crash when a shader uses a TBO and it's not boundMarek Olšák2014-02-061-0/+6
| | | | | | | | | This binds a NULL sampler view in that case. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74251 Cc: "10.1" "10.0" <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* i965/vs: Fix typo in brw_compute_vue_mapChris Forbes2014-02-051-1/+1
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Fix register types in dump_instructions().Kenneth Graunke2014-02-054-2/+32
| | | | | | | | | | | | | | This regressed when I converted BRW_REGISTER_TYPE_* to be an abstract type that doesn't match the hardware description. dump_instruction() was using reg_encoding[] from brw_disasm.c, which no longer matches (and was incorrect for Gen8+ anyway). This patch introduces a new function to convert the abstract enum values into the letter suffix we expect. Signed-off-by: Kenneth Graunke <[email protected]> Reported-by: Matt Turner <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/fs: Assume FBO rendering in precompile if MRT.Chris Forbes2014-02-061-4/+5
| | | | | | | | If multiple color outputs are written, this shader is unlikely to be useful with a winsys framebuffer. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Guess nr_color_regions better in precompileChris Forbes2014-02-061-1/+3
| | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Move intel_prepare_render() above first buffer accessKristian Høgsberg2014-02-052-4/+4
| | | | | | | | | | | | | | The driver is supposed to ensure buffers before any drawing operation, but in do_blit_drawpixels() and do_blit_copypixels() we inspect the buffer format before calling intel_prepare_render(). That was covered up by the unconditional call to intel_prepare_render() in intelMakeCurrent(), but we now only do this on the initial intelMakeCurrent call for a context (to get the size for the initial viewport values). https://bugs.freedesktop.org/show_bug.cgi?id=74083 Signed-off-by: Kristian Høgsberg <[email protected]> Tested-by: Alexander Monakov <[email protected]>
* st/mesa: add MESA_SHADER_COMPUTE case in shader_stage_to_ptarget()Brian Paul2014-02-051-0/+2
| | | | Silences compiler warning. Trivial.
* mesa: re-wrap, fix-up comment text in formats.hBrian Paul2014-02-051-14/+19
| | | | | Wrap to 78 columns, fix comment formatting. Trivial.
* i965/cs: Allow ARB_compute_shader to be enabled via env var.Paul Berry2014-02-052-1/+13
| | | | | | | | | | This will allow testing of compute shader functionality before it is completed. To enable ARB_compute_shader functionality in the i965 driver, set INTEL_COMPUTE_SHADER=1. Reviewed-by: Jordan Justen <[email protected]>
* i965/cs: Create the brw_compute_program struct, and the code to initialize it.Paul Berry2014-02-052-0/+19
| | | | | | v2: Fix comment. Reviewed-by: Jordan Justen <[email protected]>
* main/cs: Implement query for COMPUTE_WORK_GROUP_SIZE.Paul Berry2014-02-051-0/+18
| | | | | | v2: Improve error message. Reviewed-by: Jordan Justen <[email protected]>
* mesa/cs: Handle compute shader local size during linking.Paul Berry2014-02-052-0/+24
| | | | Reviewed-by: Jordan Justen <[email protected]>
* glsl/cs: Handle compute shader local_size_{x,y,z} declaration.Paul Berry2014-02-051-0/+11
| | | | Reviewed-by: Jordan Justen <[email protected]>
* mesa/cs: Implement MAX_COMPUTE_WORK_GROUP_COUNT constant.Paul Berry2014-02-053-0/+12
| | | | | | | | v2: Document that the 3-element array MaxComputeWorkGroupCount is indexed by dimension. Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* mesa/cs: Implement MAX_COMPUTE_WORK_GROUP_INVOCATIONS constant.Paul Berry2014-02-054-0/+6
| | | | | | | | Reviewed-by: Matt Turner <[email protected]> v2: Use CONTEXT_INT rather than CONTEXT_ENUM. Reviewed-by: Jordan Justen <[email protected]>
* mesa/cs: Implement MAX_COMPUTE_WORK_GROUP_SIZE constant.Paul Berry2014-02-053-0/+16
| | | | | | | | v2: Document that the 3-element array MaxComputeWorkGroupSize is indexed by dimension. Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
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