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* xlib: fix memory leak on Display closeJohn Sheu2016-04-122-1/+2
* st/mesa: Replace GLvoid with voidJakob Sinclair2016-04-125-26/+26
* gallium: Add capability for ARB_robust_buffer_access_behavior.Bas Nieuwenhuizen2016-04-121-0/+1
* mesa: Expose the ARB_robust_buffer_access_behavior extension.Bas Nieuwenhuizen2016-04-123-1/+3
* main: rework the compatibility check of visuals in glXMakeCurrentMiklós Máté2016-04-121-30/+12
* st/mesa: fix memleak in glDrawPixels cache codeBrian Paul2016-04-121-5/+18
* mesa: Use STATIC_ASSERT whenever possible.Jose Fonseca2016-04-121-1/+1
* gallium: pause queries for all meta opsMarek Olšák2016-04-122-0/+2
* dri/i965: extend GLES3 sRGB workaround to cover all formatsHaixia Shi2016-04-121-4/+3
* i965: Add autogenerated 'brw_nir_trig_workarounds.c' to gitignoreEduardo Lima Mitev2016-04-121-0/+1
* i965: Port INTEL_PRECISE_TRIG=1 to NIR.Kenneth Graunke2016-04-117-28/+58
* i965: Pass brw_compiler into brw_preprocess_nir() instead of is_scalar.Kenneth Graunke2016-04-112-3/+6
* st/mesa: replace _mesa_sysval_to_semantic table with functionBrian Paul2016-04-113-68/+69
* nir/lower_system_values: Add support for several computed valuesJason Ekstrand2016-04-111-1/+2
* mesa: add missing header to the tarballEmil Velikov2016-04-111-0/+1
* mesa: automake: update and reuse X86_SSE41_FILES listEmil Velikov2016-04-112-5/+5
* i965: fix struct type in commentTimothy Arceri2016-04-111-1/+1
* i965: enable OES_texture_buffer on gen7+Ilia Mirkin2016-04-101-0/+1
* i965/disasm: Decode per-slot offsets.Kenneth Graunke2016-04-091-0/+5
* i965/disasm: Decode "channel mask present" bit correctly.Kenneth Graunke2016-04-091-4/+15
* i965/disasm: Simplify the URB opcode printing with ?:.Kenneth Graunke2016-04-091-7/+6
* i965/tiled_memcopy: Get rid of the direction parameter to get_memcpyJason Ekstrand2016-04-085-22/+5
* i965/tiled_memcpy: Rework the RGBA -> BGRA mem_copy functionsJason Ekstrand2016-04-081-76/+63
* i965/tiled_memcopy: Add aligned mem_copy parameters to the [de]tiling functionsJason Ekstrand2016-04-081-32/+43
* i965: Check eu/subslices are > 0Ben Widawsky2016-04-081-1/+1
* i965: Fix eu/subslice warningBen Widawsky2016-04-081-11/+23
* i965: Extract SSEU configuration infoBen Widawsky2016-04-081-14/+21
* st/mesa: fix glReadBuffer() assertion failureBrian Paul2016-04-081-0/+2
* st/glsl_to_tgsi: make samplers_used an uint32_t (v2)Nicolai Hähnle2016-04-071-3/+5
* mesa/st: Update framebuffer state with no.of samples,layersEdward O'Callaghan2016-04-071-3/+5
* mesa/st: Set _NumSamples in update_framebuffer_state()Edward O'Callaghan2016-04-071-0/+46
* gallium: Obtain ARB_framebuffer_no_attachment constantsEdward O'Callaghan2016-04-071-0/+28
* mesa/st: Use _mesa_geometric_ functions appropriatelyEdward O'Callaghan2016-04-074-8/+15
* mesa: Add comment to framebuffer_parameteri()Edward O'Callaghan2016-04-071-0/+5
* i965/sf_state: Pull flat_enables out of prog_dataJason Ekstrand2016-04-064-27/+5
* i965/fs: Add a flat_inputs field to prog_dataJason Ekstrand2016-04-062-0/+37
* brw/device_info: Add a helper for getting a device nameJason Ekstrand2016-04-062-0/+13
* i965/fs_surface_builder: Mask signed integers after conversionJason Ekstrand2016-04-061-0/+18
* i965/fs: Make the repclear shader support either a uniform or a flat inputJason Ekstrand2016-04-061-5/+18
* i965: Move get_hw_prim_for_gl_prim to brw_util.cJason Ekstrand2016-04-062-29/+28
* drirc: add a workaround for blackness in WarsowMarek Olšák2016-04-061-0/+8
* mesa: remove unused IsShaderStorage fieldTimothy Arceri2016-04-061-5/+0
* glsl: fully split apart buffer block arraysTimothy Arceri2016-04-065-58/+19
* i965/fs: Move the code for load/store_shared to emit_cs_intrinsicJason Ekstrand2016-04-041-76/+76
* i965/nir: Provide a default LOD for buffer texturesJason Ekstrand2016-04-042-0/+8
* i965: Fix invalid pointer read in dead_control_flow_eliminate().Kenneth Graunke2016-04-041-0/+4
* i965: Make bblock_t::next and friends return NULL at sentinels.Kenneth Graunke2016-04-042-1/+13
* i965/peephole_ffma: Only match a mul+add if none of the ops are exactJason Ekstrand2016-04-041-0/+11
* i965: Add an INTEL_PRECISE_TRIG=1 option to fix SIN/COS output range.Kenneth Graunke2016-04-044-4/+36
* i965: Allow 8x MSAA on >= 64bpp formats on Gen8+.Kenneth Graunke2016-04-041-1/+2