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* i965/clear: Quantize the depth clear value based on the formatJason Ekstrand2017-08-211-2/+12
| | | | | | | | | | | | | | | | | | In f9fd976e8adba733b08d we changed the clear value to be stored as an isl_color_value. This had the side-effect same clear value check is now happening directly between the f32[0] field of the isl_color_value and ctx->Depth.Clear. This isn't what we want for two reasons. One is that the comparison happens in floating point even for Z16 and Z24 formats. Worse than that, ctx->Depth.Clear is a double so, even for 32-bit float formats, we were comparing as doubles and not floats. This means that the test basically always fails for anything other than 0.0f and 1.0f. This caused a slight performance regression in Lightsmark 2008 because it was using a depth clear value of 0.999 which can't be stored in a 32-bit float so we were doing unneeded resolves. Reviewed-by: Kenneth Graunke <[email protected]> Bugzilla: https://bugs.freedesktop.org/101678 Cc: "17.2" <[email protected]>
* mesa/st: simplify some UBO index logicTimothy Arceri2017-08-221-3/+2
| | | | Reviewed-by: Marek Olšák <[email protected]>
* i965: enable STD430 packing by default on IVB+Timothy Arceri2017-08-221-0/+16
| | | | Reviewed-by: Jason Ekstrand <[email protected]>
* glsl: pass UseSTD430AsDefaultPacking to where it will be usedTimothy Arceri2017-08-221-2/+4
| | | | | | | Here we also make use of the UseSTD430AsDefaultPacking constant and call the new get_internal_ifc_packing() helper. Reviewed-by: Marek Olšák <[email protected]>
* mesa: add UseSTD430AsDefaultPacking constantTimothy Arceri2017-08-221-0/+9
| | | | | | | This will be used to enable the STD430 layout as the default for UBOs and SSBOs with layouts of shared/packed rather than STD140. Reviewed-by: Marek Olšák <[email protected]>
* mesa: optimize _mesa_attr_zero_aliases_vertex()Brian Paul2017-08-213-12/+22
| | | | | | | | | | | After the context is initialized, the API and context flags won't change. So, we can compute whether vertex attribute 0 aliases vertex position just once. This should make the glVertexAttrib*() functions a little quicker. Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* vbo: use new _is_vertex_position() helper in vbo_attrib_tmp.hBrian Paul2017-08-211-36/+46
| | | | | | | Makes the code a bit more understandable. Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* vbo: make vbo_bind_arrays() staticBrian Paul2017-08-212-3/+1
| | | | | Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* mesa: formatting clean-up in syncobj.cBrian Paul2017-08-211-10/+13
| | | | Line wrap to 78 columns, etc. Trivial.
* mesa: fix ES only draw if we have vertex positionsTimothy Arceri2017-08-221-2/+2
| | | | | | | | | | | | This code was separated from the validation code so it could use used with KHR_no_error paths. The return values were inverted to reflect the name of the helper, but here the condtion was mistakenly inverted rather than the return value. Fixes: 4df2931a87fe (mesa/vbo: move some Draw checks out of validation) Reported-by: Brian Paul <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* glsl: Remove unused private fieldsMatt Turner2017-08-211-2/+1
| | | | Reviewed-by: Jordan Justen <[email protected]>
* mesa: Don't compare unsigned for < 0Matt Turner2017-08-211-1/+1
| | | | | | | | | | | | | The INTEL_performance_query spec says "Performance counter id 0 is reserved as an invalid counter." GLuint counterid_to_index(GLuint counterid) just returns counterid - 1, so with unsigned overflow rules, it will generate 0xFFFFFFFF given an input of 0. 0xFFFFFFFF will trigger the counterIndex >= queryNumCounters check, so the code worked as is. It just contained a useless comparison. Reviewed-by: Jordan Justen <[email protected]>
* i965/bufmgr: s/BO_ALLOC_FOR_RENDER/BO_ALLOC_BUSY/Jason Ekstrand2017-08-204-19/+18
| | | | | | | | | | "Alloc for render" is a terrible name for a flag because it means basically nothing. What the flag really does is allocate a busy BO which someone theorized at one point in time would be more efficient if you're planning to immediately render to it. If the flag really means "alloc a busy BO" we should just call it that. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/tex: Change the flags type on create_for_teximageJason Ekstrand2017-08-201-1/+1
| | | | | | This matches the actual function declaration. Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: only copy requested compressed teximage cubemap facesChristoph Haag2017-08-201-2/+2
| | | | | | | | | This is analogous to commit 2259b11 which only fixed the regular case Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102308 Signed-off-by: Christoph Haag <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> Cc: [email protected]
* i965/tex: Don't pass samples to miptree_create_for_teximageJason Ekstrand2017-08-191-1/+1
| | | | | | | | | | | | | | | | | In 76e2f390f9863a35, when Topi switched num_samples from 0 to 1 for single-sampled, he accidentally switched the last parameter in the call to miptree_create_for_teximage from 0 to 1 thinking it was num_samples when it was actually layout_flags. Switching from 0 to 1 added the MIPTREE_LAYOUT_ACCELERATED_UPLOAD flag which causes us to allocate a busy BO instead of an idle one. This caused the subsequent CPU upload to consistently stall. The end result was a 15% performance drop in the SynMark v7 DrvRes microbenchmark. This restores the old behavior and fixes the performance regression. Reviewed-by: Topi Pohjolainen <[email protected]> Fixes: 76e2f390f9863a356d1419982dec705260d67eff Bugzilla: https://bugs.freedesktop.org/102260 Cc: [email protected]
* i965: Use ISL for emitting null surface states.Kenneth Graunke2017-08-197-351/+49
| | | | | | | We handle the Sandybridge multisampled 2D surface hack here, rather than in ISL, because it requires allocating a BO, and is kind of messy. Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Remove tabs in intel_batchbuffer.c.Kenneth Graunke2017-08-181-7/+7
| | | | | | | Our coding style is to use spaces. Some of this was also messed up during my bufmgr import series. (Trivial, just whitespace changes.)
* i965/miptree: Return NONE from texture_aux_usage when fully resolvedJason Ekstrand2017-08-181-1/+14
| | | | | | | | | | | This little optimization improves the performance of SynMark v7 TexFilterTri by almost 10% on Sky Lake GT4 among other improvements. We've been doing it for some time but somehow it got dropped during the miptree refactoring. Reviewed-by: Kenneth Graunke <[email protected]> Bugzilla: https://bugs.freedesktop.org/102258 Cc: "17.2" <[email protected]>
* i965: Stop looking at NewDriverState when emitting 3DSTATE_URBJason Ekstrand2017-08-183-5/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | Looking at NewDriverState is not safe in general. The state atom system is set up to ensure that new bits that get added to NewDriverState get accumulated into the set of bits used when emitting atoms but it doesn't go the other way. If we read NewDriverState, we may not get the full picture because the per-pipeline state (3D or compute) does not get added to NewDriverState before state emit is done. It's especially dangerous to do this from BLORP (either explicitly or implicitly when BLORP calls gen7_upload_urb) because that does not happen during one of the normal state upload paths. This commit solves the problem by whacking all of the per-shader-stage URB sizes to zero whenever we change the total URB size. We still have to flag BRW_NEW_URB_SIZE to ensure that the gen7_urb atom triggers but the actual decision in gen7_upload_urb can now be based entirely on URB sizes rather than on state atoms. This also makes BLORP correct because it just asks for a new URB config whenever the vsize is too small and so any change to the total URB size will trigger blorp to re-emit as well because 0 < vs_entry_size. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Bugzilla: https://bugs.freedesktop.org/102289 Cc: [email protected]
* i965: Mark all EGLimages as non-coherent.Kenneth Graunke2017-08-181-5/+3
| | | | | | | | | | | | | | | | EGLimages are shared with external users, and we don't know what they're going to do with them. They might scan them out. They might access them in a way that doesn't work with our explicit clflushing. It's safest to simply mark them non-coherent. Chris Wilson caught this problem and wrote a similar (though less aggressive) patch to solve it; the miptree code has since undergone a lot of refactoring so I had to rewrite it. Cc: "17.2" <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Chris Wilson <[email protected]>
* i965: Fix missing newlines in perf_debug messages.Kenneth Graunke2017-08-172-3/+3
| | | | perf_debug() doesn't append a newline for you.
* st/mesa: remove Windows hack for glFinishBrian Paul2017-08-161-12/+0
| | | | | | | | | | | | | | I see no evidence that opengl32.dll's wglSwapBuffers calls glFinish. It looks like Jose removed that dependency years ago, but this hack remained. Removing this code also fixes the Piglit sync_api test since commit eceb6710024716. No piglit regressions. No glretrace regressions, per Charmaine. Fixes VMware bug 1937990. Reviewed-by: Charmaine Lee <[email protected]>
* st/mesa: fix a null pointer accessFrank Richter2017-08-161-1/+1
| | | | | | | | Fixes crash with llvmpipe on Windows. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102148 Cc: [email protected] Reviewed-by: Brian Paul <[email protected]>
* i965: Alphabetize TCS image dirty bitsKenneth Graunke2017-08-161-1/+1
| | | | Trivial.
* i965: Always allow CPU readback of the scanout on LLC platformsChris Wilson2017-08-161-1/+15
| | | | | | | | | LLC platforms are magic in that reads from the CPU are always cache coherent, or rather GPU writes that bypass LLC do still invalidate the appropriate cache line. Cc: "17.2" <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: make sure check_and_emit_atom gets inlinedTapani Pälli2017-08-161-1/+1
| | | | | | | | | | | | | | Improves performance of 3DMark "Ice Storm Unlimited" benchmark by 1-2% on Apollolake (on Android-IA using clang 3.8.256229). Change is based on the performance profiling work and results by Aravindan Muthukumar and Yogesh Marathe. Signed-off-by: Tapani Pälli <[email protected]> Signed-off-by: Aravindan Muthukumar <[email protected]> Signed-off-by: Yogesh Marathe <[email protected]> Reviewed-by: Scott D Phillips <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* mesa: count uniform against storage when its bindlessTimothy Arceri2017-08-151-5/+13
| | | | | | | | | Gallium drivers use this code path so we need to account for bindless after all. Fixes: 365d34540f33 ("mesa: correctly calculate the storage offset for i915") Reviewed-by: Marek Olšák <[email protected]>
* st/mesa: correctly calculate the storage offsetTimothy Arceri2017-08-154-2/+165
| | | | | | | | | | When generating the storage offset for struct members we need to skip opaque types as they no longer have backing storage. Fixes: fcbb93e86024 ("mesa: stop assigning unused storage for non-bindless opaque types") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101983 Reviewed-by: Dave Airlie <[email protected]>
* mesa: correctly calculate the storage offset for i915Timothy Arceri2017-08-151-3/+1
| | | | | | | | | | | | When generating the storage offset for struct members we need to skip opaque types as they no longer have backing storage. Fixes: fcbb93e86024 ("mesa: stop assigning unused storage for non-bindless opaque types") V2: simplify since bindless will never be supported in this code Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101983 Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Advertise the CCS modifierBen Widawsky2017-08-141-4/+40
| | | | | | | | | | | | | | | | | | | | | | | | v2: Rename modifier to be more smart (Jason) FINISHME: Use the kernel's final choice for the fb modifier bwidawsk@norris2:~/intel-gfx/kmscube (modifiers $) ~/scripts/measure_bandwidth.sh ./kmscube none Read bandwidth: 603.91 MiB/s Write bandwidth: 615.28 MiB/s bwidawsk@norris2:~/intel-gfx/kmscube (modifiers $) ~/scripts/measure_bandwidth.sh ./kmscube ytile Read bandwidth: 571.13 MiB/s Write bandwidth: 555.51 MiB/s bwidawsk@norris2:~/intel-gfx/kmscube (modifiers $) ~/scripts/measure_bandwidth.sh ./kmscube ccs Read bandwidth: 259.34 MiB/s Write bandwidth: 337.83 MiB/s v2: Move all references to the new fourcc code(s) to this patch. v3: Rebase, remove Yf_CCS (Daniel) Signed-off-by: Ben Widawsky <[email protected]> Signed-off-by: Jason Ekstrand <[email protected]> Acked-by: Daniel Stone <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/miptree: More conservatively resolve external imagesJason Ekstrand2017-08-143-1/+47
| | | | | | | | | Instead of always doing a full resolve, only resolve the bits that are needed. This means that we only do a partial resolve when the miptree modifier is I915_FORMAT_MOD_Y_TILED_CCS. Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965: Pretend that CCS modified images are two planesBen Widawsky2017-08-141-21/+34
| | | | | | | | | | | | | | | | v2: move is_aux into if block. (Jason) Use else block instead of goto (Jason) v3: Fix up logic for is_aux (Ben) Fix up size calculations and add FIXME (Ben) v4 (Jason Ekstrand): Use the aux_pitch in the image instead of calculating it Signed-off-by: Ben Widawsky <[email protected]> Acked-by: Daniel Stone <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/screen: Support import and export of surfaces with CCSJason Ekstrand2017-08-141-8/+71
| | | | | Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/miptree: Allocate mcs_buf for an image's CCSBen Widawsky2017-08-141-4/+91
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This code will disable actually creating these buffers for the scanout, but it puts the allocation in place. Primarily this patch is split out for review, it can be squashed in later if preferred. v2: assert(mt->offset == 0) in ccs creation (as requested by Topi) Remove bogus is_scanout check in miptree_release v3: Remove is_scanout assert in intel_miptree_create. It doesn't work with latest codebase - not sure it ever should have worked. v4: assert(mt->last_level == 0) and assert(mt->first_level == 0) in ccs setup (Topi) v5 (Jason Ekstrand): - Base the decision to allocate a CCS on the image modifier Signed-off-by: Ben Widawsky <[email protected]> Acked-by: Daniel Stone <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965: Support images with aux buffersBen Widawsky2017-08-141-0/+6
| | | | | | | | | | | | | | Previously images did not support any auxiliary compression surfaces (CCS, MCS, or HiZ). That's about to change. This patch just adds the fields to __DRIimageRec to make auxiliary surfaces possible. v2 (Jason Ekstrand): - Add an aux_pitch parameter as well as aux_offset Signed-off-by: Ben Widawsky <[email protected]> Acked-by: Daniel Stone <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965/screen: Stop redefining DRM_FORMAT_MOD_(INVALID|LINEAR)Jason Ekstrand2017-08-141-8/+0
| | | | Reviewed-by: Ben Widawsky <[email protected]>
* i965/blorp: Correct type of src_format in call to ↵Scott D Phillips2017-08-141-1/+2
| | | | | | | | | | | | | | | | | | intel_miptree_texture_aux_usage intel_miptree_texture_aux_usage() takes an isl_format, but we are passing a mesa_format. clang warns: brw_blorp.c:305:52: warning: implicit conversion from enumeration type 'mesa_format' to different enumeration type 'enum isl_format' [-Wenum-conversion] intel_miptree_texture_aux_usage(brw, src_mt, src_format); ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ^~~~~~~~~~ Fixes: fc1639e46d ("i965/blorp: Use texture/render_aux_usage for blits") Cc: "17.2" <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Guard GetBufferSubData's streaming memcpy load with USE_SSE41Kenneth Graunke2017-08-121-0/+2
| | | | | | | | | | This should hopefully fix build issues on 32-bit Android-x86. v2: s/USE_SSE4_1/USE_SS41/, caught by Gražvydas Ignotas. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102050 Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* i965: Clean up intel_batchbuffer_init().Kenneth Graunke2017-08-123-12/+11
| | | | | | | | | | | | | Passing screen lets us get the kernel features, devinfo, and bufmgr, without needing container_of. This use of container_of could cause crashes due to issues with the "sample" macro parameter. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102062 Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]>
* glsl: pass mem_ctx to constant_expression_value(...) and friendsTimothy Arceri2017-08-112-4/+9
| | | | | | | | | | | | | | | | | | | | The main motivation for this is that threaded compilation can fall over if we were to allocate IR inside constant_expression_value() when calling it on a builtin. This is because builtins are shared across the whole OpenGL context. f81ede469910d worked around the problem by cloning the entire builtin before constant_expression_value() could be called on it. However cloning the whole function each time we referenced it lead to a significant reduction in the GLSL IR compiler performance. This change along with the following patch helps fix that performance regression. Other advantages are that we reduce the number of calls to ralloc_parent(), and for loop unrolling we free constants after they are used rather than leaving them hanging around. Reviewed-by: Kenneth Graunke <[email protected]>
* glsl: stop copying struct and interface member namesTimothy Arceri2017-08-112-21/+19
| | | | | | | | | | | We are currently copying the name for each member dereference but we can just share a single instance of the string provided by the type. This change also stops us recalculating the field index repeatedly. Reviewed-by: Thomas Helland <[email protected]>
* glsl: calculate number of operands in an expression onceTimothy Arceri2017-08-112-5/+5
| | | | | | | | | | | | | | | | | | | Extra validation is added to ir_validate to make sure this is always updated to the correct numer of operands, as passes like lower_instructions modify the instructions directly rather then generating a new one. The reduction in time is so small that it is not really measurable. However callgrind was reporting this function as being called just under 34 million times while compiling the Deus Ex shaders (just pre-linking was profiled) with 0.20% spent in this function. v2: - make num_operands a unit8_t - fix unsigned/signed mismatches Reviewed-by: Thomas Helland <[email protected]>
* dri: Introduce SWAP_METHOD tokensThomas Hellstrom2017-08-106-10/+8
| | | | | | | | | | | | We shouldn't be using GLX tokens in the dri subsystem, so define dri SWAP_METHOD tokens and translate when necessary. Unfortunately the X server uses the dri swap method value untranslated as the GLX fbconfig swapMethod, so we can't enumerate these tokens arbitrarily, but rather need to make them have the same values as the corresponding GLX tokens. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* dri: Fix __DRIconfig reporting of __DRI_ATTRIB_SWAP_METHODThomas Hellstrom2017-08-102-6/+2
| | | | | | | | | | | | | | The attribMap had two entries for this attribute, and driGetConfigAttribIndex didn't return a proper value for this attribute. Fix this, and also make sure we return SWAP_UNDEFINED for single-buffer configs as required by the GLX_OML_swap_method spec. Finally bump the dri core extension version to 2, indicating that we correctly report __DRI_ATTRIB_SWAP_METHOD. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* TextureStorage1D should return INVALID_OPERATION if target is not a 1D textureIago Toral Quiroga2017-08-091-1/+1
| | | | | | | | | | Previous behavior was inconsistent with other texture targets so this has been fixed in OpenGL 4.6. Fixes: KHR-GL45.direct_state_access.textures_storage_errors Reviewed-by: Jordan Justen <[email protected]>
* Update TextureParameter* error for incompatible texture targetsIago Toral Quiroga2017-08-091-1/+1
| | | | | | | | | | | The OpenGL 4.6 specs have been updated so that GetTextureParameter* with a texture object with an incompatible TEXTURE_TARGET should now report INVALID_OPERATION instead of INVALID_ENUM. Fixes: KHR-GL45.direct_state_access.textures_parameter_errors Reviewed-by: Jordan Justen <[email protected]>
* i965/bufmgr: Set bo->idle after waiting.Kenneth Graunke2017-08-081-0/+2
| | | | | | | | | | After a successful wait, we know the buffer ought to be idle. Chris points out that: "The only caveat here is that bo is global, and we have a very unlikely (and probably unnoticeable) race condition with multiple contexts." Reviewed-by: Chris Wilson <[email protected]>
* i965: Don't use ggtt_bo for Gen8+ streamout offset buffer.Kenneth Graunke2017-08-081-1/+1
| | | | | | | RELOC_NEEDS_GGTT is only meaningful on Sandybridge - it's skipped on other generations - so this has no purpose. Just use rw_bo(). Reviewed-by: Chris Wilson <[email protected]>
* i965: Simplify *_bo() helpers.Kenneth Graunke2017-08-081-47/+25
| | | | | | | | With the reloc domains gone, most of these are basically the same, and the names don't make much sense anymore. Simplify them to ro_bo(), rw_bo(), and ggtt_bo(). Reviewed-by: Chris Wilson <[email protected]>
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