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* i965/cse: Don't eliminate instructions with side-effectsJason Ekstrand2014-08-112-2/+2
| | | | | | | | | This casues problems when converting atomics to use the GRF. Sometimes the atomic operation would get eaten by CSE when it shouldn't. v2: Roll the has_side_effects check into is_expression Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Add support for ARB_copy_imageJason Ekstrand2014-08-115-0/+272
| | | | | | | | | | | | | | | | | This, together with the meta path, provides a complete implemetation of ARB_copy_image. v2: Add a fallback memcpy path for when the texture is too big for the blitter v3: Properly support copying between two places on the same texture in the memcpy fallback v4: Properly handle blit between the same two images in the fallback path v5: Properly handle blit between the same two compressed images in the fallback path v6: Fix a typo in a comment Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Neil Roberts <[email protected]>
* mesa/meta: Add a partial implementation of CopyImageSubDataJason Ekstrand2014-08-113-0/+208
| | | | | | | | | | | | | | | | This provides an implementation of CopyImageSubData that works if both textures are uncompressed. This implementation works by using a combination of texture views and BlitFramebuffer. If one of the textures is compressed, it returns false and the driver is expected to provide a fallback. v2: Don't leak fbo's Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Juha-Pekka Heikkila <[email protected]> Reviewed-by: Neil Roberts <[email protected]> v3: Change glGen/DeleteTextures to _mesa_Gen/DeleteTextures
* mesa/meta: Make _mesa_meta_bind_fbo_image also take a framebuffer targetJason Ekstrand2014-08-113-19/+25
| | | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Juha-Pekka Heikkila <[email protected]> Reviewed-by: Neil Roberts <[email protected]>
* mesa: Add GL API support for ARB_copy_imageJason Ekstrand2014-08-119-20/+446
| | | | | | | | | | | | | | | | | This adds the API entrypoint, error checking logic, and a driver hook for the ARB_copy_image extension. v2: Fix a typo in ARB_copy_image.xml and add it to the makefile v3: Put ARB_copy_image.xml in the right place alphebetically in the makefile and properly prefix the commit message v4: Fixed some line wrapping and added a check for null v5: Check for incomplete renderbuffers Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Juha-Pekka Heikkila <[email protected]> Reviewed-by: Neil Roberts <[email protected]> v6: Update dispatch_sanity for the addition of CopyImageSubData
* i965/fs: Keep track of the register that hold delta_x/delta_y.Matt Turner2014-08-111-0/+14
| | | | | | | | They're needed in register allocation. Fixes a regression since afe3d155. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78875 Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Mark branch unreachable in sampler state code.Matt Turner2014-08-111-1/+1
| | | | | | Silences some uninitialized variable warnings. Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: simplify _mesa_update_draw_buffers()Brian Paul2014-08-111-7/+2
| | | | | | | There's no need to copy the array of DrawBuffer enums to a temp array. Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* mesa: fix assertion in _mesa_drawbuffers()Brian Paul2014-08-111-2/+3
| | | | | | | | | | Fixes failed assertion when _mesa_update_draw_buffers() was called with GL_DRAW_BUFFER == GL_FRONT_AND_BACK. The piglit gl30basic hit this. Cc: "10.2" <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* mesa: whitespace, 80-column wrapping in program.cBrian Paul2014-08-111-8/+11
| | | | | Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* mesa: simplify/rename _mesa_init_program_struct()Brian Paul2014-08-111-34/+35
| | | | | | | | No need to return a value. Remove unused ctx parameter. Remove _mesa_ prefix since it's static. Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* st/mesa: use PRId64 for printing 64-bit intsBrian Paul2014-08-111-1/+4
| | | | | | | v2: use signed types/formats Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* mesa: use PRId64 for printing 64-bit intsBrian Paul2014-08-112-21/+25
| | | | | | | | | | | Silences MinGW warnings: warning: unknown conversion type character ‘l’ in format [-Wformat] warning: too many arguments for format [-Wformat-extra-args] v2: use signed types/formats Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* mesa: define and use ALL_TYPE_BITS in varray.c codeBrian Paul2014-08-111-16/+17
| | | | | Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* mesa: add comment that GL_CLIP_DISTANCE0 == GL_CLIP_PLANE0 in enable.cBrian Paul2014-08-111-2/+2
| | | | | Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* i965: Don't check for format differences when using the blorp blitterNeil Roberts2014-08-111-54/+12
| | | | | | | | | | | | | | Previously the blorp blitter wouldn't be used if the source and destination buffer had a different format other than swizzling between RGB and BGR and adding or removing a dummy alpha channel. However there's no reason why the blorp code path can't be used to do almost all format conversions so this patch just removes the checks. However it does explicitly disable converting to/from MESA_FORMAT_Z24_UNORM_X8_UINT because there is a similar check brw_blorp_copytexsubimage. This doesn't cause any Piglit test regressions at least on Ivybridge. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/eu: Allow math on immediates on Broadwell.Kenneth Graunke2014-08-101-3/+6
| | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/eu: Update jump distance scaling for Broadwell.Kenneth Graunke2014-08-101-0/+4
| | | | | | | | | | Broadwell measures jump distances in bytes, so we need to scale by 16. v2: Update the function in brw_eu.h, not in brw_eu_emit.c. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/eu: Refactor jump distance scaling to use a helper function.Kenneth Graunke2014-08-103-17/+32
| | | | | | | | | | | | | | | | | | | Different generations of hardware measure jump distances in different units. Previously, every function that needed to set a jump target open coded this scaling, or made a hardcoded assumption (i.e. just used 2). Most functions start with the number of instructions to jump, and scale up to the hardware-specific value. So, I made the function match that. Others start with a byte offset, and divide by a constant (8) to obtain the jump distance. This is actually 16 / 2 (the jump scale for Gen5-7). v2: Make the helper a static inline defined in brw_eu.h, instead of an actual function in brw_eu_emit.c (as suggested by Matt). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/eu: Set UIP on ELSE instructions on Broadwell.Kenneth Graunke2014-08-101-0/+6
| | | | | | | | Broadwell adds UIP on ELSE instructions. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/eu: Make it clear that brw_patch_break_count only runs on Gen4-5.Kenneth Graunke2014-08-101-0/+2
| | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/eu: Make it clear that brw_find_loop_end only runs on Gen6+.Kenneth Graunke2014-08-101-0/+2
| | | | | | | | | It has Gen6+ knowledge baked in, and indeed is only called for Gen6+, but it wasn't immediately obvious that this was the case. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/eu: Port Broadwell CMP destination type hack to brw_eu_emit.c.Kenneth Graunke2014-08-101-0/+8
| | | | | | | | See gen8_generator::CMP(). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/eu: Explicitly disable instruction compaction on Broadwell for now.Kenneth Graunke2014-08-101-1/+1
| | | | | | | | | | | | Until now, it's been off implicitly: we never call the compactor function. When we merge the generators, we'll start calling it, so we should make it do nothing. Matt will enable instruction compaction properly later. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/eu: Use Haswell atomic messages on Broadwell.Kenneth Graunke2014-08-101-2/+2
| | | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/eu: Change gen == 7 to gen >= 7 in a couple brw_eu_emit.c cases.Kenneth Graunke2014-08-101-2/+2
| | | | | | | | | | | Broadwell is going to use the brw_eu_emit.c code soon. We want to get the fake MRF handling and URB HWord channel mask handling. We don't need the CMP thread switch workaround, though. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/clip: Removing scissor atomBen Widawsky2014-08-101-2/+2
| | | | | | | | | | | | | | | | | Now that we no longer use ctx->DrawBuffer->_Xmin and related fields to program the screen-space viewport extents, we don't depend on any scissoring state. So we can drop the +_NEW_SCISSOR dependency. On GEN8, a change in scissor state does not effect anything for the clipper/sf hardware state. The hardware will always do the right thing once the viewport extents are programmed. We can therefore remove the unecessary state emission. Ken originally spotted this. v2: Reword the commit message. Remove spurious hunk. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/guardband: Enable for all viewport dimensions (GEN8+)Ben Widawsky2014-08-101-10/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The goal of guardband clipping is to try to avoid 3d clipping because it is an expensive operation. When guardband clipping is disabled, all geometry that intersects the viewport is sent to the FF 3d clipper. Objects which are entirely enclosed within the viewport are said to be "trivially accepted" while those entirely outside of the viewport are, "trivially rejected". When guardband clipping is turned on the above behavior is changed such that if the geometry is within the guardband, and intersects the viewport, it skips the 3d clipper. Prior to GEN8, this was problematic if the viewport was smaller than the screen as it could allow for rendering to occur outside of the viewport. That could be mitigated if the programmer specified a scissor region which was less than or equal to the viewport - but this is not required for correctness in OpenGL. In theory you could be clever with the guardband so as not to invoke this problem. We do not do this, and have no data that suggests we should bother (nor the converse data). With viewport extents in place on GEN8, it should be safe to turn on guardband clipping for all cases While here, add a comment to the code which confused me thoroughly. v2: Update grammar in commit message. Reword comments based on Ken's suggestion. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Simplify viewport extents programming on GEN8Ben Widawsky2014-08-101-9/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Viewport extents are a 3rd rectangle that defines which pixels get discarded as part of the rasterization process. The actual pixels drawn to the screen are an intersection of the drawing rectangle, the viewport extents, and the scissor rectangle. It permits the use of guardband clipping in all cases (see later patch). The actual pixels drawn to the screen are an intersection of the drawing rectangle, the viewport extents, and the scissor rectangle. Scissor rectangle is not super important for this discussion as it should always help do the right thing provided the programmer uses it. switch (viewport dimensions, drawrect dimension) { case viewport > drawing rectangle: no effects; break; case viewport == drawing rectangle: no effects; break; case viewport < drawing rectangle: Pixels (after the viewport transformation but before expensive rastersizing and shading operations) which are outside of the viewport are discarded. } I am unable to find a test case where this improves performance, but in all my testing it doesn't hurt performance, and intuitively, it should not ever hurt performance. It also permits us to use the guardband more freely (see upcoming patch). v2: Updating commit message. v3: Commit message updates requested by Ken Reviewed-by: Kenneth Graunke <[email protected]>
* i965/guardband: Improve comments for guardband clippingBen Widawsky2014-08-101-4/+18
| | | | | | | | | | While working in this part of the code I had a great deal of trouble understanding what it was trying to do, and matching it with the spec. (mostly due bad wording in the PRM). To help future people, I've cleaned up the wording and provided some ascii art. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965: Support the allow_glsl_extension_directive_midshader option.Kenneth Graunke2014-08-102-0/+4
| | | | | | | | | | | This adds support for Marek's new driconf parameter, which avoids totally white rendering in Unigine Valley (which attempts to enable the GL_ARB_sample_shading extension in an illegal place). Signed-off-by: Kenneth Graunke <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75664 Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965/fs: set virtual_grf_count in assign_regs()Connor Abbott2014-08-101-0/+4
| | | | | | | | This lets us call dump_instructions() after register allocation without failing an assertion. Reviewed-by: Matt Turner <[email protected]> Signed-off-by: Connor Abbott <[email protected]>
* i965/fs: don't read from uninitialized memory while assigning registersConnor Abbott2014-08-101-6/+6
| | | | | Reviewed-by: Matt Turner <[email protected]> Signed-off-by: Connor Abbott <[email protected]>
* i965/fs: Fix bad whitespace.Matt Turner2014-08-101-2/+2
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* radeon,r200: fix buffer validation after CS flushMarek Olšák2014-08-098-15/+8
| | | | | | | | | This validates all bound buffers (CB, ZB, textures, DMA) at the beginning of CS. This fixes "bo->space_accouned" assertion failures. Tested by: Jochen Rollwagen <[email protected]> Cc: [email protected] Reviewed-by: Alex Deucher <[email protected]>
* st/mesa: fix blit-based partial TexSubImage for 1D arraysMarek Olšák2014-08-091-0/+2
| | | | | | | | This fixes piglit spec/EXT_texture_array/render-1darray. Cc: [email protected] Reviewed-by: Ilia Mirkin <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* st/mesa: fix DrawPixels(GL_STENCIL_INDEX)Marek Olšák2014-08-091-7/+4
| | | | | | | | | This is a bug which was probably uncovered recently by Jason's commits and broke this. The problem is _mesa_base_tex_format(GL_STENCIL_INDEX) returns -1. Tested-by: Michel Dänzer <[email protected]>
* st/mesa: dump TGSI before calling into the driverMarek Olšák2014-08-091-12/+10
| | | | | | If the driver crashes in create_xx_shader, you want to see the shader. Reviewed-by: Ilia Mirkin <[email protected]>
* i965: Get rid of backend_instruction::samplerChris Forbes2014-08-097-11/+0
| | | | | | | | The generators no longer use this. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965/vec4/Gen8: Use src1 for sampler_index instead of ->sampler fieldChris Forbes2014-08-092-7/+15
| | | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965/vec4/Gen4-7: Use src1 for sampler_index instead of ->sampler fieldChris Forbes2014-08-092-8/+15
| | | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965/vec4: Pass sampler index in src1 for texture opsChris Forbes2014-08-092-7/+11
| | | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965/vec4: Collect all emits of texture ops into one placeChris Forbes2014-08-091-26/+12
| | | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965/fs/Gen8: Pass sampler_index to generate_texChris Forbes2014-08-092-7/+14
| | | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965/fs/Gen4-7: Pass sampler_index to generate_texChris Forbes2014-08-092-7/+14
| | | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965/blorp: Put sampler index in src1 of texture opsChris Forbes2014-08-091-1/+2
| | | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965/fs: pass sampler as src1 of texture opChris Forbes2014-08-093-23/+25
| | | | | Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965/fs: Collect all emits of texture ops for Gen5/6 into one placeChris Forbes2014-08-091-13/+18
| | | | | | | | | Reduces duplication, and will do so even more when we change the sampler plumbing. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965/fs: Collect all emits of texture ops for Gen4 into one placeChris Forbes2014-08-091-20/+11
| | | | | | | | | Reduces duplication, and will do so even more when we change the sampler plumbing. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Emit a performance warning on conditional rendering.Kenneth Graunke2014-08-081-0/+5
| | | | | | | | | We have a CPU-side implementation of conditional rendering; it really should be done on the GPU. It's not necessarily that hard, but nobody has gotten to fixing it yet. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
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