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| * r500: bump state atom size up for fp and fp constantsDave Airlie2008-05-222-2/+6
| * r5xx: Fixed LRP.Corbin Simpson2008-05-211-8/+12
| * r5xx: Change debug info for readability.Corbin Simpson2008-05-211-1/+1
| * r5xx: Initial (broken) OPCODE_LRP.Corbin Simpson2008-05-211-0/+43
| * r5xx: Add OPCODE_POW.Corbin Simpson2008-05-211-0/+47
| * r500: print out opcode stringDave Airlie2008-05-211-1/+1
| * r500: set the RS unit register for R500 not R300 dangnammit..Dave Airlie2008-05-211-3/+3
| * r500: finish main texture instruction decodingDave Airlie2008-05-211-3/+28
| * r5xx: Count refs so we don't have to guess on temp reg allocation.Corbin Simpson2008-05-201-10/+25
| * r5xx: Fixup SOP insts.Corbin Simpson2008-05-191-4/+4
| * r5xx: New fix for COS/SIN/SCS.Corbin Simpson2008-05-191-23/+22
| * r300/r500: fixup some of the register write sizesDave Airlie2008-05-201-6/+7
| * r300: some ctrl-m's wierd.Dave Airlie2008-05-201-20/+20
| * r300/r500: fix RS col fmt bitsDave Airlie2008-05-201-2/+2
| * r5xx: Fixup emit_tex, add debugging info, enable temp temps.Corbin Simpson2008-05-191-65/+105
| * r500: add more input srcsDave Airlie2008-05-191-16/+26
| * r500: fix swz gets and some returnsDave Airlie2008-05-191-6/+7
| * r500: add mask debuggingDave Airlie2008-05-191-1/+26
| * r500: add fragment program debug dumperDave Airlie2008-05-191-0/+145
| * r5xx: Fix magic offsets for output fifo write masks.Corbin Simpson2008-05-191-2/+2
| * r5xx: Swap sources for CMP.Corbin Simpson2008-05-181-8/+13
| * r5xx: Fix typo of epic proportions.Corbin Simpson2008-05-181-1/+1
| * r5xx: ALU/OUT fixups.Corbin Simpson2008-05-181-56/+43
| * r300: fixup US_OUT_FMT bitsDave Airlie2008-05-181-5/+9
| * r500: you can have a single texcoordDave Airlie2008-05-181-2/+5
| * r5xx: Add OPCODE_KIL.Corbin Simpson2008-05-171-0/+6
| * r5xx: Added OPCODE_DPH.Corbin Simpson2008-05-171-0/+20
| * r5xx: Fix FRC.Corbin Simpson2008-05-171-0/+2
| * r5xx: Fix SCS.Corbin Simpson2008-05-171-11/+21
| * r5xx: Add OPCODE_SWZ.Corbin Simpson2008-05-171-0/+4
| * r5xx: Add OPCODE_SCS.Corbin Simpson2008-05-171-1/+51
| * r5xx: Adding more opcodes.Corbin Simpson2008-05-171-0/+82
| * r5xx: First swing at OPCODE_COS.Corbin Simpson2008-05-171-0/+14
| * r5xx: Unbreak MAX and MIN.Corbin Simpson2008-05-171-2/+2
| * r500: set fragprog end to correct placeDave Airlie2008-05-171-3/+4
| * r300: SC register naming cleanupAlex Deucher2008-05-172-31/+37
| * r500: write out the correct FP registersAlex Deucher2008-05-176-6/+43
| * r500: default rsunit swizzle like fglrxDave Airlie2008-05-152-3/+14
| * r500: shift tex src properlyDave Airlie2008-05-151-2/+2
| * r500: fixup r500 rs unit texture coordinate countingDave Airlie2008-05-151-13/+15
| * r500: remove some debuggingDave Airlie2008-05-151-3/+1
| * r500: split output/pixel masks and emit in the correct placesDave Airlie2008-05-151-19/+20
| * r3/500: emit RS state before VAPDave Airlie2008-05-151-3/+4
| * r500: fixup the program allocations to be the correct sizesDave Airlie2008-05-151-10/+31
| * r300: set screen so that context init can find out chip idsDave Airlie2008-05-151-1/+1
| * r500: add cmp support in theoryDave Airlie2008-05-151-0/+24
| * r500: some trivial fixups to get tri working.Dave Airlie2008-05-152-10/+14
| * r500: we just need to emit a colour for clear drop tex instructionDave Airlie2008-05-151-34/+1
| * R300: clean up GA registersAlex Deucher2008-05-133-177/+177
| * R3xx: clean up ZB registersAlex Deucher2008-05-135-186/+181
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