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* i965: Link uniforms of SPIR-V programs using the NIR linkerEduardo Lima Mitev2018-06-211-0/+6
| | | | | | | | | v2: nir_link_uniforms renamed to gl_nir_link_uniforms Signed-off-by: Eduardo Lima <[email protected]> Signed-off-by: Alejandro Piñeiro <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* i965: Setup glsl uniforms by index rather than name matchingNeil Roberts2018-06-211-13/+37
| | | | | | | | | | | | | | | Previously when setting up a uniform it would try to walk the uniform storage slots and find one that matches the name of the given variable. However, each variable already has a location which is an index into the UniformStorage array so we can just directly jump to the right slot. Some of the variables take up more than one slot so we still need to calculate how many it uses. The main reason to do this is to support ARB_gl_spirv because in that case the uniforms don’t have names so the previous approach won’t work. Reviewed-by: Timothy Arceri <[email protected]>
* i965: account for NIR uniforms without nameEduardo Lima Mitev2018-06-212-8/+5
| | | | | | | | | | | | | | | | | | | | | | | | Right now, the BRW linker code assumes nir_variable::name is always non-NULL, but thanks to ARB_gl_spirv we will soon be linking SPIR-V programs, and those explicitly require matching uniforms by location. The name is just a debug hint. Instead of checking for the name this patch makes it check for var->num_state_slots on the assumption that everything that had an internal name also had some state slots. This seems likely because the two code paths that are taken when the name begins with "gl_" already have an assert that var->state_slots is not NULL. v2: simplified, most of it moved to glsl/nir/spirv (Neil Roberts) v3: check for num_state_slots instead of the name. This is needed because we do actually have nameless builtins with SPIR-V such as PatchVerticesIn and we want them to hit the _mesa_add_state_reference code path (Neil Roberts) Signed-off-by: Eduardo Lima <[email protected]> Signed-off-by: Neil Roberts <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* i965: Update TexturesUsed after linking the shadersNeil Roberts2018-06-211-1/+3
| | | | | | | | | Otherwise if the shader is SPIR-V then SamplerUsed won’t have been initialised yet so it will end up thinking no textures are used. This was causing a crash later on if nothing causes it to regenerate TexturesUsed before the next render. Reviewed-by: Timothy Arceri <[email protected]>
* i965: Build SPIR-V programs' resource list using NIREduardo Lima Mitev2018-06-211-1/+7
| | | | | | v2: tweak after nir_linker.h being renamed to gl_nir_linker.h Reviewed-by: Timothy Arceri <[email protected]>
* mesa/main: add NULL name check when searching for a resource nameAlejandro Piñeiro2018-06-211-0/+5
| | | | | | | | | Since ARB_gl_spirv name reflection can be missing. piglit shader_runner does several resource checking, so this commit is useful to get even the more simple piglit tests running without crashing on SPIR-V mode. Reviewed-by: Timothy Arceri <[email protected]>
* i965: use gl_shader_program_data::spirvAlejandro Piñeiro2018-06-211-1/+1
| | | | Reviewed-by: Timothy Arceri <[email protected]>
* mesa/main: Add a 'spirv' flag to gl_shader_program_dataEduardo Lima Mitev2018-06-212-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This will be used by the linker code to differentiate between programs made out of SPIR-V or GLSL shaders. This was rejected in the past, assuming that it was equivalent to check for "shProg->_LinkedShaders[stage]->spirv_data != NULL". But: * At some points of the linking process it would be needed to check if _LinkerShaders[stage] is present, so the full check would be: "shProg->_LinkedShaders[stage] != NULL && shProg->_LinkedShaders[stage]->spirv_data != NULL" * Sometimes you would like to do some specific to SPIR-V independently of the stage, or for any stage. For example, "link all the uniforms, for all stages". In that case checking for the flag would be equivalent to iterate all the _LinkedShaders and check if there is any spirv_data available. The former makes readibility really worse. Both could be solved by adding two helpers. But adding a flag seems really more simple and readable. v2: added justification for the flag on the commit message (Alejandro) Signed-off-by: Eduardo Lima <[email protected]> Signed-off-by: Alejandro Piñeiro <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* mesa: remove struct gl_extensions::ATI_separate_stencilEmil Velikov2018-06-217-15/+2
| | | | | | | | | | | | Virtually every driver that supports ATI_separate_stencil also supports EXT_stencil_two_side. Use the latter boolean for both extension. With that in mind we can drop the explicit true from the drivers and the nasty comment in compute_version(). Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* mesa/st: only do scalar lowerings if driver benefitsChristian Gmeiner2018-06-201-9/+30
| | | | | | | | | As not every (upcoming) backend compiler is happy with nir_lower_xxx_to_scalar lowerings do them only if the backend is scalar (and not vec4) based. Signed-off-by: Christian Gmeiner <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* mesa/st/nir: fix driver_location for arrays of image/samplerRob Clark2018-06-191-7/+9
| | | | | | | | We can have arrays of images or samplers. But I forgot to handle that case long ago. Suprised no one complained yet. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* mesa/util: add allow_glsl_relaxed_es driconfig overrideTimothy Arceri2018-06-192-0/+9
| | | | | | | | | | | | | | | This relaxes a number of ES shader restrictions allowing shaders to follow more desktop GLSL like rules. This initial implementation relaxes the following: - allows linking ES shaders with desktop shaders - allows mismatching precision qualifiers - always enables standard derivative builtins These relaxations allow Google Earth VR shaders to compile. Reviewed-by: Dave Airlie <[email protected]>
* mesa/util: add allow_glsl_builtin_const_expression driconf overrideTimothy Arceri2018-06-192-0/+9
| | | | | | | Google Earth VR shaders uses builtins in constant expressions with GLSL 1.10. That feature wasn't allowed until GLSL 1.20. Reviewed-by: Dave Airlie <[email protected]>
* mesa: add ff fragment shader support for geom and tess shadersTimothy Arceri2018-06-191-1/+5
| | | | | | | This is required for compatibility profile support. Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]>
* mesa: add missing return in error pathEric Engestrom2018-06-181-1/+3
| | | | | | | | Fixes: 67f40dadaa6666dacd90 "mesa: add support for ARB_sample_locations" Cc: Rhys Perry <[email protected]> Cc: Brian Paul <[email protected]> Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]>
* meson: fix i965/anv/isl genX static lib namesEric Engestrom2018-06-181-1/+1
| | | | | | | | | | | Shouldn't make any functional difference, just that `liblibanv_gen90.a` will now be called `libanv_gen90.a`. Fixes: 3218056e0eb375eeda470 "meson: Build i965 and dri stack" Fixes: d1992255bb29054fa5176 "meson: Add build Intel "anv" vulkan driver" Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Dylan Baker <[email protected]>
* mesa: Unconditionally enable floating-point texturesTimothy Arceri2018-06-181-2/+0
| | | | | | | | | | | | | | ARB_texture_float references US Patent #6,650,327 [1] which has a filing date of June 16 1998. According to [2], patents filed after 1995 expire 20 years from the filing date, giving an expiration of June 17 2018. [1] https://www.google.com/patents/US6650327 [2] https://en.wikipedia.org/wiki/Term_of_patent_in_the_United_States Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* st/mesa: add support for ARB_sample_locationsRhys Perry2018-06-148-7/+129
| | | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Brian Paul <[email protected]> (v2) Reviewed-by: Marek Olšák <[email protected]> (v2)
* mesa: add support for ARB_sample_locationsRhys Perry2018-06-1411-28/+351
| | | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Brian Paul <[email protected]> (v2) Reviewed-by: Marek Olšák <[email protected]> (v2)
* st/mesa: add missing switch cases in glsl_to_tgsi_visitor::visit()Brian Paul2018-06-141-0/+2
| | | | | | To silence compiler warning about unhandled switch cases. Reviewed-by: Charmaine Lee <[email protected]>
* meson: Add support for SPARC assemblyDylan Baker2018-06-131-1/+7
| | | | | | | | | This was blindly copied from autotools and tested by a helpful gentoo user. Signed-off-by: Dylan Baker <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* meson: Set include dirs for asmDylan Baker2018-06-131-2/+6
| | | | | | | | | v2: - split this from the next patch - Only include x86-64 and not x86 when buiding x86_64 Signed-off-by: Dylan Baker <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* drivers/dri/i965: add missing #includeRoss Burton2018-06-121-0/+2
| | | | | | brw_bufmgr.h uses time_t without include time.h, so the build fails under musl. Reviewed-by: Eric Engestrom <[email protected]>
* i965: fix resource leakEric Engestrom2018-06-111-1/+3
| | | | | | | | | | v2: intel_miptree_release() already takes care of the planes, no need to hand-code the loop (Lionel) Coverity ID: 1436909 Fixes: 3352f2d746d3959b22ca4 "i965: Create multiple miptrees for planar YUV images" Reviewed-by: Lionel Landwerlin <[email protected]> Signed-off-by: Eric Engestrom <[email protected]>
* mesa/program_binary: add implicit UseProgram after successful ProgramBinaryJordan Justen2018-06-101-0/+31
| | | | | | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106810 Fixes: b4c37ce2140 "i965: Add ARB_get_program_binary support using nir_serialization" Ref: 3fe8d04a6d6 "mesa: don't always set _NEW_PROGRAM when linking" Ref: c505d6d8522 "mesa: use gl_program for CurrentProgram rather than gl_shader_program" Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Plamena Manolova <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* i965/screen: Sanity check that all formats we advertise are useableJason Ekstrand2018-06-071-4/+20
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* i965/screen: Use RGBA non-sRGB formats for imagesJason Ekstrand2018-06-071-0/+9
| | | | | | | | | | Not all of the MESA_FORMAT and ISL_FORMAT helpers we use can properly handle RGBX formats. Also, we don't want to make decisions based on those in the first place because we can't render to RGBA and we use the non-sRGB version to determine whether or not to allow CCS_E. Cc: [email protected] Reviewed-by: Lionel Landwerlin <[email protected]>
* i965/screen: Return false for unsupported formats in query_modifiersJason Ekstrand2018-06-071-2/+14
| | | | | Cc: [email protected] Reviewed-by: Lionel Landwerlin <[email protected]>
* i965/screen: Refactor query_dma_buf_formatsJason Ekstrand2018-06-071-12/+13
| | | | | | | | | This reworks it to work like query_dma_buf_modifiers and, in particular, makes it more flexible so that we can disallow a non-static set of formats. Cc: [email protected] Reviewed-by: Lionel Landwerlin <[email protected]>
* i965: Require softpin support for Cannonlake and later.Kenneth Graunke2018-06-061-0/+10
| | | | | | | | | | | This isn't strictly necessary, but anyone running Cannonlake will already have Kernel 4.5 or later, so there's no reason to support the relocation model on Gen10+. This will let us avoid dealing with them for new features. Reviewed-by: Scott D Phillips <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965: Allocate VMA in userspace for full-PPGTT systems.Kenneth Graunke2018-06-061-1/+1
| | | | | | | | | | | | | | | | This patch enables soft-pinning of all buffers, allowing us to skip relocation processing entirely. All systems with full PPGTT and > 4GB of VMA should gain these benefits. This should be most Gen8+. Unfortunately, this excludes a few systems: - Cherryview (only has 32-bit addressing, despite 48-bit pointers) - Broadwell with a 32-bit kernel - Anybody running pre-4.5 kernel. We may enable it for Cherryview in the future, but it would require some tweaks to the memory zone. Reviewed-by: Jordan Justen <[email protected]>
* intel/blorp: Emit VF cache invalidates for 48-bit bugs with softpin.Kenneth Graunke2018-06-061-0/+29
| | | | | | | | | | | | | | | | | | commit 92f01fc5f914fd500497d0c3aed75f3ac8dc054d made i965 start emitting VF cache invalidates when the high bits of vertex buffers change. But we were not tracking vertex buffers emitted by BLORP. This was papered over by a mistake where I emitted VF cache invalidates all the time, which Chris fixed in commit 3ac5fbadfd8644d30fce9ff267cb811ad157996a. This patch adds a new hook which allows the driver to track addresses and request a VF cache invalidate as appropriate. v2: Make the driver do the PIPE_CONTROL so it can apply workarounds (caught by Jason Ekstrand). Rebase on anv bug fix. v3: Don't screw up the boolean (caught by Jason Ekstrand). Fixes: 92f01fc5f914 ("i965: Emit VF cache invalidates for 48-bit addressing bugs with softpin.") Reviewed-by: Jason Ekstrand <[email protected]>
* dri: add missing 16bits formats mappingLionel Landwerlin2018-06-071-0/+16
| | | | | | | | | | | | | | | | | | i965 advertises the 16-bit R and RG formats through eglQueryDmaBufFormatsEXT but falls over when a client tries to use or asks more information about such a format because driImageFormatToGLFormat returns MESA_FORMAT_NONE. Found by Eero Tamminen. v2: Add G16R16 formats (Lionel) v3: Fix G16R16 mapping to mesa format (Jason) Signed-off-by: Lionel Landwerlin <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106642 Reviewed-by: Plamena Manolova <[email protected]> (v2) Reviewed-by: Jason Ekstrand <[email protected]>
* nir: Add an ALU lowering pass for mul_high.Eric Anholt2018-06-061-0/+1
| | | | | | | | This is based on the glsl/lower_instructions.cpp implementation, but should be much more readable. Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* mesa: Make sure that imm draws are flushed before other draws execute.Mathias Fröhlich2018-06-054-65/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The recent patch mesa: Remove FLUSH_VERTICES from VAO state changes. Pending draw calls on immediate mode or display list calls do not depend on changes of the VAO state. So, remove calls to FLUSH_VERTICES and flag _NEW_ARRAY as appropriate. uncovered a problem that non immediate mode draw calls do only flush outstanding immediate mode draws if FLUSH_UPDATE_CURRENT is set in ctx->Driver.NeedFlush. In that case, due to the sequence of _mesa_set_draw_vao commands we could end up with the VAO from the FLUSH_VERTICES call set into gl_context::Array._DrawVAO when the array draw is executed. So the change pulls FLUSH_CURRENT out of _mesa_validate_* calls into the array draw calls being validated. The change introduces a new macro FLUSH_FOR_DRAW beside FLUSH_VERTICES and FLUSH_CURRENT that flushes on changed current attributes as well as on outstanding immediate mode draw calls. Use FLUSH_FOR_DRAW in the non immediate mode draw code paths. Reviewed-by: Marek Olšák <[email protected]> Tested-by: Kai Wasserbäch <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106594 Signed-off-by: Mathias Fröhlich <[email protected]>
* i965: Prepare batchbuffer module for softpin support.Kenneth Graunke2018-06-042-3/+39
| | | | | | | | | | | | | | | | | | | | If EXEC_OBJECT_PINNED is set, we don't want to emit any relocations. We simply want to add the BO to the validation list, and possibly mark it as writeable. The new brw_use_pinned_bo() interface does just that. To avoid having to make every caller consider both the relocation and softpin cases, we make emit_reloc() call brw_use_pinned_bo() when given a softpinned buffer. We also can't grow buffers that are softpinned - the mechanism places a larger BO at the same offset as the original, which requires moving BOs around in the VMA. With softpin, we only allocate enough VMA for the original size of the BO. v2: Assert that BOs aren't pinned if the kernel says we should move them (feedback from Chris Wilson) Reviewed-by: Scott D Phillips <[email protected]>
* i965: Add virtual memory allocator infrastructure to brw_bufmgr.Kenneth Graunke2018-06-042-1/+286
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This introduces a new fast virtual memory allocator integrated with our BO cache bucketing. For larger objects, it falls back to the simple free-list allocator (util_vma). This puts the allocators in place but doesn't enable softpin yet. v2: (feedback from Chris Wilson) - Check (bo->kflags & EXEC_OBJECT_PINNED) instead of a global flag - Avoid vma_free(0ull) on the err_free path. - Only enable if the kernel says we have full PPGTT support - Make bucketing allocators more resistant to failing to grow arrays (feedback from Scott Phillips) - Don't use node after popping it from the list. - Avoid undefined behavior in canonicalization by reusing new helper - Comment updates (feedback from myself) - Avoid __vma_alloc vs. vma_alloc by making a zero_high_bits helper to return a non-canonical address with the high bits zeroed. - Don't shadow loop variable 'i' when destroying things (ugly; worked) v3: - Replace zero_high_bits with new common gen_48b_address helper. Reviewed-by: Scott D Phillips <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965: Disable internal CCS for shadows of multi-sampled windowsJason Ekstrand2018-06-041-1/+10
| | | | | | | | | | | | | | If window system supports Y-tiling but not CCS_E, we currently create an internal CCS for any window system buffers and then resolve right before handing it off to X or Wayland. In the case of the single-sampled shadow of a multi-sampled window system buffer, this is pointless because the only thing we do with it is use it as a MSAA resolve target so we do MSAA resolve -> CCS resolve -> hand to the window system. Instead, just disable CCS for the shadow and then the MSAA resolve will write uncompressed directly into it. If the window system supports CCS_E, we will still use CCS_E, we just won't do internal CCS. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/miptree: Rename a parameter to create_for_dri_imageJason Ekstrand2018-06-042-4/+4
| | | | | | | Instead of having it be a general "is this a winsys image" boolean, make it more specific to the actual purpose. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Fix batch-last mode to properly swap BOs.Kenneth Graunke2018-06-041-0/+5
| | | | | | | | | | | | | | | On pre-4.13 kernels, which don't support I915_EXEC_BATCH_FIRST, we move the validation list entry to the end...but incorrectly left the exec_bo array alone, causing a mismatch where exec_bos[0] no longer corresponded with validation_list[0] (and similarly for the last entry). One example of resulting breakage is that we'd update bo->gtt_offset based on the wrong buffer. This wreaked total havoc when trying to use softpin, and likely caused unnecessary relocations in the normal case. Fixes: 29ba502a4e28471f67e4e904ae503157087efd20 (i965: Use I915_EXEC_BATCH_FIRST when available.) Reviewed-by: Chris Wilson <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* i965: Add ARB_fragment_shader_interlock support.Plamena Manolova2018-06-011-0/+1
| | | | | | | | | Adds suppport for ARB_fragment_shader_interlock. We achieve the interlock and fragment ordering by issuing a memory fence via sendc. Signed-off-by: Plamena Manolova <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* mesa: Add GL/GLSL plumbing for ARB_fragment_shader_interlock.Plamena Manolova2018-06-012-0/+6
| | | | | | | | | | | | | This extension provides new GLSL built-in functions beginInvocationInterlockARB() and endInvocationInterlockARB() that delimit a critical section of fragment shader code. For pairs of shader invocations with "overlapping" coverage in a given pixel, the OpenGL implementation will guarantee that the critical section of the fragment shader will be executed for only one fragment at a time. Signed-off-by: Plamena Manolova <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* st/mesa: relax requirements for ARB_ES3_compatibilityMarek Olšák2018-06-011-4/+7
| | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106748 Reviewed-by: Timothy Arceri <[email protected]>
* mesa: don't call Driver.TexEnv with invalid argumentsTapani Pälli2018-05-311-20/+34
| | | | | | | | | | Patch skips useless and possibly dangerous calls down to the driver in case invalid arguments were given. I noticed this would be happening with demo of Darwinia game. AFAIK this does not fix anything but makes this path safer and more like how other API functions are implemented. Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* mesa: expose ARB_tessellation_shader in the compatibility profileMarek Olšák2018-05-293-3/+6
| | | | | | | Gallium drivers don't expose this yet due to: "st/mesa: use PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY" Reviewed-by: Timothy Arceri <[email protected]>
* mesa: expose AMD_vertex_shader_layer in the compatibility profileMarek Olšák2018-05-292-2/+3
| | | | | | | | | | This requires layered FBOs from GL 3.2. Gallium drivers don't expose this yet due to: "st/mesa: use PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY" Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* mesa: expose ARB_gpu_shader5 in the compatibility profileMarek Olšák2018-05-292-3/+5
| | | | | | | Gallium drivers don't expose this yet due to: "st/mesa: use PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY" Reviewed-by: Timothy Arceri <[email protected]>
* st/mesa: use PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITYMarek Olšák2018-05-291-10/+15
| | | | Reviewed-by: Timothy Arceri <[email protected]>
* mesa: update fixed-func state constants for TCS, TES, GSMarek Olšák2018-05-291-28/+36
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* mesa: print Compatibility Profile in the version stringMarek Olšák2018-05-291-1/+3
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
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