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* mesa: fix incorrect type in store_texel_al1616()Brian Paul2009-11-171-1/+1
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* mesa: remove trailing comment to silence warningBrian Paul2009-11-171-1/+1
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* mesa: remove a bit of old codeBrian Paul2009-11-171-1/+0
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* r300: fix reads and writes for MESA_FORMAT_S8Z24 bufferMaciej Cencora2009-11-171-2/+3
| | | | Regression was introduced by texformat-rework branch merge.
* Remove unconditional use of glibc specific bswap_16() macro.Michel Dänzer2009-11-171-2/+4
| | | | Fixes unresolved symbol bswap_16 on non-glibc or little endian glibc platforms.
* dri: Ensure subdirs have finished before linking driverDan Nicholson2009-11-171-1/+5
| | | | | | | | Recursive make is hard. If there are subdirectories in the DRI drivers, it's pretty certain we want to finish building in them before linking the driver. Add a new target to serialize the rules. Signed-off-by: Dan Nicholson <[email protected]>
* r600: More span breakage fixes.Michel Dänzer2009-11-171-0/+12
| | | | | At least now the compiler doesn't complain about implicitly declared functions anymore...
* r600: Attempt to fix span breakage introduced by big endian fixes.Michel Dänzer2009-11-171-0/+8
| | | | | | Only compile tested; I happened to notice people on IRC reporting .../r600_dri.so: undefined symbol: radeon_ptr_2byte_8x2
* radeon: Depth/stencil span code fixes for big endian.Michel Dänzer2009-11-171-24/+24
| | | | Fixes e.g. text in progs/demos/arbocclude.
* radeon: Fix occlusion queries on big endian.Michel Dänzer2009-11-171-7/+9
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* radeon: Fix software fallbacks with KMS on big endian.Michel Dänzer2009-11-172-0/+215
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* radeon: FBO fixes for big endian.Michel Dänzer2009-11-173-11/+44
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* Add MESA_FORMAT_XRGB8888_REV.Michel Dänzer2009-11-175-3/+49
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* radeon: rn50's have no 3D engine so don't try and init 3D driver.Dave Airlie2009-11-171-2/+4
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* i965: Use MESA_FORMAT_AL1616 when appropriateIan Romanick2009-11-162-3/+12
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* Move 'static' to start of declaration to silence compiler warningIan Romanick2009-11-161-1/+1
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* AL1616: Enable MESA_FORMAT_AL1616 for software pathsIan Romanick2009-11-161-2/+4
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* AL1616: Add TexImage storage pathIan Romanick2009-11-161-0/+73
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* AL1616: Add texel fetch / store routinesIan Romanick2009-11-162-0/+62
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* AL1616: Add formats for GL_LUMINANCE16_ALPHA16 texturesIan Romanick2009-11-162-0/+27
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* AL1616: Add macros to pack two GLushorts into a texelIan Romanick2009-11-161-0/+6
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* r600: don't force Z orderAlex Deucher2009-11-161-3/+0
| | | | | | | Let the hw decide (early vs late Z) fixes fdo bug 25092 Signed-off-by: Alex Deucher <[email protected]>
* mesa: remove unused vertex array driver hooksBrian Paul2009-11-163-117/+26
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* mesa: check BaseLevel, MaxLevel in _mesa_GenerateMipmapEXT()Brian Paul2009-11-161-0/+5
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* mesa: use _mesa_get_current_tex_object()Brian Paul2009-11-161-3/+1
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* mesa: added another check in check_gen_mipmap()Brian Paul2009-11-161-1/+3
| | | | | We don't need to call ctx->Driver.GenerateMipmap() if we're updating a texture level >= MAX_LEVEL.
* st/mesa: comments for st_draw.cBrian Paul2009-11-151-4/+14
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* i965: Share OPCODE_TXB between brw_wm_emit.c and brw_wm_glsl.cEric Anholt2009-11-133-101/+63
| | | | This should fix TXB on G45 and older in the GLSL case.
* i965: Share OPCODE_TEX between brw_wm_emit.c and brw_wm_glsl.c.Eric Anholt2009-11-133-118/+72
| | | | | New comments should explain some of the confusion about how this message works.
* i965: Clean up emit_tex a bit.Eric Anholt2009-11-131-27/+24
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* Merge remote branch 'origin/mesa_7_6_branch'Eric Anholt2009-11-1310-46/+81
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| * i965: Fix Ironlake shadow comparisons.Eric Anholt2009-11-121-7/+17
| | | | | | | | The cube map array index arg is always present.
| * i965: Fix VBO last-valid-offset setup on Ironlake.Eric Anholt2009-11-121-10/+3
| | | | | | | | | | Instead of doing math based on the (broken for VBO && offset != 0) input->count number, just use the BO size. Fixes assertion failure in ETQW.
| * i965: fix EXT_provoking_vertex supportRoland Scheidegger2009-11-118-29/+61
| | | | | | | | | | | | | | | | This didn't work for quad/quadstrips at all, and for all other primitive types it only worked when they were unclipped. Fix up the former in gs stage (could probably do without these changes and instead set QuadsFollowProvokingVertexConvention to false), and the rest in clip stage.
* | i965: Flag BRW_NEW_CONTEXT on some context state.Eric Anholt2009-11-132-6/+6
| | | | | | | | | | | | Fixing this is a prereq for avoiding flagging all state at new batch time. Eliminating that still causes problems, though (notably glean logicOp fails on my GM965).
* | intel: Remove some dead context structure fields.Eric Anholt2009-11-131-2/+0
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* | i965: Remove an unused cache_item field.Eric Anholt2009-11-133-3/+1
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* | i965: Remove long dead structures for ffvertex_prog.c.Eric Anholt2009-11-131-17/+0
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* | i965: Use bo_map instead of subdata to upload the bits of constant buffer.Eric Anholt2009-11-132-2/+26
| | | | | | | | Saves CPU time, resulting in a 2.5% FPS win on ETQW.
* | i965: Validate the number of URB entries selected for the VS.Eric Anholt2009-11-131-4/+33
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* | intel: When subdataing a busy buffer, use a temporary and blit in.Eric Anholt2009-11-131-3/+16
| | | | | | | | | | | | This cuts a massive number of waits in ET:QW, which uses a VBO ringbuffer. Unfortunately it doesn't BufferData when wrapping back to 0, so we can't be clever with tracking what's been initialized.
* | i965: Clean up Ironlake sampler type definitions.Eric Anholt2009-11-133-18/+10
| | | | | | | | They're the same regardless of execution width for 8, 4x2, and 16.
* | i965: Avoid moving the current value back into the accumulator for MAD.Eric Anholt2009-11-131-1/+34
| | | | | | | | | | This is a 2.9% (+/-.3%) performance win for my GL demo, which hits MAD sequences for matrix transforms.
* | mesa: Improve the eliminate-move-use to work across multiple instructions.Eric Anholt2009-11-131-41/+85
| | | | | | | | | | | | This shaves more instructions off of the VS of my GL demo, but no performance difference this time at n=6. This also fixes a regression that was in this path, which is now piglit's glsl-vs-mov-after-deref.
* | intel: Don't check for context pointer to be NULL during extension initIan Romanick2009-11-121-7/+6
| | | | | | | | | | | | | | | | | | | | Thanks to Chia-I Wu's changes to the extension function infrastructure, we no longer have to tell the loader which extensions the driver might enable. This means that intelInitExtensions will never be called with a NULL context pointer. Remove all the NULL checks. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* | intel: Remove unused enable_imaging parameter to intelInitExtensionsIan Romanick2009-11-123-6/+4
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* | swrast: handle additional Z24 formats in read_depth_pixels()Brian Paul2009-11-111-5/+18
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* | r300, r300g: Add missing registers.Corbin Simpson2009-11-111-0/+2
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* | swrast: update renderbuffer format assertionsbrian2009-11-101-3/+4
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* | mesa: fix some begin/end render-to-texture logicbrian2009-11-101-21/+38
| | | | | | | | | | | | | | | | | | Before, we weren't aggressive enough in checking for the start or end of render-to-texture. In particular, if only the ctx->ReadBuffer had texture attachments, we were treating that as a render-to-texture case. This fixes a regression from commit 75bdbdd90b15c8704d87ca195a364ff6a42edbb1 "intel: Don't validate in a texture image used as a render target."