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* mesa: Add extension tracking bit for ARB_viewport_arrayCourtney Goeltzenleuchter2014-01-202-0/+2
| | | | | | | | | | v2 (idr): Split these changes out from the original patch. Only advertise GL_ARB_viewport_array in a core profile because it requires geometry shaders. Signed-off-by: Courtney Goeltzenleuchter <[email protected]> Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* swrast: check for null/-1 when mapping renderbuffersBrian Paul2014-01-201-3/+7
| | | | | | | Fixes fbo-drawbuffers-none crash (but test still fails). https://bugs.freedesktop.org/show_bug.cgi?id=73757 Reviewed-by: Roland Scheidegger <[email protected]>
* i915,r200,radeon,vega: Change vendor from "VMware, Inc." to "Mesa Project".José Fonseca2014-01-202-2/+2
| | | | | | | | | | These are components which were originally developed by Tungsten Graphics, which was in turn acquired by VMware, but are de facto now being maintained by third-party contributors of the Mesa open-source community. This matches what's reported by swrast driver and a few other components. Suggested by Ian Romanick.
* i965/blorp: reduce the scope of the explicit compression controlTopi Pohjolainen2014-01-201-11/+20
| | | | | | | | | | | | | | By highlighting these special cases makes it clearer to switch to the fs-generator as the wider scoped compression control settings used in the current implementation can be simply dropped. No regressions on IVB (piglit quick + unit tests). v2 (Ian): typo in a comment Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965/blorp: remove dependency to compression control stateTopi Pohjolainen2014-01-201-4/+3
| | | | | | | | | | | | | | | | | | | | Effectively only the mask control bit gets altered for the single addition in question and hence there is no real need to use a fresh state control level for it -- that is more useful when multiple intructions share the same mask and compression settings. This is a preparation step for removing the explicit compression control modifiers in the blit compiler. After this patch there are no nested state control levels making the constant nature of the compression settings more apparent. No regressions on IVB (piglit quick + unit tests). v2 (Matt, Ian): use temporary variable instead of assigning directly on the same line with a function call. Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Only update renderbuffers on initial intelMakeCurrentKristian Høgsberg2014-01-191-1/+8
| | | | | | | | | | | | | | | | | We call intel_prepare_render() in intelMakeCurrent() to make sure we have renderbuffers before calling _mesa_make_current(). The only reason we do this is so that we can have valid defaults for width and height. If we already have buffers for the drawable we're making current, we don't need this step. In itself, this is a small optimization, but it also avoids a round trip that could block on the display server in a unexpected place. https://bugs.freedesktop.org/show_bug.cgi?id=72540 https://bugs.freedesktop.org/show_bug.cgi?id=72612 Signed-off-by: Kristian Høgsberg <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965: Double the push constant space multipliers on Broadwell too.Kenneth Graunke2014-01-181-2/+4
| | | | | | | Broadwell has 2Kb push constant size increments like Haswell GT3. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Update invariant state for Broadwell.Kenneth Graunke2014-01-181-4/+12
| | | | | | | | The only difference is that STATE_SIP takes a 48-bit address, so we need to output two zeroes. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Use the Sandybridge VUE format on Broadwell as well.Kenneth Graunke2014-01-181-0/+1
| | | | | | | It hasn't changed. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965: Create a new fragment shader backend for Broadwell.Kenneth Graunke2014-01-184-5/+1100
| | | | | | | | | | | | | | | | | | | | | | | | This replaces the old fs_generator backend. v2: Port to the C-based representation of assembly instructions. Fix texturing after the texture-grf merge. v3: Add high quality derivative support. Fix SET_SIMD4X2_OFFSET. v4: Pass brw_context to gen8_instruction functions as required. v5: Fixes for MRT, as well as zero render targets (alpha test only). v6: Replace n-wide with SIMDn in comments and messages; port over Topi's blorp-generator changes; add missing TXF_MCS opcode, fix missing high quality derivatives for DDX; fix typo (all caught by Eric). Simplify ADDC/SUBB handling; drop "Used only on Gen6+" comment (caught by Matt). Emit SIMD16 versions of three source instructions (caught by both Eric and Matt). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Create a new vec4 backend for Broadwell.Kenneth Graunke2014-01-185-17/+976
| | | | | | | | | | | | | | | | | | | | This replaces the old vec4_generator backend. v2: Port to use the C-based instruction representation. Also, remove Geometry Shader offset hacks - the visitor will handle those instead of this code. v3: Texturing fixes (including adding textureGather support). v4: Pass brw_context to gen8_instruction functions as required. v5: Add SHADER_OPCODE_TXF_MCS support; port DUAL_INSTANCED gs fixes (caught by Eric). Simplify ADDC/SUBB handling; add comments to gen8_set_dp_message calls (suggested by Matt). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Add a new infrastructure for generating Broadwell shader assembly.Kenneth Graunke2014-01-183-0/+842
| | | | | | | | | | | | | | | | | | | | | | | | | This replaces the brw_eu_emit.c layer for Broadwell. It will be used by both the vector and scalar shader backends. v2: Port to use the C-based instruction representation. v3: Fix destination register type for CMP. v4: Pass brw to gen8_instruction functions (required by rebase). v5: Remove bogus assertion on math instructions (caught by Piglit). v6: Remove more restrictions on math instructions (caught by Eric). Make ADDC and SUBB helpers set accumulator writes, like MAC and MACH (caught by Matt). v7: Don't implicitly force ALU3 operations to SIMD8 (we've been able to do SIMD16 versions since Haswell, but didn't when I originally wrote this code). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Implement a disassembler for Broadwell's new instruction encoding.Kenneth Graunke2014-01-182-0/+932
| | | | | | | | | | | | | | | | | | | | | Heavily based on Keith Packard's existing brw_disasm.c code. I've tried to go through most of the pieces (like SFIDs) and update the lists to include features added in recent generations. v2: Port to use the C-based instruction emitters. This allows us to use C99 array initializers, which tidies up some of the code. v3: Improve decoding of render target write messages. v4: Update for BRW_REGISTER_TYPE becoming an abstraction. v5: Rebase on Chris Forbes' SFID message defines. v6: Fix disassembly of UV immediates; remove silly casts. Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Matt Turner <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Add a new representation for Broadwell shader instructions.Kenneth Graunke2014-01-184-0/+835
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Broadwell significantly changes the EU instruction encoding. Many of the fields got moved to different bit positions; some even got split in two. With so many changes, it was infeasible to continue using struct brw_instruction. We needed a new representation. This new approach is a bit different: rather than a struct, I created a class that has four DWords, and helper functions that read/write various bits. This has several advantages: 1. We can create several different names for the same bits. For example, conditional modifiers, SFID for SEND instructions, and the MATH instruction's function opcode are all stored in bits 27:24. In each situation, we can use the appropriate setter function: set_sfid(), set_math_function(), or set_cond_modifier(). This is much easier to follow. 2. Since the fields are expressed using the original 128-bit numbers, the code to create the getter/setter functions follows the table in the documentation very closely. To aid in debugging, I've enabled -fkeep-inline-functions when building gen8_instruction.c. Otherwise, these functions cannot be called by gdb, making it insanely difficult to print out anything. Kenneth Graunke wrote most of this code. Damien Lespiau ported it to C99. Xiang Haihao added media fields. Zhao Yakui added indirect addressing support. Eric Anholt added an assertion to make sure that values fit in the alloted number of bits. v2: Update for brw_reg_type_to_hw_type(), which necessitates passing brw_context pointers around everywhere. Signed-off-by: Kenneth Graunke <[email protected]> Signed-off-by: Damien Lespiau <[email protected]> Signed-off-by: Xiang, Haihao <[email protected]> Signed-off-by: Zhao Yakui <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Acked-by: Matt Turner <[email protected]>
* i965: Add SFID #defines for media stuff.Kenneth Graunke2014-01-181-0/+2
| | | | | | | | While we probably won't ever use these, having them makes it easy to share disassembler code between intel-gpu-tools and Mesa. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Add #defines for new Broadwell math functions.Kenneth Graunke2014-01-181-0/+2
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: add struct and SFID for pixel interpolator messagesChris Forbes2014-01-182-0/+22
| | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/Gen7: Only emit cube face enables for cubes.Chris Forbes2014-01-191-2/+5
| | | | | | | | | This is not observed to actually fix anything, but the PRM says this field must be zero for other surface types. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965: Improve dumping of Gen7 SURFACE_STATEChris Forbes2014-01-191-6/+12
| | | | | | | | | Previously this was missing many interesting fields. Having them decoded makes debugging views much easier. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965: Add masks for more SURFACE_STATE fieldsChris Forbes2014-01-191-0/+2
| | | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965: Remove CACHED_BATCH support altogether.Kenneth Graunke2014-01-176-53/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | Using an unoptimized variant of glamor spending 50% of its CPU time in brw_draw_prims() (and hitting the cache *very* frequently): N Min Max Median Avg Stddev x 200 29200 40500 34900 34750 958.43256 + 200 31000 40300 34700 34622 916.35941 No difference proven at 95.0% confidence Similarly, no difference on GLB2.7: N Min Max Median Avg Stddev x 63 64.1 71.36 70.69 70.113175 1.6782026 + 63 63.6 71.18 70.75 70.223651 1.6044186 No difference proven at 95.0% confidence v2: Rebase on master (by anholt) v3: Add a missing BEGIN_BATCH(3) to aa_line_parameters -- CACHED_BATCH didn't have the asserts about batchbuffer usage that ADVANCE_BATCH does, so we started assertion failing. Signed-off-by: Kenneth Graunke <[email protected]> Signed-off-by: Eric Anholt <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Replace 8-wide and 16-wide with SIMD8 and SIMD16.Eric Anholt2014-01-176-44/+44
| | | | | | | | Those are the terms used in the docs, and think "n-wide" was something I just happened to say. Note that shader-db needs updating for the INTEL_DEBUG=fs parsing. Reviewed-by: Ian Romanick <[email protected]>
* i965: Stop doing our optimization on a copy of the GLSL IR.Eric Anholt2014-01-175-40/+28
| | | | | | | | | | | The original intent was that we'd keep a driver-private copy, and there would be the normal copy for swrast to make use of without the tuning (or anything more invasive we might do) specific to i965. Only, we don't generate swrast code any more, because swrast can't render current shaders anyway. Thus, our private copy is rather a waste, and we can just do our backend-specific operations on the linked shader. Reviewed-by: Ian Romanick <[email protected]>
* s/Tungsten Graphics/VMware/José Fonseca2014-01-17316-585/+585
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tungsten Graphics Inc. was acquired by VMware Inc. in 2008. Leaving the old copyright name is creating unnecessary confusion, hence this change. This was the sed script I used: $ cat tg2vmw.sed # Run as: # # git reset --hard HEAD && find include scons src -type f -not -name 'sed*' -print0 | xargs -0 sed -i -f tg2vmw.sed # # Rename copyrights s/Tungsten Gra\(ph\|hp\)ics,\? [iI]nc\.\?\(, Cedar Park\)\?\(, Austin\)\?\(, \(Texas\|TX\)\)\?\.\?/VMware, Inc./g /Copyright/s/Tungsten Graphics\(,\? [iI]nc\.\)\?\(, Cedar Park\)\?\(, Austin\)\?\(, \(Texas\|TX\)\)\?\.\?/VMware, Inc./ s/TUNGSTEN GRAPHICS/VMWARE/g # Rename emails s/[email protected]/[email protected]/ s/[email protected]/[email protected]/g s/jrfonseca-at-tungstengraphics-dot-com/jfonseca-at-vmware-dot-com/ s/jrfonseca\[email protected]/[email protected]/g s/keithw\[email protected]/[email protected]/g s/[email protected]/[email protected]/g s/thomas-at-tungstengraphics-dot-com/thellstom-at-vmware-dot-com/ s/[email protected]/[email protected]/ # Remove dead links s@Tungsten Graphics (http://www.tungstengraphics.com)@Tungsten Graphics@g # C string src/gallium/state_trackers/vega/api_misc.c s/"Tungsten Graphics, Inc"/"VMware, Inc"/ Reviewed-by: Brian Paul <[email protected]>
* mesa: fix GL_COLOR_SUM enum for drivers without ARB_vertex_programIlia Mirkin2014-01-162-3/+1
| | | | | | | | | | | | | | | | | | | | Commit c13970808 (mesa: GL_EXT_secondary_color is not optional) changed CHECK_EXTENSION2(EXT_secondary_color, ARB_vetex_program, cap) to CHECK_EXTENSION(ARB_vertex_program, cap) However CHECK_EXTENSION2 checks that either extension is available, not both. Remove the extension check entirely since the intent was for it to always be enabled. v2: Fix glGet*(GL_COLOR_SUM) too. Suggested by Ian. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Cc: 9.2 10.0 <[email protected]>
* mesa/main: Free ctx->DrawIndirectBuffer during teardownAaron Watry2014-01-161-0/+2
| | | | | | | | | | | | | | | | | | ctx->DrawIndirectBuffer wasn't being free'd in _mesa_free_buffer_objects With this patch, "valgrind --leak-check=full glxgears" on evergreen (CEDAR) now shows: LEAK SUMMARY: definitely lost: 0 bytes in 0 blocks indirectly lost: 0 bytes in 0 blocks possibly lost: 0 bytes in 0 blocks still reachable: 70,228 bytes in 651 blocks suppressed: 0 bytes in 0 blocks Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* mesa: Eliminate parameters to dd_function_table::ScissorIan Romanick2014-01-159-30/+31
| | | | | | | | The i830 and i915 drivers used them, but they didn't really need to. They will just be annoying in future patches. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: Eliminate parameters to dd_function_table::DepthRangeIan Romanick2014-01-157-11/+7
| | | | | | | No driver uses them. They will just be annoying in future patches. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: Eliminate parameters to dd_function_table::ViewportIan Romanick2014-01-1510-50/+11
| | | | | | | No driver uses them. They will just be annoying in future patches. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* radeon: Remove dead codeIan Romanick2014-01-151-9/+0
| | | | | | | | | A future patch will rename some of the fields of gl_viewport_attrib, and I don't want to update dead code that I can't test. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Cc: Dave Airlie <[email protected]>
* i915: Remove spurious calls to DepthRangeIan Romanick2014-01-152-9/+2
| | | | | | | | | For both i830 and i915, the driver DepthRange function just calls intelCalcViewport. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Cc: Eric Anholt <[email protected]>
* mesa: Add COMPRESSED_RGBA_S3TC_DXT1_EXT to COMPRESSED_TEXTURE_FORMATS for GLESIan Romanick2014-01-151-0/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ES and desktop GL specs diverge here. Yay! In desktop OpenGL, the driver can perform online compression of uncompressed texture data. GL_NUM_COMPRESSED_TEXTURE_FORMATS and GL_COMPRESSED_TEXTURE_FORMATS give the application a list of formats that it could ask the driver to compress with some expectation of quality. The GL_ARB_texture_compression spec calls this "suitable for general-purpose usage." As noted above, this means GL_COMPRESSED_RGBA_S3TC_DXT1_EXT is not included in the list. In OpenGL ES, the driver never performs compression. GL_NUM_COMPRESSED_TEXTURE_FORMATS and GL_COMPRESSED_TEXTURE_FORMATS give the application a list of formats that the driver can receive from the application. It is the *complete* list of formats. The GL_EXT_texture_compression_s3tc spec says: "New State for OpenGL ES 2.0.25 and 3.0.2 Specifications The queries for NUM_COMPRESSED_TEXTURE_FORMATS and COMPRESSED_TEXTURE_FORMATS include COMPRESSED_RGB_S3TC_DXT1_EXT, COMPRESSED_RGBA_S3TC_DXT1_EXT, COMPRESSED_RGBA_S3TC_DXT3_EXT, and COMPRESSED_RGBA_S3TC_DXT5_EXT." Note that the addition is only to the OpenGL ES specification! Signed-off-by: Ian Romanick <[email protected]> See-also: http://lists.freedesktop.org/archives/mesa-dev/2013-October/047439.html Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Brian Paul <[email protected]> Cc: "10.0" <[email protected]>
* scons: add new shaderimage.c file to the buildBrian Paul2014-01-151-0/+1
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* mesa: Validate image units when the texture state changes.Francisco Jerez2014-01-153-0/+23
| | | | | Reviewed-by: Chris Forbes <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* mesa: Unbind deleted textures from the shader image units.Francisco Jerez2014-01-151-0/+25
| | | | | | | | | | | | From ARB_shader_image_load_store: If a texture object bound to one or more image units is deleted by DeleteTextures, it is detached from each such image unit, as though BindImageTexture were called with <unit> identifying the image unit and <texture> set to zero. Reviewed-by: Chris Forbes <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* mesa: Add image parameter queries for ARB_shader_image_load_store.Francisco Jerez2014-01-153-0/+85
| | | | | | | v2: Fix off-by-one error in index parameter bound checking. Reviewed-by: Chris Forbes <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* mesa: Add ARB_shader_image_load_store to the extension table.Francisco Jerez2014-01-152-0/+2
| | | | | Reviewed-by: Chris Forbes <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* glapi: Update dispatch XML files for ARB_shader_image_load_store.Francisco Jerez2014-01-151-2/+2
| | | | | | | And uncomment the relevant lines of the dispatch sanity test. Reviewed-by: Chris Forbes <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* mesa: Implement the GL entry points defined by ARB_shader_image_load_store.Francisco Jerez2014-01-153-0/+520
| | | | | | | | | | v2: Name image format classes consistently, fix array and 3D teximage selection with layered = GL_FALSE, make sure that the user-specified layer is less than the number of texture layers, add some asserts. Reviewed-by: Chris Forbes <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* mesa: Add MESA_FORMAT_SIGNED_RG88 and _RG1616.Francisco Jerez2014-01-156-15/+153
| | | | | | | | | | | | Including pack/unpack and texstore code. ARB_shader_image_load_store requires support for the GL_RG8_SNORM and GL_RG16_SNORM formats, which map to MESA_FORMAT_SIGNED_GR88 and MESA_FORMAT_SIGNED_GR1616 on little-endian hosts, and MESA_FORMAT_SIGNED_RG88 and MESA_FORMAT_SIGNED_RG1616 respectively on big-endian hosts -- only the former were already present, add support for the latter. Acked-by: Chris Forbes <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* mesa: Add MESA_FORMAT_ABGR2101010.Francisco Jerez2014-01-156-0/+134
| | | | | | | | Including pack/unpack and texstore code. This texture format is a requirement for ARB_shader_image_load_store. Acked-by: Chris Forbes <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* mesa: Add driver interface for ARB_shader_image_load_store.Francisco Jerez2014-01-151-0/+13
| | | | | Reviewed-by: Chris Forbes <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* mesa: Add state data structures required for ARB_shader_image_load_store.Francisco Jerez2014-01-154-0/+108
| | | | | | | | v2: Increase MAX_IMAGE_UNITS to what i965 wants and add a separate MAX_IMAGE_UNIFORMS define, clarify a couple of comments. Reviewed-by: Chris Forbes <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* mesa: Define helper function to get the number of texture layers.Francisco Jerez2014-01-152-0/+93
| | | | | | | | | | | And to check if it can have layers at all. This will be used by the implementation of ARB_shader_image_load_store. v2: Fix constness of texobj argument, use assert and return reasonable default rather than calling unreachable() in default switch case. Reviewed-by: Paul Berry <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* st/mesa: use signed temporary variable to store _ColorDrawBufferIndexesEmil Velikov2014-01-151-1/+1
| | | | | | | | | | | The temporary variable used to store _ColorDrawBufferIndexes must be signed (GLint), otherwise the following conditional will be incorrectly evaluated. Leading to crashes in the driver/mesa or accessing/writing to arbitrary memory location. The bug dates back to 2009. Cc: 10.0 9.2 9.1 <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Emil Velikov <[email protected]>
* automake: include the git sha in the opengl version string for oot buildsEmil Velikov2014-01-151-6/+6
| | | | | | Acked-by: Chad Versace <[email protected]> Reviewed-by: Matt Turner <[email protected]> Signed-off-by: Emil Velikov <[email protected]>
* mesa: use signed temporary variable to store _ColorDrawBufferIndexesEmil Velikov2014-01-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | _ColorDrawBufferIndexes is defined as GLint* and using a GLuint* will result in the first part of the conditional to be evaluated to true always. Unintentionally introduced by the following commit, this will result in a driver segfault if one is using an old version of the piglit test bin/clearbuffer-mixed-format -auto -fbo commit 03d848ea1003abefd8fe51a5b4a780527cd852af Author: Marek Olšák <[email protected]> Date: Wed Dec 4 00:27:20 2013 +0100 mesa: fix interpretation of glClearBuffer(drawbuffer) This corresponding piglit tests supported this incorrect behavior instead of pointing at it. Cc: Marek Olšák <[email protected]> Cc: 10.0 9.2 9.1 <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Emil Velikov <[email protected]>
* nouveau: add framebuffer validation callbackIlia Mirkin2014-01-152-0/+52
| | | | | | | | | | Fixes assertions when trying to attach textures to fbs with formats not supported by the render engines. See https://bugs.freedesktop.org/show_bug.cgi?id=73459 Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* i965: Emit 3DSTATE_VF on Broadwell too.Kenneth Graunke2014-01-141-1/+1
| | | | | | | It's not just for Haswell. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Disable workaround flush for push constants on Broadwell.Kenneth Graunke2014-01-141-1/+1
| | | | | | | | If it wasn't necessary for Haswell, it's likely not to be necessary for Broadwell either. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
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