summaryrefslogtreecommitdiffstats
path: root/src/mesa
Commit message (Collapse)AuthorAgeFilesLines
* vbo: Flesh out implementation of indirect drawsChris Forbes2013-11-251-0/+218
| | | | | | | | | Based on part of Patch 2 of Christoph Bumiller's ARB_draw_indirect series. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* mesa: add indirect_offset, is_indirect to _mesa_primChris Forbes2013-11-254-1/+12
| | | | | | | | | V3: Add missing cases V4: Add indirect_offset here too Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Paul Berry <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* mesa: Add validation helpers for new indirect drawsChris Forbes2013-11-252-0/+218
| | | | | | | | | | | | | | | | | Based on part of Patch 2 of Christoph Bumiller's ARB_draw_indirect series. V3: - Disallow primcount==0 for DrawMulti*Indirect. The spec is unclear on this, but it's silly. We might go back on this later if it turns out to be a problem. - Make it clear that the caller has dealt with stride==0 V4: - Allow primcount==0 again. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Paul Berry <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* mesa: Add binding point for indirect bufferChris Forbes2013-11-254-0/+22
| | | | | | | | Based on part of Patch 2 of Christoph Bumiller's ARB_draw_indirect series. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* mesa: Add extension scaffolding for ARB_draw_indirectChris Forbes2013-11-253-0/+4
| | | | | | | | | | | We will reuse the same extension flag for ARB_multi_draw_indirect since it can always be supported by looping. Based on part of Patch 2 of Christoph Bumiller's ARB_draw_indirect series. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* glapi: add plumbing for GL_ARB_draw_indirect and GL_ARB_multi_draw_indirectChris Forbes2013-11-252-4/+39
| | | | | | | | Based on part of Patch 2 of Christoph Bumiller's ARB_draw_indirect series. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* mesa: add indirect drawing buffer parameter to draw functionsChristoph Bumiller2013-11-2518-27/+39
| | | | | | | | | | | | Split from patch implementing ARB_draw_indirect. v2: Const-qualify the struct gl_buffer_object *indirect argument. v3: Fix up some more draw calls for new argument. v4: Fix up rebase conflicts in i965. v5: Undo const-qualification Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* drop old INTEL_DEBUG names for `perf` (fall) and `fs` (wm)Chris Forbes2013-11-251-2/+0
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965: remove unused DEBUG_IOCTLChris Forbes2013-11-252-2/+0
| | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* radeon: change last instance of DEBUG_IOCTL to use RADEON_IOCTLChris Forbes2013-11-251-1/+1
| | | | | | | | | DEBUG_IOCTL comes from i965, and is about to be removed. Both defines have the same value (4). Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* st/mesa: respect higher GLSL levels. (v2)Dave Airlie2013-11-251-7/+3
| | | | | | | Limit the max glsl version level to what the state tracker supports. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* intel: enable GL_AMD_vertex_shader_layer extension for gen7+Jordan Justen2013-11-231-0/+1
| | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* mesa: initialize gl_renderbuffer::Depth in coreMarek Olšák2013-11-233-4/+1
| | | | | Reviewed-by: Ian Romanick <[email protected]> Tested-by: Ian Romanick <[email protected]>
* i965/fs: Make the first pre-allocation heuristic be the post heuristic.Eric Anholt2013-11-223-23/+44
| | | | | | | | | | | | | | | | | | | | I recently made us try two different things that tried to reduce register pressure so that we would be more likely to allocate successfully. But now that we have the logic for trying two, we can make the first thing we try be the normal, not-prioritizing-register-pressure heuristic. This means one less scheduling pass in the common case of that heuristic not producing spills, plus the best schedule we know how to produce, if that one happens to succeed. This is important, because our register allocation produces a lot of possibly avoidable dependencies for the post-register-allocation schedule, despite ra_set_allocate_round_robin(). GLB2.7: 1.04127% +/- 0.732461% fps improvement (n=31) nexuiz: No difference (n=5) lightsmark: 0.838512% +/- 0.300147% fps improvement (n=86) minecraft apitrace: No difference (n=15) Reviewed-by: Jordan Justen <[email protected]>
* i965: Fix streamed state dumping/annotation after the blorp-flush change.Eric Anholt2013-11-221-1/+0
| | | | | | | | | I think I was thinking of the batch command packet cache when I pasted this in, but this counter is only used for dumping out streamed state for INTEL_DEBUG=batch and for putting annotations in our aub files. Cc: "10.0" <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Let driconf clamp_max_samples affect context versionChad Versace2013-11-221-40/+20
| | | | | | | | | | | | | | | | | | | | | | | Commit 2f89662 added the driconf option 'clamp_max_samples'. In that commit, the option did not alter the context version. The neglect to alter the context version is a fatal issue for some apps. For example, consider running Chromium with clamp_max_samples=0. Pre-patch, Mesa creates a GL 3.0 context but clamps GL_MAX_SAMPLES to 0. This violates the GL 3.0 spec, which requires GL_MAX_SAMPLES >= 4. The spec violation causes WebGL context creation to fail in many scenarios because Chromium correctly assumes that a GL 3.0 context supports at least 4 samples. Since the driconf option was introduced largely for Chromium, the issue really needs fixing. This patch fixes calculation of the context version to respect the post-clamped value of GL_MAX_SAMPLES. This in turn fixes WebGL on Chromium when clamp_max_samples=0. Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* i965: Share code between intel_quantize_num_samples and clamp_max_samplesChad Versace2013-11-224-40/+37
| | | | | | | | | | | | | | | | | | clamp_max_samples() and intel_quantize_num_samples() each maintained their own list of which MSAA modes the hardware supports. This patch removes the duplication by making intel_quantize_num_samples() use the same list as clamp_max_samples(), the list maintained in brw_supported_msaa_modes(). By removing the duplication, we prevent the scenario where someone updates one list but forgets to update the other. Move function `brw_context.c:static brw_supported_msaa_modes()` to `intel_screen.c:(non-static) intel_supported_msaa_modes()` and patch intel_quantize_num_samples() to use the list returned by that function. Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* i965: Terminate brw_supported_msaa_modes() list with -1, not 0Chad Versace2013-11-221-5/+6
| | | | | | | | This simplifies the loop logic in a subsqequent patch that refactors intel_quantize_num_samples() to use brw_supported_msaa_modes(). Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
* st/mesa: simplify writemask for emitting fog resultBrian Paul2013-11-222-2/+2
| | | | Reviewed-by: José Fonseca <[email protected]>
* mesa: fix indentation in ffvertex_prog.cBrian Paul2013-11-221-12/+14
| | | | Reviewed-by: Roland Scheidegger <[email protected]>
* meta: Move declaration before code.Vinson Lee2013-11-211-1/+2
| | | | | | | | | | | | | | Fixes MSVC build. meta.c(2411) : error C2143: syntax error : missing ';' before 'type' meta.c(2411) : error C2143: syntax error : missing ')' before 'type' meta.c(2411) : error C2065: 'layer' : undeclared identifier meta.c(2411) : error C2059: syntax error : ')' meta.c(2411) : error C2143: syntax error : missing ';' before '{' meta.c(2413) : error C2065: 'layer' : undeclared identifier meta.c(2415) : error C2065: 'layer' : undeclared identifier Signed-off-by: Vinson Lee <[email protected]>
* mesa: Implement GL_FRAMEBUFFER_ATTACHMENT_LAYERED query.Paul Berry2013-11-211-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | From section 6.1.18 (Renderbuffer Object Queries) of the GL 3.2 spec, under the heading "If the value of FRAMEBUFFER_ATTACHMENT_OBJECT_TYPE is TEXTURE, then": If pname is FRAMEBUFFER_ATTACHMENT_LAYERED, then params will contain TRUE if an entire level of a three-dimesional texture, cube map texture, or one-or two-dimensional array texture is attached. Otherwise, params will contain FALSE. Fixes piglit tests: - spec/!OpenGL 3.2/layered-rendering/framebuffer-layered-attachments - spec/!OpenGL 3.2/layered-rendering/framebuffertexture-defaults Cc: "10.0" <[email protected]> Reviewed-by: Chris Forbes <[email protected]> v2: Don't include "EXT" in the error message, since this query only makes sensen in context versions that have adopted glGetFramebufferAttachmentParameteriv(). Reviewed-by: Ian Romanick <[email protected]>
* mesa: Fix texture target validation for glFramebufferTexture()Paul Berry2013-11-211-12/+47
| | | | | | | | | | | | | | | | | | | Previously we were using the code path for validating glFramebufferTextureLayer(). But glFramebufferTexture() allows additional texture types. Fixes piglit tests: - spec/!OpenGL 3.2/layered-rendering/gl-layer-cube-map - spec/!OpenGL 3.2/layered-rendering/framebuffertexture Cc: "10.0" <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Chris Forbes <[email protected]> v2: Clarify comment above framebuffer_texture(). Reviewed-by: Ian Romanick <[email protected]>
* i965: Fix fast clear of depth buffers.Paul Berry2013-11-211-2/+10
| | | | | | | | | | | | | | | | | From section 4.4.7 (Layered Framebuffers) of the GLSL 3.2 spec: When the Clear or ClearBuffer* commands are used to clear a layered framebuffer attachment, all layers of the attachment are cleared. This patch fixes the fast depth clear path. Fixes piglit test "spec/!OpenGL 3.2/layered-rendering/clear-depth". Cc: "10.0" <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965: Fix blorp clear of layered framebuffers.Paul Berry2013-11-211-7/+19
| | | | | | | | | | | | | | | | | From section 4.4.7 (Layered Framebuffers) of the GLSL 3.2 spec: When the Clear or ClearBuffer* commands are used to clear a layered framebuffer attachment, all layers of the attachment are cleared. This patch fixes the blorp clear path for color buffers. Fixes piglit test "spec/!OpenGL 3.2/layered-rendering/clear-color". Cc: "10.0" <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965: refactor blorp clear code in preparation for layered clears.Paul Berry2013-11-211-53/+66
| | | | | | | Cc: "10.0" <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* meta: fix meta clear of layered framebuffersPaul Berry2013-11-211-3/+48
| | | | | | | | | | | | | | | | | | | From section 4.4.7 (Layered Framebuffers) of the GLSL 3.2 spec: When the Clear or ClearBuffer* commands are used to clear a layered framebuffer attachment, all layers of the attachment are cleared. This patch fixes meta clears to properly clear all layers of a layered framebuffer attachment. We accomplish this by adding a geometry shader to the meta clear program which sets gl_Layer to a uniform value. When clearing a layered framebuffer, we execute in a loop, setting the uniform to point to each layer in turn. Cc: "10.0" <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* mesa: Track number of layers in layered framebuffers.Paul Berry2013-11-215-6/+21
| | | | | | | | | | | | | | | | | | | | In order to properly clear layered framebuffers, we need to know how many layers they have. The easiest way to do this is to record it in the gl_framebuffer struct when we check framebuffer completeness. This patch replaces the gl_framebuffer::Layered boolean with a gl_framebuffer::NumLayers integer, which is 0 if the framebuffer is not layered, and equal to the number of layers otherwise. v2: Remove gl_framebuffer::Layered and make gl_framebuffer::NumLayers always have a defined value. Fix factor of 6 error in the number of layers in a cube map array. Cc: "10.0" <[email protected]> Reviewed-by: Chris Forbes <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Enable the AMD_performance_monitor extension on Gen5+.Kenneth Graunke2013-11-211-0/+61
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Take "bookend" OA snapshots at the start/end of each batch.Kenneth Graunke2013-11-213-9/+379
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unfortunately, our hardware only has one set of aggregating performance counters shared between all 3D programs, and their values are not saved or restored by hardware contexts. Also, at least on Sandybridge and Ivybridge, the counters lose their values if the GPU goes to sleep. To work around both of these problems, we have to snapshot the performance counters at the beginning and end of each batch, similar to how we handle query objects on platforms that don't support hardware contexts. I call these "bookend" snapshots. Since there can be multiple performance monitors active at a time, we store the bookend snapshots in a global BO, shared by all monitors. For monitors that span multiple batches, acquiring results involves adding up three segments: BeginPerfMonitor --> End of Batch 1 ("head") Start of Batch 2 --> End of Batch 2 ... ("middle") Start of Batch N-1 --> End of Batch N-1 Start of Batch N --> EndPerfMonitor ("tail") Monitors that refer to bookend BO snapshots are considered "unresolved". We delay resolving them (and adding up deltas to obtain the results) as long as possible to avoid blocking on mapping monitor->oa_bo. We can also run out of space in the bookend BO, at which point we have to resolve all unresolved monitors. Then we can throw away the snapshots and begin writing at the beginning of the buffer. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Reserve batchbuffer space for a closing MI_REPORT_PERF_COUNT.Kenneth Graunke2013-11-211-1/+7
| | | | | | | | | | | | | | | | | | | In order to use the Observability Architecture effectively, we'll need to take snapshots of the OA counters via MI_REPORT_PERF_COUNT at the start and end of each batch. Experimentation reveals that we need to flush before and after each MI_REPORT_PERF_COUNT to get working values. For simplicitly, I chose to use intel_batchbuffer_emit_mi_flush(), which unfortunately expands to triple pipe controls on Sandybridge. We may want to start computing per-generation reserved batch space to avoid the insanity of Sandybridge's PIPE_CONTROL cost. That said, much of this cost existed before I rewrote the query object support to use hardware contexts, so it's at least not entirely new. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Add some plumbing for gathering OA results.Kenneth Graunke2013-11-211-0/+91
| | | | | | | | | Currently, this only considers the monitor start and end snapshots. This is woefully insufficient, but allows me to add a bunch of the infrastructure now and flesh it out later. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Start and stop OA counters as necessary.Kenneth Graunke2013-11-214-1/+61
| | | | | | | | | | | | | We need to start OA at the beginning of each batch where monitors are active. OACONTROL isn't part of the hardware context, so to avoid leaving counters enabled for other applications, we turn them off at the end of the batch too. We also need to start them at BeginPerfMonitor time (unless they've already been started). We stop them when the monitor last ends as well. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Add functions to start and stop the OA counters.Kenneth Graunke2013-11-211-0/+42
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Add #defines for the OACONTROL register and fields.Kenneth Graunke2013-11-211-0/+4
| | | | | | | We'll need to write this register to start/stop performance counters. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Take OA counter snapshots at Begin/EndPerfMonitor time.Kenneth Graunke2013-11-211-1/+37
| | | | | Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Add a function to emit the MI_REPORT_PERF_COUNT packet.Kenneth Graunke2013-11-211-0/+76
| | | | | | | | | | | | | MI_REPORT_PERF_COUNT writes a snapshot of the Observability Architecture counters to a buffer. Exactly how it works varies between generations: Ironlake requires two packets, Sandybridge has to use GGTT, and Ivybridge and later use PPGTT. v2: Assert that we didn't use more space than we reserved (suggested by Eric Anholt). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Track the number of monitors that need OA counters.Kenneth Graunke2013-11-212-1/+19
| | | | | | | | | Using the OA counters requires some per-batch work. When starting and ending a batch, it's useful to know whether any monitors are actually interested in OA data. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Enumerate Observability Architecture counters on Gen5+.Kenneth Graunke2013-11-212-0/+306
| | | | | | | | | | | | | | | In addition to listing the counter names, we include several "remap" tables. Confusingly, counters are documented with names like "A23", are written to some buffer offset other than 23, and exposed by core Mesa under a counter ID that is different still. The first is inevitable; MI_REPORT_PERF_COUNT writes certain counters to fixed locations in the buffer. The latter could be avoided, but core Mesa uses the "Counters" array index as the ID for a counter. We could do remapping there, but it would just complicate the core Mesa code. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Expose pipeline statistics registers via performance monitors.Kenneth Graunke2013-11-211-5/+141
| | | | | | | | | | | | | This is fairly simple: - At BeginPerfMonitor time, take an opening snapshot. - At EndPerfMonitor time, take a closing snapshot. - The first time the application asks for results, subtract the two and store that value. Then free the BO containing the snapshots. - On subsequent requests for the results, just return the saved value. - On reset, throw away the results. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Enumerate the pipeline statistics register counters on Gen6+.Kenneth Graunke2013-11-212-0/+83
| | | | | | | | | | | | For now, we only support these on Gen6+, since that's what currently uses hardware contexts. When we add Ironlake hardware context support, we can add pipeline statistics register support for that as well. In theory, we could support pipeline statistics counters even without hardware contexts, but it would be annoyingly painful. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Initialize performance monitor Groups/NumGroups.Kenneth Graunke2013-11-211-1/+35
| | | | | | | Since we don't support any counters, there are zero groups. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Add macros for creating performance monitor counters and groups.Kenneth Graunke2013-11-211-0/+26
| | | | | | | | | | The Observability Architecture counters are 32-bit unsigned values, and the Pipeline Statistics Register counters are 64-bit unsigned values. These convenience macros make it easy to create those types of counters. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Periodically dump the list of monitors if INTEL_DEBUG=perfmon.Kenneth Graunke2013-11-211-0/+3
| | | | | | | | It's useful to see the state of all outstanding monitors; the start of a new batch seems like a reasonable time to print them out. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Add basic driver hooks and plumbing for AMD_performance_monitor.Kenneth Graunke2013-11-214-0/+228
| | | | | | | These stub functions will be filled out in later patches. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Add INTEL_DEBUG=perfmon support.Kenneth Graunke2013-11-212-0/+2
| | | | | | | This will enable debugging printfs for the AMD_performance_monitor code. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Move brw_emit_query_begin() to the render ring prelude.Kenneth Graunke2013-11-212-2/+8
| | | | | | | | | | | | | | | | | | | Without hardware contexts, the pipeline statistics registers are free-running and include data from every 3D application running. In order to find out the contributions of one particular context, we need to take a snapshot at the start and end of each batch. Previously, we emitted the PIPE_CONTROL necessary to capture PS_DEPTH_COUNT when drawing primitives. Special tracking ensured it happened only on the first draw of the batch, rather than on every draw. Moving this to brw_new_batch increases symmetry, since the final snapshot has always been in brw_finish_batch, which is just a few lines below. It should be basically equivalent. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Introduce a "render ring prelude" hook.Kenneth Graunke2013-11-212-0/+10
| | | | | | | | | | The new intel_batchbuffer_emit_render_ring_prelude() hook will be called when switching from BLT or UNKNOWN_RING to RENDER_RING. This provides a place to emit state that should go at the start of each render ring batch, with minimal overhead. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Introduce an UNKNOWN_RING state.Kenneth Graunke2013-11-213-3/+17
| | | | | | | | | | | | | | | | | | | When we first create a batch buffer, it's empty. We don't actually know what ring it will be targeted at until the first BEGIN_BATCH or BEGIN_BATCH_BLT macro. Previously, one could determine the state of the batch by checking brw->batch.ring (blit vs. render) and brw->batch.used != 0 (known vs. unknown). This should be functionally equivalent, but the tri-state enum is a bit clearer. v2: Catch three explicit require_space callers (thanks to Carl and Eric). v3: Split the boolean -> enum change from the UNKNOWN_RING change. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Convert brw->batch.is_blit to a BLT_RING/RENDER_RING enum.Kenneth Graunke2013-11-216-23/+29
| | | | | | | | Passing BLT_RING or RENDER_RING to batchbuffer functions is a lot more obvious than passing true or false. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-29 00:43:20 +0000