summaryrefslogtreecommitdiffstats
path: root/src/mesa
Commit message (Collapse)AuthorAgeFilesLines
* mesa/st: compute support for glsl_to_nirRob Clark2017-05-044-1/+32
| | | | | Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* mesa/tests: remove no longer needed HAVE_SHARED_GLAPI defineEmil Velikov2017-05-041-2/+0
| | | | | Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* drivers/x11: remove unneeded GLX_SHARED_GLAPI defineEmil Velikov2017-05-041-2/+0
| | | | | | | There's no users in-tree that use it. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* mesa/dri: remove unneeded HAVE_SHARED_GLAPI guardEmil Velikov2017-05-041-5/+1
| | | | | | | | | | | Always true, since the dri modules required shared glapi. With earlier commit (da410e6afad "configure: explicitly require shared glapi for enable-dri") we even made that explicit during the configure stage. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* mesa/dri: always link against shared glapiEmil Velikov2017-05-041-7/+9
| | | | | | | | | Analogous to previous commit. Check with the extensive commit description and bug report referenced. Cc: [email protected] Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* glsl: rename image_* qualifiers to memory_*Samuel Pitoiset2017-05-041-3/+3
| | | | | | | | | It doesn't make sense to prefix them with 'image' because they are called "Memory Qualifiers" and they can be applied to members of storage buffer blocks. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Andres Gomez <[email protected]>
* i965: Port gen4+ state emitting code to genxml.Rafael Antognolli2017-05-035-230/+174
| | | | | | | | | | | | | | | | On this patch, we port: - brw_polygon_stipple - brw_polygon_stipple_offset - brw_line_stipple - brw_drawing_rect v2: - Also emit states for gen4-5 with this code. v3: - Style fixes and remove excessive checks (Ken). Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Port gen6+ 3DSTATE_CC_STATE_POINTERS state to genxml.Rafael Antognolli2017-05-034-95/+50
| | | | | Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Port gen6+ multisample state emitting code to genxml.Rafael Antognolli2017-05-035-136/+96
| | | | | | | | | | | Emit 3DSTATE_MULTISAMPLE using brw_batch_emit. v3: - Remove dead code (Ken) - Simplify #if/#endif (Ken) Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Port gen4+ emit vertices code to genxml.Rafael Antognolli2017-05-034-792/+556
| | | | | | | | | | | | | | | | | | | Some code that was placed in brw_draw_upload.c and exported to be used by gen8+ was also moved to genX_state_upload, and the respective symbols are not exported anymore. v2: - Remove code from brw_draw_upload too - Emit vertices for gen4-5 too. - Use helper to setup brw_address (Kristian) - Use macros for MOCS values. - Do not use #ifndef NDEBUG on code that is actually used (Ken) v3: - Style and code clenup (Ken) - Keep some of the common code inside brw_draw_upload.c (Ken) Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Port push constant code to genxml.Rafael Antognolli2017-05-039-385/+226
| | | | | | | | | | | | | | | | | | | The following states are ported on this patch: - gen6_gs_push_constants - gen6_vs_push_constants - gen6_wm_push_constants - gen7_tes_push_constants v2: - Use helper to setup brw_address (Kristian) v3: - Do not use macro for upload_constant_state (Ken) - Do not re-declare MOCS macro (Ken) v4: (by Ken) - Drop more dead code, change brw->gen checks to GEN_GEN, style nits Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Port gen6+ 3DSTATE_SCISSOR_STATE_POINTERS to use genxml.Rafael Antognolli2017-05-034-116/+87
| | | | | | | | | | | | Emit 3DSTATE_SCISSOR_STATE_POINTERS using brw_batch_emit, and pack the scissor states using GENX(SCISSOR_RECT_pack), generated from genxml. v3: - Remove old code (Ken) - Style fixes (Ken) Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Port gen7+ 3DSTATE_TE to genxml.Rafael Antognolli2017-05-034-71/+39
| | | | | | | Emit 3DSTATE_TE on Gen7+ using brw_batch_emit helper. Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Port gen6+ blend state code to genxml.Rafael Antognolli2017-05-035-522/+312
| | | | | | | | | | | | | | Upload blend states using GENX(BLEND_STATE_ENTRY_pack), generated from genxml. v3: - style fixes (Ken) - cleanup to remove excessive #ifdef's (Ken) - remove memset (Ken) - disable blend.AlphaToCoverageDitherEnable on gen6 (Ken) Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Port gen6+ state emitting code to genxml.Rafael Antognolli2017-05-0313-1180/+471
| | | | | | | | | | | | | | | Ported in this patch: - 3DSTATE_DS - 3DSTATE_GS - 3DSTATE_HS - 3DSTATE_VIEWPORT_STATE_POINTERS_SF_CL v3: - Remove NEW_TRANSFORM blocks (Ken) - Bring back some comments and workaround for Ivybridge (Ken) Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Port gen6+ 3DSTATE_VS to genxml.Rafael Antognolli2017-05-036-304/+124
| | | | | | | | | | | | | | Emit 3DSTATE_VS on Gen6+ using brw_batch_emit helper, that uses pack structs from genxml. v2: - Use render_bo helper to setup brw_address (Kristian) v3: - Bring back some comments for gen6 and remove _NEW_TRANSFORM blocks from gen7+. Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Port gen8+ 3DSTATE_PS_EXTRA to genxml.Rafael Antognolli2017-05-034-150/+88
| | | | | | | | | | | Emit 3DSTATE_PS_EXTRA on Gen8+ using brw_batch_emit helper, that uses pack structs from genxml. v3: - Style fixes and moving code around to be cleaner (Ken) Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Port gen6+ 3DSTATE_WM to genxml.Rafael Antognolli2017-05-036-435/+185
| | | | | | | | | | | | | | | Emit 3DSTATE_WM on Gen6+ using brw_batch_emit helper, that uses pack structs from genxml. v2: - Use render_bo helper to setup brw_address (Kristian) - Remove TODO and use BRW_PSCDEPTH_OFF. v3: - A couple of style fixes (Ken) - Enable RASTRULE_UPPER_RIGHT on gen6+ instead of gen8+ (Ken) Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Port gen7+ 3DSTATE_PS to genxml.Rafael Antognolli2017-05-034-255/+134
| | | | | | | | | | | | | | | Emit 3DSTATE_PS on Gen7+ using brw_batch_emit helper, that uses pack structs from genxml. v2: - Use render_bo helper to setup brw_address (Kristian) v3: - Style fixes and code cleanup (Ken) v4: - More style fixes and code cleanup missed in v3 Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Port gen7+ 3DSTATE_SOL to genxml.Rafael Antognolli2017-05-035-412/+338
| | | | | | | | | | | | | | | Emit 3DSTATE_SOL on Gen7+ using brw_batch_emit helper, that uses pack structs from genxml. v2: - Add helpers to assign struct brw_address (Kristian) v3: - Rename MOCS -> SOBufferMOCS - Do not re-declare MOCS macros (Ken). - Style and code reorganization (Ken). Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Remove calculate_attr_overrides.Rafael Antognolli2017-05-033-274/+0
| | | | | | | This function now lives inside genX_state_upload.c. Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Port Gen7+ 3DSTATE_SBE state to genxml.Rafael Antognolli2017-05-035-274/+116
| | | | | | | | | | | | Emit 3DSTATE_SBE on Gen7+ using brw_batch_emit helper, that uses pack structs from genxml. v2: - Use ACTIVE_COMPONENT_XYZW from gen9.xml. v3: - Style fixes (Ken) v4: #undef unconditionally (Ken) Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Port gen6+ 3DSTATE_SF to genxml.Rafael Antognolli2017-05-035-424/+417
| | | | | | | | | | | | | Emit sf state on Gen6+ using brw_batch_emit helper, using pack structs from genxml. v3: - Reorganize code and reduce #if/#endif's (Ken) - Style fixes (Ken) - Always set AALINEDISTANCE_TRUE (Ken) Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Add brw_get_line_width_float.Rafael Antognolli2017-05-031-11/+14
| | | | | | | | That helper function returns the line width as a float, and is then used by brw_get_line_width to return the fixed point width. Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Port Gen8+ 3DSTATE_RASTER state to genxml.Rafael Antognolli2017-05-033-127/+123
| | | | | | | | | | | Emits 3DSTATE_RASTER from genX_state_upload.c using pack structs from genxml. v3: - Style fixes (Ken) Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Port Gen6+ 3DSTATE_CLIP state to genxml.Rafael Antognolli2017-05-033-143/+135
| | | | | | | | | | | | | | | Emit clip state on Gen6+ using brw_batch_emit helper, using pack structs from genxml. v3: - Lots style fixes (Ken) - Do not set CullTestEnableBitMask on Gen8+ (Ken) v4: - Do not include brw_defines_common.h. v5 (Ken): s/BRW_NEW_WM_PROG_DATA/BRW_NEW_FS_PROG_DATA/ Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Port Gen6+ DEPTH_STENCIL state to genxml.Kenneth Graunke2017-05-035-238/+101
| | | | | | | | | | | | This emits 3DSTATE_WM_DEPTH_STENCIL on Gen8+ or DEPTH_STENCIL_STATE (and the relevant pointer packets) on Gen6-7.5 from a single function. v3: - Watch for BRW_NEW_BATCH too on gen < 8 (Ken) Signed-off-by: Kenneth Graunke <[email protected]> Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Get real per-gen atom listsKenneth Graunke2017-05-033-368/+370
| | | | | | | | Make atoms initalization compile conditionally based on the target platform. Signed-off-by: Kenneth Graunke <[email protected]> Signed-off-by: Rafael Antognolli <[email protected]>
* i965: Add genxml related plumbing in a new genX_state_upload.c file.Kenneth Graunke2017-05-033-5/+140
| | | | | | | | v3 (Rafael): Drop aub parameter v4 (Ken): Squash in gen4/g45 automake fixes Signed-off-by: Kenneth Graunke <[email protected]> Signed-off-by: Rafael Antognolli <[email protected]>
* i965: Drop "Destination Element Offset" from Ironlake SGVs.Kenneth Graunke2017-05-031-2/+4
| | | | | | | | | | | | | | The Ironlake documentation is terrible, so it's unclear whether or not this field exists there. It definitely doesn't exist on Sandybridge and later. It definitely does exist on G45. We haven't been setting it for our normal vertex attributes - just the SGVs (VertexID, InstanceID, BaseVertex, BaseInstance, DrawID). We should be consistent. My guess is that it isn't necessary and doesn't exist - this patch drops it from the SGVs elements, making them follow the behavior of most attributes. Reviewed-by: Rafael Antognolli <[email protected]>
* st/glsl_to_tgsi: remove unrequired tgsi_get_opcode_info() callTimothy Arceri2017-05-041-1/+1
| | | | | | | This is already set for the instruction at initialisation. Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* mesa: make _mesa_accum() staticTimothy Arceri2017-05-042-57/+54
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* mesa: tidy up accum.hTimothy Arceri2017-05-041-2/+0
| | | | | | These were unused. Reviewed-by: Samuel Pitoiset <[email protected]>
* mesa/varray: make use of dispatch KHR_no_error supportTimothy Arceri2017-05-042-177/+355
| | | | | | Make use of dispatch KHR_no_error support for varray functions. Reviewed-by: Nicolai Hähnle <[email protected]>
* i965: Move MOCS macros to brw_context.h.Rafael Antognolli2017-05-032-42/+41
| | | | | | | | | | | | These macros are defined in brw_defines.h, which contains a lot of macros that conflict with autogenerated code from genxml. But we need to use them (the MOCS macros) in some of that same genxml code. Moving them to brw_context.h solves that problem and we don't have to include brw_defines.h. Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* compiler: Add a system value and varying for ViewIndexJason Ekstrand2017-05-031-0/+2
| | | | | Reviewed-by: Iago Toral Quiroga <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* mesa/vbo: reduce prim array sizeBartosz Tomczyk2017-05-031-37/+37
| | | | | | | | | We always use only single element. v2: Change single element arrays to variables Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* mesa: add const qualifier on _mesa_valid_to_render()Brian Paul2017-05-032-2/+2
| | | | Reviewed-by: Marek Olšák <[email protected]>
* glsl: set vector_elements to 1 for samplersSamuel Pitoiset2017-05-021-10/+5
| | | | | | | | | | | | | | | | I don't see any reasons why vector_elements is 1 for images and 0 for samplers. This increases consistency and allows to clean up some code a bit. This will also help for ARB_bindless_texture. No piglit regressions with RadeonSI. This time the Intel CI system doesn't report any failures. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* i965: Solve Android native fence fd double closeRandy Xu2017-05-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The Android native fence in i965 has two fds: _EGLSync::SyncFd and brw_fence::sync_fd. The semantics of __DRI2fenceExtensionRec::create_fence_fd are unclear on whether the DRI driver takes ownership of the incoming fd (which is the same incoming fd from eglCreateSync). i965 did take ownership, but all other Mesa drivers do not; instead, they dup the incoming fd. As a result, _EGLSync::SyncFd and brw_fence::sync_fd were the same fd, and both egl_dri2 and i965 believed they owned it. On eglDestroySync, that led to a double-close. Fix the double-close by making brw_dri_create_fence_fd dup the incoming fd, just like the other drivers do. Signed-off-by: Randy Xu <[email protected]> Test: Run Vulkan and GLES stress test and no crash. Fixes: 6403e376511 ("i965/sync: Implement fences based on Linux sync_file") Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Chad Versace <[email protected]> [chadv: Polish the commit message] Cc: [email protected]
* i965: Don't allocate uniform space for samplersTimothy Arceri2017-05-011-1/+1
| | | | | | | | | | | | | | Samplers are encoded into the instruction word, so there's no need to make space in the uniform file. Previously matrix_columns and vector_elements were set to 0, making this else case a no-op. Commit 75a31a20af26 changed that, causing malloc corruption in thousands of tests on i965. Fixes: 75a31a20af26 ("glsl: set vector_elements to 1 for samplers") Reviewed-by: Jason Ekstrand <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100871
* i965: Drop BRW_NEW_CONTEXT from 3DSTATE_DS/GS on Gen7-7.5.Kenneth Graunke2017-04-282-2/+0
| | | | | | | We already have BRW_NEW_BATCH, which completely covers all the cases that BRW_NEW_CONTEXT would handle. Drop it. Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Drop _NEW_TRANSFORM from 3DSTATE_DS/GS on Gen7-7.5.Kenneth Graunke2017-04-282-2/+2
| | | | | | There's no reason for this as far as I can tell. Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Set point rasterization rule to UPPER_RIGHT on Gen6-7.5.Kenneth Graunke2017-04-282-0/+3
| | | | | | | | | | | | | | | Gen4-5 and Gen8+ already set this, but Gen6-7.5 did not. We ought to be consistent - the answer depends on the API, not the hardware generation. The Sandybridge PRM says about RASTRULE_UPPER_RIGHT: "To match OpenGL point rasterization rules (round to +infinity, where this is the upper right direction wrt OpenGL screen origin of lower left). So this is likely the one we should use. Reviewed-by: Rafael Antognolli <[email protected]>
* i965: Always set AALINEDISTANCE_TRUE on Sandybridge.Kenneth Graunke2017-04-281-2/+1
| | | | | | | | We set this unconditionally on every other platform. Zero (Manhattan) isn't even listed as an option in the Sandybridge docs - only "true". Reviewed-by: Plamena Manolova <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* i965: Use true AA line distance on G45/Ironlake.Kenneth Graunke2017-04-281-1/+1
| | | | | | | | | | | | | | | | | | The original Broadwater and Crestline platforms computed antialiased line distances using "manhattan" distance, aka a + b = c. Eaglelake and Cantiga added "true" distance, which apparently does something like max(a, b) + min(a, b) / 4. Not exactly "true", but at least more accurate. The G45 documentation indicates that the old manhattan distance setting is "only for debug purposes" and should never be used. The Ironlake documentation no longer mentions AALINEDISTANCE_MANHATTAN, though it does still contain the narrative about the feature. At any rate, we should use the more accurate mode. Reviewed-by: Plamena Manolova <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* st/mesa: use min_index and max_index directly from vboMarek Olšák2017-04-281-7/+2
| | | | | | also remove the incorrect comment about primitive restart. Reviewed-by: Nicolai Hähnle <[email protected]>
* vbo: set min_index = 0 so gallium can use the value directlyMarek Olšák2017-04-282-4/+4
| | | | | | | We could also remove index_bounds_valid and use max_index != ~0 instead. Opinions on that are welcome. Reviewed-by: Nicolai Hähnle <[email protected]>
* st/mesa: add more fallback gallium formats for GL integer formatsBrian Paul2017-04-281-25/+25
| | | | | | | | | | | | | | | The VMware driver has a limited set of integer texture formats. We often have to fall back to 4-component formats when 1- or 2-component formats are missing. This fixes about 8 integer texture Piglit tests with the VMware driver on Linux. We've had this code in-house for a long time but I guess it was never up-streamed to Mesa master. This shouldn't regress any other drivers since we're either choosing an earlier format in the list, or failing anyway. Reviewed-by: Marek Olšák <[email protected]>
* mesa: optimize color_buffer_writes_enabled()Brian Paul2017-04-281-4/+5
| | | | | | | | | | Return as soon as we find an existing color channel that's enabled for writing. Typically, this allows us to return true on the first loop iteration intead of doing four iterations. No piglit regressions. Reviewed-by: Marek Olšák <[email protected]>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-21 00:06:14 +0000