summaryrefslogtreecommitdiffstats
path: root/src/mesa
Commit message (Expand)AuthorAgeFilesLines
...
* i965/blorp: wrap MOV (/brw_MOV(&func, /emit_mov(/)Topi Pohjolainen2014-01-232-35/+45
* i965/blorp: wrap emission of if-equal-assignmentTopi Pohjolainen2014-01-232-24/+12
* i965/blorp: wrap emission of conditional assignmentTopi Pohjolainen2014-01-232-15/+15
* i965/blorp: move emission of sample combining into eu-emitterTopi Pohjolainen2014-01-233-9/+24
* i965/blorp: move emission of rt-write into eu-emitterTopi Pohjolainen2014-01-233-10/+28
* i965/blorp: move emission of texture lookup into eu-emitterTopi Pohjolainen2014-01-233-22/+60
* i965/fs: introduce non-compressed equivalent of tex_cmsTopi Pohjolainen2014-01-234-0/+13
* i965: rename tex_ms to tex_cmsTopi Pohjolainen2014-01-2310-17/+17
* i965/blorp: move emission of pixel kill into eu-emitterTopi Pohjolainen2014-01-233-25/+38
* i965/blorp: introduce separate eu-emitter for blit compilerTopi Pohjolainen2014-01-234-38/+113
* i965: Support 32 texture image units on Haswell+.Kenneth Graunke2014-01-222-4/+7
* i965/fs: Switch from BRW_MAX_TEX_UNIT to the actual limit.Kenneth Graunke2014-01-221-1/+2
* mesa: Bump MAX_TEXTURE_IMAGE_UNITS to 32.Kenneth Graunke2014-01-221-1/+1
* i965/vec4: Support arbitrarily large sampler state indices on Haswell+.Kenneth Graunke2014-01-222-3/+26
* i965/vec4: Refactor sampler message setup.Kenneth Graunke2014-01-221-17/+22
* i965/vec4: Don't set header_present if texel offsets are all 0.Kenneth Graunke2014-01-221-9/+8
* i965/fs: Support arbitrarily large sampler state indices on Haswell+.Kenneth Graunke2014-01-222-2/+22
* i965/fs: Plumb sampler index into emit_texture_gen7.Kenneth Graunke2014-01-223-4/+4
* i965/fs: Refactor sampler message header to duplicate less code.Kenneth Graunke2014-01-221-25/+21
* i965: Use get_element_ud to shorten texture header access.Kenneth Graunke2014-01-221-2/+1
* intel: Fix initial MakeCurrent for single-buffer drawablesKristian Høgsberg2014-01-221-6/+4
* meta: Move loop variable declaration outside loop.Vinson Lee2014-01-211-1/+3
* i965/blorp: use BRW_COMPRESSION_2NDHALF for second half LPRTopi Pohjolainen2014-01-222-28/+42
* i965/blorp: patch jump counters also for endifTopi Pohjolainen2014-01-222-3/+5
* mesa: Change redundant code into loops in texstate.c.Paul Berry2014-01-211-46/+29
* mesa: Change redundant code into loops in shaderapi.c.Paul Berry2014-01-211-30/+9
* mesa: Remove ad-hoc arrays of gl_shader_program.Paul Berry2014-01-213-15/+3
* meta: Replace save_state::{Vertex,Geometry,Fragment}Shader with an array.Paul Berry2014-01-211-16/+14
* i965: Fix comments to refer to the new ctx->Shader.CurrentProgram array.Paul Berry2014-01-213-6/+6
* mesa: Fold long lines introduced by the previous patch.Paul Berry2014-01-218-17/+32
* mesa: Replace ctx->Shader.Current{Vertex,Fragment,Geometry}Program with an ar...Paul Berry2014-01-2128-85/+84
* mesa: use _mesa_validate_shader_target() more frequently.Paul Berry2014-01-212-4/+4
* main: Allow ctx == NULL in _mesa_validate_shader_target().Paul Berry2014-01-211-3/+10
* mesa: Make validate_shader_target() non-static.Paul Berry2014-01-212-4/+7
* mesa: Replace _mesa_program_index_to_target with _mesa_shader_stage_to_program.Paul Berry2014-01-214-21/+4
* mesa: Generate GL_INVALID_OPERATION for unsupported DSA TexStorage functionsIan Romanick2014-01-211-3/+15
* mesa: Silence many unused parameter warningsIan Romanick2014-01-211-0/+22
* i965: Ignore 'centroid' interpolation qualifier in case of persample shadingAnuj Phogat2014-01-211-1/+1
* i965: Use sample barycentric coordinates with per sample shadingAnuj Phogat2014-01-214-6/+30
* i965: Add an option to ignore sample qualifierAnuj Phogat2014-01-215-7/+9
* mesa/x86: Remove dead read_rgba_span_x86.h.Matt Turner2014-01-211-56/+0
* i965/fs: Optimize LRP with x == y into a MOV.Matt Turner2014-01-211-0/+10
* i965: Enable AOS optimizations for the geometry shader.Matt Turner2014-01-211-0/+1
* mesa: rename PreferDP4 to OptimizeForAOS.Matt Turner2014-01-217-9/+12
* i965/fs: Print the maximum register pressure.Matt Turner2014-01-211-1/+3
* i965/fs: Show register pressure in dump_instructions() output.Kenneth Graunke2014-01-213-1/+16
* i965: Compute the number of live registers at each IP.Kenneth Graunke2014-01-213-0/+22
* i965/fs: Call opt_peephole_sel later in the optimization loop.Matt Turner2014-01-211-1/+1
* i965/fs: Calculate interference better in register_coalesce.Matt Turner2014-01-211-7/+72
* i965/fs: Support coalescing registers of size > 1.Matt Turner2014-01-211-23/+59
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-17 07:41:35 +0000