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* Remove Bluegene/L wrappersEmil Velikov2014-09-272-10/+4
| | | | | | | | | Added back in 2009, with osmesa/GLU in mind. Unlikely to be working any more since the removal of the static makefiles. Cc: Brian Paul <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* mesa: remove last DJGPP remainsEmil Velikov2014-09-274-14/+5
| | | | | Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* st/mesa: Use PIPE_USAGE_STAGING for GL_STATIC/DYNAMIC/STREAM_READ buffersMichel Dänzer2014-09-261-3/+5
| | | | | | | | | Such buffers can only be useful by reading from them with the CPU, so we need to make sure CPU reads are fast. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84178 Reviewed-by: Marek Olšák <[email protected]> Cc: [email protected]
* nouveau: fix glCompressedTexImageIlia Mirkin2014-09-251-13/+52
| | | | | | | | mesa_texstore expects pixel data, not compressed data. For compressed textures, we want to just copy the bits in without any conversion. Signed-off-by: Ilia Mirkin <[email protected]> Acked-by: Francisco Jerez <[email protected]>
* mesa/st: NumLayers is only valid for array texturesIlia Mirkin2014-09-253-3/+5
| | | | | | | | | | | For 3d textures, NumLayers is set to 1, which is not what we want. This fixes the newly added gl-layer-render-storage test (which constructs immutable 3d textures). Fixes regression introduced in d82bd7eb060. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84145 Signed-off-by: Ilia Mirkin <[email protected]> Tested-by: Michel Dänzer <[email protected]> Acked-by: Chris Forbes <[email protected]>
* mesa: Replace IS_NEGATIVE(x) with x < 0.0f.Matt Turner2014-09-254-15/+8
| | | | | | | | I only made IS_NEGATIVE(x) use signbit in commit 0f3ba405 in an attempt to fix 54805, but it didn't help. We didn't use signbit on some platforms and instead defined it to x < 0.0f. Reviewed-by: Kenneth Graunke <[email protected]>
* radeon: Use PRINTLIKE macro.Matt Turner2014-09-251-8/+1
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* mesa: Replace a priori knowledge of gcc attributes with configure tests.Matt Turner2014-09-251-6/+0
| | | | | | | | Note that I had to add support for testing the packed attribute to m4/ax_gcc_func_attribute.m4. Reviewed-by: Jason Ekstrand <[email protected]> [C bits] Reviewed-by: Ian Romanick <[email protected]>
* mesa: Replace a priori knowledge of gcc builtins with configure tests.Matt Turner2014-09-253-22/+27
| | | | | | | | | | | | | | Presumbly this will let clang and other compilers use the built-ins as well. Notice two changes specifically: - in _mesa_next_pow_two_64(), always use __builtin_clzll and add a static assertion that this is safe. - in macros.h, remove the clang-specific definition since it should be able to detect __builtin_unreachable in configure. Reviewed-by: Jason Ekstrand <[email protected]> [C bits] Reviewed-by: Ian Romanick <[email protected]>
* i965/compaction: Document instruction compaction capabilities.Matt Turner2014-09-251-0/+35
| | | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Emit ELSE/ENDIF JIP with type D on Gen 7.Matt Turner2014-09-251-2/+2
| | | | | | | | | | The spec says the type must be W (JIP is 16-bits after all), but we've been emitting it with a UD type all along and have experienced no adverse effects. Changing the type to D allows ELSE and ENDIF instructions to be compacted. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/compaction: Support compaction of control flow instructions.Matt Turner2014-09-251-14/+16
| | | | | | | | | | | | We're currently emitting compactable control flow instruction the wrong types, preventing their compaction. The next patch will fix this and actually enable compaction. On chips that cannot compact control flow instructions, attempts to find a match in the datatype table will fail. Acked-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/compaction: Add support for G45.Matt Turner2014-09-251-15/+24
| | | | | Acked-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Add BRW_OPCODE_NENOP for G45.Matt Turner2014-09-252-2/+4
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/compaction: Add support for Gen5.Matt Turner2014-09-251-5/+210
| | | | | | Acked-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Acked-by: Ian Romanick <[email protected]>
* i965/compaction: Reduce size of compacted_counts[] array.Matt Turner2014-09-251-22/+37
| | | | | | | | | The array was previously indexed in units of brw_compact_inst (8-bytes), but before compaction all instructions are uncompacted, so every odd element was unused. Acked-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/compaction: Use sizeof brw_inst/brw_compact_inst.Matt Turner2014-09-251-15/+17
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/compaction: Increment offset in for loop.Matt Turner2014-09-251-3/+2
| | | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965/compaction: Make src_offset local to the for loop.Matt Turner2014-09-251-8/+4
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/compaction: Remove unnecessary is-compacted? check.Matt Turner2014-09-251-2/+3
| | | | | | | | Used to pass over previously compacted instructions in this loop, but no longer. No point in checking. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/compaction: Don't set UIP on ELSE on Gen < 8.Matt Turner2014-09-251-1/+2
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965/compaction: Rework 3-src compaction logic.Matt Turner2014-09-251-5/+9
| | | | | | | | | It may be possible to create a contrived example in which a 3-src instruction would have been compacted on Gen < 8. I'd rather not discover it in the wild. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965/sf: Disable instruction compaction.Matt Turner2014-09-251-1/+4
| | | | | | | | Currently a no-op, since instruction compaction isn't implemented for the generations that have a programmable strips-and-fans unit. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Set JumpCount, not JIP, on ENDIF on Gen 6.Matt Turner2014-09-251-4/+7
| | | | | | | | Despite what the Sandybridge PRM says, ENDIF has Jump Count in <dst>, not JIP in <src1>. (The same mistake appears about WHILE as well). Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* mesa: Use VertexArray, not _VertexArray, in array size expressions.Kenneth Graunke2014-09-243-6/+6
| | | | | | | | | Both sizes are VERT_ATTRIB_MAX, so this has no effect. But it drops a few trivial uses of the derived state. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Fredrik Höglund <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* mesa: Set correct array element in vbo_exec_vtx_init.Kenneth Graunke2014-09-241-1/+1
| | | | | | | | | | | I'm not familiar with this code, but this sure appears to be a typo. It looks like the intent is to set each array element, not arrays[0] each time. Notably, the loop just below uses "array", not "arrays". Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Fredrik Höglund <[email protected]> Reviewed-by: Brian Paul <[email protected]> Cc: [email protected]
* mesa: Use proper structure for glGet*(GL_TEXTURE_COORD_ARRAY*).Kenneth Graunke2014-09-241-4/+4
| | | | | | | | | | | | | | | | | | The code in get.c that handles this uses ctx->Array.VAO->VertexAttrib, which is a gl_vertex_attrib_array structure, not a gl_client_array. The offsets of all fields happened to be the same in both structures, at least on x86_64. "Size," "Type," and "Stride" are obviously the same: both structures start with the same fields, in the same order. "Enabled" is dicier: there are different fields before it in both structures, including pointer sized values which might need special alignment. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Fredrik Höglund <[email protected]> Reviewed-by: Brian Paul <[email protected]> Cc: [email protected]
* mesa: Remove some dead helper functions.Kenneth Graunke2014-09-241-26/+0
| | | | | | | | | Dead since the _MaxElement removal, but these functions seemed generally applicable, so I decided to remove them in a separate patch. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Fredrik Höglund <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* i965/vec4: Call calculate_cfg() in test programs to avoid crashing.Matt Turner2014-09-242-0/+2
| | | | Reported-by: Mark Janes <[email protected]>
* mesa: remove EXT suffix from FBO error messagesBrian Paul2014-09-241-30/+30
| | | | | | And use pass caller="" for _mesa_FramebufferTexture(). Reviewed-by: Matt Turner <[email protected]>
* mesa: Drop _mesa_getenv() wrapper.Matt Turner2014-09-2415-54/+35
| | | | | | Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* mesa: Drop _mesa_bsearch() wrapper.Matt Turner2014-09-242-21/+0
| | | | | | Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* mesa: Unifdef _WIN32_WCE.Matt Turner2014-09-243-24/+1
| | | | | | Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* mesa: Unifdef _XBOX.Matt Turner2014-09-241-1/+1
| | | | | | | | Inexplicably added in commit 36940429. Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* mesa: Use realloc() instead of _mesa_realloc() and remove the latter.Matt Turner2014-09-246-28/+7
| | | | Reviewed-by: Ian Romanick <[email protected]>
* mesa: Remove duplicate _mesa_{init,free}_shader_state prototypes.Matt Turner2014-09-241-7/+0
| | | | Reviewed-by: Tapani Pälli <[email protected]>
* i965: Add and use functions to get next/prev blocks.Matt Turner2014-09-246-20/+73
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Call insert and remove functions from exec_node directly.Matt Turner2014-09-243-14/+11
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Make instruction lists local to the bblocks.Matt Turner2014-09-2412-92/+115
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/cfg: Add note about double-loop macros and break behavior.Matt Turner2014-09-241-0/+6
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Replace initialization loops with memset().Matt Turner2014-09-242-15/+5
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/vec4: Don't iterate between blocks with inst->next/prev.Matt Turner2014-09-241-21/+9
| | | | | | The register coalescing portion of this patch hurts three shaders in Guacamelee by one instruction each, but examining the diff makes me believe that what we were generating was (perhaps harmlessly) incorrect.
* i965/fs: Don't iterate between blocks with inst->next/prev.Matt Turner2014-09-245-47/+34
| | | | | | When instruction lists are per-basic block, this won't work. Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/cfg: Add macros to iterate through a block given a starting point.Matt Turner2014-09-241-0/+10
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/fs: Make count_to_loop_end() use basic blocks.Matt Turner2014-09-241-15/+16
| | | | | | | When the instructions aren't in a flat list, this wouldn't have worked. Also, this should be faster. Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/vec4: Don't use instruction list after calculating the cfg.Matt Turner2014-09-245-14/+15
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/fs: Don't use instruction list after calculating the cfg.Matt Turner2014-09-243-22/+22
| | | | | | | | The only trick is changing a break into a return true in register coalescing, since the macro is actually a double loop, and break will do something different than you expect. (Wish I'd realized that earlier!) Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Remove now unneeded calls to calculate_cfg().Matt Turner2014-09-2412-39/+4
| | | | | | | Now that nothing invalidates the CFG, we can calculate_cfg() immediately after emit_fb_writes()/emit_thread_end() and never again. Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Remove cfg-invalidating parameter from invalidate_live_intervals.Matt Turner2014-09-2420-40/+34
| | | | | | Everything has been converted to preserve the CFG. Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Preserve the CFG in instruction scheduling.Matt Turner2014-09-241-32/+42
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
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