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* i965: Fix source depth reg setting for FSes reading and writing to depth.Eric Anholt2009-08-053-1/+5
* mesa/st: Add support for binding pipe surface to texture.Chia-I Wu2009-08-054-16/+107
* mesa/main: Add functions to clear and dirty texture objects.Chia-I Wu2009-08-054-2/+72
* Merge branch 'mesa_7_5_branch'Brian Paul2009-08-057-195/+286
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| * st/mesa: implement BlitFramebuffer() for depth/stencil (incomplete)Brian Paul2009-08-051-29/+80
| * mesa: generate GL_INVALID_OPERATION for missing z/stencil when blittingBrian Paul2009-08-051-2/+6
| * st/mesa: fix Y inversion and optimize st_BlitFramebuffer()Brian Paul2009-08-051-3/+25
| * mesa: make _mesa_clip_blit() a shared functionBrian Paul2009-08-053-180/+187
| * intel: Fix inverted test for disabling flushing of front buffer output.Brian Paul2009-08-041-1/+1
| * intel: Wait on the last swapbuffers to complete before queuing a new one.Brian Paul2009-08-043-0/+28
| * texenv: Use VP->Current, since _Current isn't updated at this point.Brian Paul2009-08-041-1/+1
| * texenv: Match state.c in deciding whether we'll be using a vertex shader.Brian Paul2009-08-041-0/+1
| * texenv: Add missing dependency on VP changes.Brian Paul2009-08-041-1/+2
| * st/mesa: we don't support GL_NV_point_sprite (see comment)Brian Paul2009-08-031-1/+3
* | r200: emit colorpitchDave Airlie2009-08-051-2/+2
* | i965: Fix dangerous warning I let slip in.Eric Anholt2009-08-041-1/+1
* | i965: Respect CondSwizzle in OPCODE_IF.Eric Anholt2009-08-041-1/+21
* | i965: Emit conditional code updates as required for GLSL VS if statements.Eric Anholt2009-08-041-0/+13
* | i965: Don't set pop_count in the reserved MBZ area of IF statements.Eric Anholt2009-08-041-1/+1
* | i965: Print out ELSE and ENDIF src1 arguments like IF does.Eric Anholt2009-08-041-2/+2
* | r200: fix off-by-one errors causing 6th texture unit to not workRoland Scheidegger2009-08-051-2/+2
* | r200: fix compiler warning (unused var)Roland Scheidegger2009-08-051-2/+0
* | radeon: fix miptree comparison breakageRoland Scheidegger2009-08-051-1/+2
* | intel: implement intelCompressedTexSubImage2DRoland Scheidegger2009-08-051-21/+44
* | intel: Add support for EXT_provoking_vertex.Eric Anholt2009-08-0411-24/+131
* | i965: Spell "conditional" correctly.Eric Anholt2009-08-043-16/+16
* | i965: Hook up the disassembler for INTEL_DEBUG={wm,vs}.Eric Anholt2009-08-048-12/+47
* | i965: Initial import of disasm code from intel-gen4asm.Eric Anholt2009-08-041-0/+901
* | i965: warning fixEric Anholt2009-08-041-1/+1
* | mesa: log the shader checksumBrian Paul2009-08-041-1/+1
* | mesa: compute, print shader checksumBrian Paul2009-08-041-2/+6
* | mesa: added gl_shader::SourceChecksum field (for debug purposes)Brian Paul2009-08-041-0/+1
* | mesa: added _mesa_str_checksum()Brian Paul2009-08-042-0/+17
* | mesa: clean-up error debug/count codeBrian Paul2009-08-041-30/+41
* | mesa: reset ErrorDebugCount to zero in glGetString()Brian Paul2009-08-041-0/+1
* | mesa: better texture dump/debug codeBrian Paul2009-08-041-52/+45
* | mesa: more error message info for vertex pointer functionsBrian Paul2009-08-041-6/+12
* | mesa: more glGetTexImage() error checking consolidation, new assertionBrian Paul2009-08-041-8/+12
* | i965: Fix RECT shadow sampling by not losing the other texcoords.Eric Anholt2009-08-041-1/+5
* | i965: Assert that the offset in the VBO is below the VBO size.Eric Anholt2009-08-031-0/+14
* | i965: Even if no VS inputs are set, still load some amount of URB as required.Eric Anholt2009-08-031-0/+11
* | i965: Make sure the VS URB size is big enough to fit a VF VUE.Eric Anholt2009-08-031-2/+8
* | i965: Don't emit bad packets when no VBs are referenced.Eric Anholt2009-08-031-0/+22
* | i965: Calculate enabled[] and nr_enabled once and re-use the values.Eric Anholt2009-08-032-29/+18
* | typo fixRobert Ellison2009-08-031-1/+1
* | mesa: fix up some GLAPI XMLRobert Ellison2009-08-033-38/+100
* | radeon: more fixes for compressed texturesRoland Scheidegger2009-08-042-11/+30
* | radeon: Fix inverted test for disabling flushing of front buffer output.Eric Anholt2009-08-031-1/+1
* | intel: Fix inverted test for disabling flushing of front buffer output.Eric Anholt2009-08-031-1/+1
* | intel: Wait on the last swapbuffers to complete before queuing a new one.Eric Anholt2009-08-033-0/+28
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