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| * i965/miptree: Add PRM references for most struct members (v2)Chad Versace2015-09-301-25/+154
| * i965/miptree: Rename align_w,align_h -> halign,valignChad Versace2015-09-309-52/+62
| * i965/miptree: Rename intel_miptree_map::mt -> ::linear_mt (v2)Chad Versace2015-09-302-15/+17
| * i965/miptree: Fix comments for map modeChad Versace2015-09-301-1/+1
| * i965/miptree: More comments for BRW_MAP_DIRECT_BIT (v2)Chad Versace2015-09-301-1/+3
| * i965: Remove duplicate copy of is_scalar_shader_stage().Kenneth Graunke2015-09-301-31/+20
| * i915: Remember to call intel_prepare_render() before blittingVille Syrjälä2015-09-301-0/+5
| * i915: Fix texcoord vs. varying collision in fragment programsVille Syrjälä2015-09-302-26/+71
| * i830: Fix collision between I830_UPLOAD_RASTER_RULES and I830_UPLOAD_TEX(0)Ville Syrjälä2015-09-301-4/+4
| * i965/cs: Upload UBO/SSBO surfacesJordan Justen2015-09-304-1/+30
| * mesa: Fix format specifier warning in mesa_DispatchComputeIndirect()Rhys Kidd2015-09-301-1/+1
| * i965: Get rid of prog_data compare functionsJason Ekstrand2015-09-3011-135/+1
| * i965/state_cache: Remove the aux_compare fieldsJason Ekstrand2015-09-302-11/+0
| * i965/copy_image: Fix a copy+past errorJason Ekstrand2015-09-301-1/+1
| * i965: Remove early release of DRI2 miptreeChris Wilson2015-09-301-1/+0
| * i965/vec4/nir: add nir_intrinsic_memory_barrier supportSamuel Iglesias Gonsalvez2015-09-301-0/+9
| * nir: Use a system value for gl_PrimitiveIDIn.Kenneth Graunke2015-09-291-0/+10
* | Merge branch 'master' of ../mesa into vulkanKristian Høgsberg Kristensen2015-10-01206-4084/+8044
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| * st/mesa: try PIPE_BIND_RENDER_TARGET when choosing float texture formatsBrian Paul2015-09-291-1/+5
| * st/mesa: add some debugging code in st_ChooseTextureFormat()Brian Paul2015-09-291-1/+17
| * mesa: clean up #includes in shaderapi.cBrian Paul2015-09-291-5/+5
| * mesa: clean up the #includes in shader_query.cppBrian Paul2015-09-291-7/+7
| * mesa: remove an extern "C" wrapper in shader_query.cppBrian Paul2015-09-291-3/+1
| * i965/cs: Generate code to load gl_NumWorkGroupsJordan Justen2015-09-291-0/+28
| * i965/cs: Setup surface binding for gl_NumWorkGroupsJordan Justen2015-09-295-1/+53
| * i965/cs: Add a binding table entry for gl_NumWorkGroupsJordan Justen2015-09-293-5/+29
| * i965/cs: Store compute invocation information in brw contextJordan Justen2015-09-292-24/+37
| * i965/cs: Re-emit cs_state when surfaces have changedJordan Justen2015-09-291-1/+2
| * i965/cs: Re-emit push constants and cs_state on new batchesJordan Justen2015-09-291-2/+4
| * mesa/cs: Add MESA_VERBOSE=api support in DispatchCompute*Jordan Justen2015-09-291-0/+7
| * mesa: fix ARRAY_SIZE query for GetProgramResourceivTapani Pälli2015-09-293-43/+62
| * util: implement strndup for WIN32Samuel Iglesias Gonsalvez2015-09-291-0/+1
| * mesa: rename gl_shader_program's NumUniformBlocks to NumBufferInterfaceBlocksSamuel Iglesias Gonsalvez2015-09-297-17/+17
| * main: fix ACTIVE_UNIFORM_BLOCKS valueSamuel Iglesias Gonsalvez2015-09-291-1/+5
| * i965/gen9: Add a condition for starting pixel in fast copy blitAnuj Phogat2015-09-281-0/+4
| * i965: Rename intel_miptree_get_dimensions_for_image()Anuj Phogat2015-09-285-10/+14
| * i965/gen9: Fix {src, dst}_pitch alignment check for XY_FAST_COPY_BLTAnuj Phogat2015-09-281-11/+7
| * i965: Fix {src, dst}_pitch alignment check for XY_SRC_COPY_BLTAnuj Phogat2015-09-281-2/+7
| * i965: Move conversion of {src, dst}_pitch to dwords outside if/elseAnuj Phogat2015-09-281-16/+9
| * i965: Delete temporary variable 'src_pitch'Anuj Phogat2015-09-281-5/+1
| * i965: Use helper function intel_get_tile_dims() in surface setupAnuj Phogat2015-09-281-2/+12
| * i965: Use intel_get_tile_dims() to get tile masksAnuj Phogat2015-09-284-33/+28
| * i965: Add a helper function intel_get_tile_dims()Anuj Phogat2015-09-282-22/+64
| * mesa: Use the effective internal format instead for validationEduardo Lima Mitev2015-09-281-0/+151
| * mesa: Move _mesa_base_tex_format() from teximage to glformats filesEduardo Lima Mitev2015-09-284-378/+507
| * mesa: Fix order of format+type and internal format checks for glTexImageXD opsEduardo Lima Mitev2015-09-281-16/+25
| * i965/fs: Fix hang on IVB and VLV with image format mismatch.Francisco Jerez2015-09-281-4/+38
| * mesa: don't leak interface_nameIlia Mirkin2015-09-281-0/+1
| * i965/gs: Optimize away the EOT write on Gen8+ with static vertex count.Kenneth Graunke2015-09-261-0/+15
| * i965/gs: Allow src0 immediates in GS_OPCODE_SET_WRITE_OFFSET.Kenneth Graunke2015-09-262-2/+14
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