summaryrefslogtreecommitdiffstats
path: root/src/mesa
Commit message (Expand)AuthorAgeFilesLines
* i965/nir: Use offset() instead of altering reg_offset directly.Kenneth Graunke2015-01-191-59/+32
* i965/nir: Replace fs_reg(GRF, virtual_grf_alloc(...)) with vgrf(...).Kenneth Graunke2015-01-193-13/+23
* i965: Replace fs_reg(fs_visitor, type) with fs_visitor::vgrf(type).Kenneth Graunke2015-01-196-128/+122
* st/mesa: don't set vs.key.clamp_color if a shader doesn't write any colorsMarek Olšák2015-01-193-5/+10
* mesa: fix a trivial spelling mistakeMartin Peres2015-01-191-1/+1
* mesa: support GL_RGB for GL_EXT_texture_type_2_10_10_10_REVTapani Pälli2015-01-195-0/+8
* mesa: Add ARB_shader_precision infrastructureMicah Fedke2015-01-192-0/+2
* i965/fs: Fix the dummy fragment shader.Kenneth Graunke2015-01-171-7/+32
* i965: Fix up too-wide commentKristian Høgsberg2015-01-161-4/+3
* mesa: Add iterate method for string_to_uint_mapTapani Pälli2015-01-161-0/+34
* i965: Fix some oddities in FB_WRITE register width and execution size.Kenneth Graunke2015-01-161-0/+2
* i965/fs: Make lower_load_payload etc. appear in INTEL_DEBUG=optimizer.Kenneth Graunke2015-01-161-7/+11
* format_utils: Use a more precise conversion when decreasing bitsNeil Roberts2015-01-161-3/+12
* i965/gen6: Fix crash with VS+TF after rendering with GSIago Toral Quiroga2015-01-161-1/+1
* mesa: move GET_CURRENT_CONTEXT() to top of _mesa_init_renderbuffer()Brian Paul2015-01-151-1/+2
* mesa: Fix render buffer initial internal format in GLES 3Mike Mason2015-01-151-1/+18
* util/hash_set: Rework the API to know about hashingJason Ekstrand2015-01-154-21/+18
* util: Move main/set to util/hash_setJason Ekstrand2015-01-157-446/+4
* hash_table: Rename insert_with_hash to insert_pre_hashedJason Ekstrand2015-01-151-1/+1
* i965: Don't consider null dst instructions as matching non-null dst.Matt Turner2015-01-152-2/+4
* i965/vec4: Make sure that imm writes are to registers in the same file.Matt Turner2015-01-151-2/+8
* i965/fs: Emit MADs from (x + abs(y * z)).Matt Turner2015-01-151-3/+15
* i965/fs: Emit MADs from (x + -(y * z)).Matt Turner2015-01-151-0/+12
* i965/nir: Do a final copy lowering pass before lowering locals to regsJason Ekstrand2015-01-151-0/+3
* nir: Rename lower_variables to lower_vars_to_ssaJason Ekstrand2015-01-151-1/+1
* nir/tex_instr: Add a nir_tex_src struct and dynamically allocate the src arrayJason Ekstrand2015-01-151-2/+2
* i965/fs_nir: Handle sample ID, position, and mask betterJason Ekstrand2015-01-152-12/+71
* nir: Make load_const SSA-onlyJason Ekstrand2015-01-152-26/+3
* i965/nir: Move the other lowering passes to before out-of-SSAJason Ekstrand2015-01-151-6/+6
* nir/lower_atomics: Use/support SSAJason Ekstrand2015-01-151-3/+3
* nir: Remove predicationJason Ekstrand2015-01-151-62/+11
* nir: Make bcsel a fully vector operationJason Ekstrand2015-01-151-3/+8
* i965/fs_nir: Add support for indirect texture arraysJason Ekstrand2015-01-151-4/+21
* nir/tex_instr: Rename the indirect source type and add an array sizeJason Ekstrand2015-01-151-1/+1
* nir: Use a source for uniform buffer indices instead of an indexJason Ekstrand2015-01-151-37/+59
* nir: Make texture instruction names more consistentJason Ekstrand2015-01-151-2/+2
* nir: Add a basic constant folding passJason Ekstrand2015-01-151-0/+2
* nir: Add an algebraic optimization passJason Ekstrand2015-01-151-1/+1
* nir: Add a lowering pass for adding source modifiers where possibleJason Ekstrand2015-01-151-0/+5
* i965/fs_nir: Implement the ARB_gpu_shader5 interpolation intrinsicsJason Ekstrand2015-01-151-0/+120
* i965/fs_nir: Add a has_indirect flag and clean up some of the input/output codeJason Ekstrand2015-01-151-63/+14
* nir: Vectorize intrinsicsJason Ekstrand2015-01-151-48/+16
* i965/fs_nir: Use the new variable lowering codeJason Ekstrand2015-01-151-19/+25
* i965/fs_nir: Don't dump the shader.Jason Ekstrand2015-01-151-5/+0
* i965/fs_nir: Properly saturate multipliesJason Ekstrand2015-01-151-1/+1
* i965/fs_nir: Handle SSA constantsJason Ekstrand2015-01-151-17/+33
* i965/fs_nir: Use an array rather than a hash table for register lookupJason Ekstrand2015-01-153-23/+30
* i965/fs_nir: Add the CSE pass and actually run in a loopJason Ekstrand2015-01-151-13/+18
* nir: Add a fused multiply-add peepholeJason Ekstrand2015-01-151-0/+2
* i965/fs_nir: Turn on the peephole select optimizationJason Ekstrand2015-01-151-0/+2