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* intel: If a tex image doesn't fit in the object's tree, make a temporary tree.Eric Anholt2008-07-251-3/+18
| | | | | | | Previously, we would just store the data as malloced memory hanging off the object, which would get memcpyed in at validate time. This broke an oglconform render-to-texture test, since validate wasn't called but a miptree was expected.
* intel: Add a little span cache to spead up readpixels by cutting syscalls.Eric Anholt2008-07-233-12/+42
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* intel-gem: Use pread/pwrite for span access.Eric Anholt2008-07-234-197/+141
| | | | | This will avoid clflushing entire buffers for small acesses, such as those commonly used by regression tests.
* intel: improve 2d batchbuffer debug output.Eric Anholt2008-07-231-8/+14
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* intel: Fix CopyTexSubImage's src tiling arg for the blit.Eric Anholt2008-07-231-1/+1
| | | | Didn't hurt 915, but needed for 965.
* intel: move renderbuffer mapping to separate functions.Eric Anholt2008-07-233-107/+80
| | | | | | | This lets us avoid duplicated code for doing so, including the depthstencil paths that aren't covered by SpanRenderStart/Finish. Those paths were missing the span funcs setup, leading to a null dereference in the fbotexture demo.
* intel-gem: Bump driver dateIan Romanick2008-07-181-3/+7
| | | | | Bump the driver date and insert the string "GEM". When running tests, this make it much easier to know that the right driver is being used.
* Remove redundant initalization of MaxTextureUnitsIan Romanick2008-07-161-1/+0
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* intel-gem: Disable spantmp sse/mmx functions when tile swizzling.Eric Anholt2008-07-152-3/+17
| | | | | | | Those functions rely on being able to treat the GET_PTR returned value as an array indexed by x, but that's not the case for our tiling. Bug #16387
* i915: fix build after previous commit.Eric Anholt2008-07-141-1/+1
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* drm-gem: Use new GEM ioctls for tiling state, and support new swizzle modes.Eric Anholt2008-07-1118-298/+250
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* intel: span rendering requires just a flush before starting, not finish.Eric Anholt2008-07-021-1/+1
| | | | The dri_bo_map()s that follow will take care of idling the hardware as needed.
* intel-gem: Emit an MI_FLUSH at glFlush() so frontbuffer rendering is flushed.Eric Anholt2008-07-021-0/+6
| | | | | | | | | We have something similar in the X Server that covers X Server rendering, this is the equivalent here for rendering to the front buffer. If we cared about avoiding this at glFlush time, we could only do this when some actual frontbuffer rendering had occurred. Bug #16392.
* intel-gem: Fix y-tile swizzling for our G965 with swizzle_mode=1.Eric Anholt2008-07-021-0/+10
| | | | | Apparently in Y mode we get bit 6 ^ bit 9. The reflect demo in 'd' mode now displays correctly.
* intel-gem: Fix Y-tiling span setup.Eric Anholt2008-07-026-27/+52
| | | | | | | | | The boolean that the server gives us for whether the region is tiled was getting used as the enum for what tiling mode. Instead, guess the correct tiling in screen setup. Also, fix the Y-tiling pitch setup. The pitch to the next tile in Y is 32 scanlines, not 8.
* intel-gem: Move bit 6 x tiling swizzle to a driconf option, and add new mode.Eric Anholt2008-07-014-18/+46
| | | | | | It turns out that it's not just deviceID dependent, and there's some additional undefined factor that determines the bit 6 swizzling. It's now controllable with swizzle_mode=[012] until we get a response on how to automatically detect.
* intel: Fix locking when doing intel_region_cow().Eric Anholt2008-06-261-2/+2
| | | | | This was broken in the merge of 965 blit support. It tried to lock only when things were already locked.
* intel: Replace sprinkled intel_batchbuffer_flush with MI_FLUSH or nothing.Eric Anholt2008-06-2613-112/+26
| | | | | | | | | Most of these were to ensure that caches got synchronized between 2d (or meta) rendering and later use of the target as a source, such as for texture miptree setup. Those are replaced with intel_batchbuffer_emit_mi_flush(), which just drops an MI_FLUSH. Most of the remainder were to ensure that REFERENCES_CLIPRECTS batchbuffers got flushed before the lock was dropped. Those are now replaced by automatically flushing those when dropping the lock.
* Merge commit 'origin/master' into drm-gemEric Anholt2008-06-2488-996/+417
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| * intel: Fix glCopyPixels when x or y are < 0 in hw coordinates.Eric Anholt2008-06-241-14/+10
| | | | | | | | | | | | Nothing would get drawn as the negative coordinates broke the rectangle intersection code that used unsigned ints. Tested with copypix demo and sliding the copy to the upper left.
| * i965: Use the shared intel_pixel_copy.c.Eric Anholt2008-06-242-322/+5
| | | | | | | | | | | | | | | | This disables the textured copy implementation on 965, which didn't appear to work (mesa copypix demo, disable the blit path, move so that regions don't overlap and textured is used, and you get garbage). If we resurrect this for i965, I'd rather it used the 915-style metaops instead. Current metaops code left in place so that whoever picks it up has a reference.
| * intel: Same pixel function init for everyone now.Eric Anholt2008-06-244-10/+1
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| * intel: Avoid glBitmap software fallback for blending when no blending occurs.Eric Anholt2008-06-245-6/+26
| | | | | | | | | | Mesa demos tend to leave blending on but in GL_ONE/GL_ZERO, or GL_SRC_ALPHA/GL_ONE_MINUS_SRC_ALPHA with a source alpha of 1.0.
| * intel: Merge check_blit_fragment_ops between i915/i965.Eric Anholt2008-06-244-28/+9
| | | | | | | | Both had some useful bits for the other.
| * intel: Note reasons for blit pixel op fallbacks under INTEL_DEBUG=pix.Eric Anholt2008-06-241-15/+56
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| * i915: Add support for accelerated glBitmap, shared from 965.Eric Anholt2008-06-244-354/+8
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| * i915: Fix read != draw drawable for glCopyPixels.Eric Anholt2008-06-241-2/+3
| | | | | | | | Taken from commit bad6e175cf59cce630c37d73f6e71f3a4de50ae6.
| * i915: Allow accelerated pixel ops to be disabled with INTEL_NO_BLIT.Eric Anholt2008-06-241-4/+6
| | | | | | | | This matches 965.
| * Ensure all objects are built when installing DRIDan Nicholson2008-06-221-1/+1
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| * Don't make libmesa.a or libglapi.a depend on asm_subdirsDan Nicholson2008-06-221-2/+2
| | | | | | | | | | | | | | | | | | | | Since the asm_subdirs target does not actually create a file, make will always consider that it needs to be rebuilt. If libmesa.a and libglapi.a have asm_subdirs as a prerequisite, then they will always need to be rebuilt, too. The correct order will be preserved by the default target, though. This should fix #16358.
| * replace __inline and __inline__ with INLINE macroBrian Paul2008-06-212-3/+3
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| * replace __inline and __inline__ with INLINE macroBrian Paul2008-06-211-1/+1
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| * replace __inline and __inline__ with INLINE macroBrian Paul2008-06-213-65/+65
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| * replace __inline and __inline__ with INLINE macroBrian Paul2008-06-2114-56/+56
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| * #undef DEBUG to silence warningsBrian Paul2008-06-211-0/+1
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| * replace __inline and __inline__ with INLINE macroBrian Paul2008-06-218-19/+19
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| * replace __inline and __inline__ with INLINE macroBrian Paul2008-06-215-22/+22
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| * replace __inline and __inline__ with INLINE macroBrian Paul2008-06-216-17/+17
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| * replace __inline and __inline__ with INLINE macroBrian Paul2008-06-219-19/+19
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| * replace __inline and __inline__ with INLINE macroBrian Paul2008-06-2110-18/+14
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| * s/inline/INLINEBrian Paul2008-06-213-4/+4
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| * remove old commentsBrian Paul2008-06-211-2/+0
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| * Solaris port of Mesa 7.1 with autoconf supportAlan Coopersmith2008-06-214-5/+48
| | | | | | | | Signed-off-by: Brian Paul <[email protected]>
| * Rename quad function to quadr to avoid clash with Solaris quad typedefDaniel Zhu2008-06-211-3/+3
| | | | | | | | Signed-off-by: Brian Paul <[email protected]>
| * R300: 1002:5657 is actually RV410Alex Deucher2008-06-212-2/+2
| | | | | | | | See bug 14289
| * r200: fix typo in r200TryDrawPixels parameter validation (bug 16406)Roland Scheidegger2008-06-211-1/+1
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| * mesa: tweak mipmap level selection for cube mapsBrian Paul2008-06-191-1/+15
| | | | | | | | | | | | | | This is just a hack. After we convert the 3D texcoord into a face plus 2D texcoord we need to recompute the partial derivatives and mipmap LOD. But we don't have the info to do that. Adjusting the original mipmap level by -1 seems to give somewhat better results than before though.
* | i915: Accumulate the VB into a local buffer and subdata it in.Eric Anholt2008-06-237-31/+48
| | | | | | | | This lets GEM use pwrite, for an additional 4% or so speedup.
* | i915: Convert to using VBs instead of inline prims.Eric Anholt2008-06-239-214/+299
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* | i915: Note the non-PBO fallback for textured drawpixels under DEBUG_PIXEL.Eric Anholt2008-06-181-1/+2
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