summaryrefslogtreecommitdiffstats
path: root/src/mesa
Commit message (Expand)AuthorAgeFilesLines
* i965: Stop disabling aux during texture preparationJason Ekstrand2018-02-273-12/+8
* i965/draw: Set NEW_AUX_STATE when draw aux changesJason Ekstrand2018-02-271-1/+4
* i965: Replace draw_aux_buffer_disabled with draw_aux_usageJason Ekstrand2018-02-274-35/+27
* i965: Don't try to disable render aux buffers for computeTopi Pohjolainen2018-02-271-2/+4
* i965/draw: Do resolves properly for textures used by TXFJason Ekstrand2018-02-271-0/+41
* i965: Don't disable CCS for RT dependencies when dispatching compute.Kenneth Graunke2018-02-263-5/+5
* i965: Bump official kernel requirement to Linux v3.9.Kenneth Graunke2018-02-091-2/+2
* i965: perform 2 uploads with dual slot *64*PASSTHRU formats on gen<8Andres Gomez2018-02-091-5/+27
* i965: Call prepare_external after implicit window-system MSAA resolvesJason Ekstrand2018-02-091-0/+15
* mesa: Fix function pointers initialization in status trackerEleni Maria Stea2018-02-091-2/+2
* i965/surface_state: Drop brw_aux_surface_disabledJason Ekstrand2018-02-091-20/+0
* i965/miptree: Add an aux_disabled parameter to render_aux_usageJason Ekstrand2018-02-095-8/+17
* i965/miptree: Take an aux_usage in prepare/finish_renderJason Ekstrand2018-02-094-16/+8
* radeon: remove left over dead codeEric Engestrom2018-01-251-6/+0
* i965: Set tiling on BOs imported with modifiersJason Ekstrand2018-01-241-1/+10
* i965/bufmgr: Add a create_from_prime_tiled functionJason Ekstrand2018-01-242-10/+35
* i965/miptree: Use the tiling from the modifier instead of the BOJason Ekstrand2018-01-241-4/+5
* i965/miptree: Add an explicit tiling parameter to create_for_boJason Ekstrand2018-01-246-10/+24
* i965: Bind null render targets for shadow sampling + color.Kenneth Graunke2018-01-241-1/+32
* i965/miptree: Refactor CCS_E and CCS_D cases in render_aux_usageJason Ekstrand2018-01-241-13/+15
* Re-enable regular fast-clears (CCS_D) on gen9+Jason Ekstrand2018-01-242-43/+25
* i965: Track format and aux usage in the render cacheJason Ekstrand2018-01-245-27/+92
* i965: Track the depth and render caches separatelyJason Ekstrand2018-01-245-22/+26
* i965/blorp: Add more destination flushingJason Ekstrand2018-01-241-1/+6
* i965: Add more precise cache tracking helpersJason Ekstrand2018-01-246-13/+49
* i965: Call brw_cache_flush_for_render in predraw_resolve_framebufferJason Ekstrand2018-01-241-0/+2
* i965: Torch public intel_batchbuffer_emit_dword/float helpers.Kenneth Graunke2018-01-122-15/+2
* i965: Require space for MI_BATCHBUFFER_END.Kenneth Graunke2018-01-121-2/+5
* mesa: add AllowGLSLCrossStageInterpolationMismatch workaroundTapani Pälli2017-12-274-0/+11
* glsl: Fix gl_NormalScale.Fabian Bieler2017-12-143-2/+6
* i965: Switch over to fully external-or-not MOCS schemeJason Ekstrand2017-12-143-29/+11
* xlib: call _mesa_warning() instead of fprintf()Brian Paul2017-12-141-1/+2
* meta: Fix ClearTexture with GL_DEPTH_COMPONENT.Kenneth Graunke2017-12-141-9/+14
* meta: Initialize depth/clear values on declaration.Kenneth Graunke2017-12-141-5/+2
* i965: Disable regular fast-clears (CCS_D) on gen9+Jason Ekstrand2017-12-012-25/+43
* i965: Reorganize batch/state BO fields into a 'brw_growing_bo' struct.Kenneth Graunke2017-12-018-96/+102
* i965: Don't grow batch/state buffer on every emit after an overflow.Kenneth Graunke2017-12-011-23/+19
* i965: Preserve EXEC_OBJECT_CAPTURE when growing the BO.Kenneth Graunke2017-12-011-0/+3
* i965: Use old_bo->align when growing batch/state buffer instead of 4096.Kenneth Graunke2017-12-011-1/+2
* i965: Program the dynamic state heap size to MAX_STATE_SIZE.Kenneth Graunke2017-12-013-10/+10
* i965: Fix Smooth Point Enables.Kenneth Graunke2017-11-291-1/+1
* st_glsl_to_tgsi: check for the tail sentinel in merge_two_dstsNicolai Hähnle2017-11-291-3/+3
* mesa/gles: adjust internal format in glTexSubImage2D error checksTapani Pälli2017-11-291-1/+55
* i965: Mark BOs as external when we export their handleJason Ekstrand2017-11-243-1/+11
* i965/bufmgr: Add a helper to mark a BO as externalJason Ekstrand2017-11-241-6/+11
* i965: Revert Gen8 aspect of VF PIPE_CONTROL workaround.Kenneth Graunke2017-11-181-1/+5
* i965/gen8+: Fix the number of dwords programmed in MI_FLUSH_DWAnuj Phogat2017-11-172-5/+17
* i965: Program DWord Length in MI_FLUSH_DWAnuj Phogat2017-11-173-3/+3
* i965: Upload invariant state once at the start of the batch on Gen4-5.Kenneth Graunke2017-11-174-13/+3
* i965: Implement another VF cache invalidate workaround on Gen8+.Kenneth Graunke2017-11-171-8/+33
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-04 21:52:01 +0000