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* i965: Use UNUSED to silence unused variable (used in assert).Matt Turner2017-01-231-1/+1
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* dri: allow 16bit R/GR images to be exported via drm buffersRainer Hochecker2017-01-232-0/+10
| | | | | | | This allows eglCreateImageKHR to access P010 surfaces created by vaapi Signed-off-by: Rainer Hochecker <[email protected]> Acked-by: Ben Widawky <[email protected]>
* drirc: remove spurious tabsEric Engestrom2017-01-231-8/+8
| | | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* st/glsl_to_tgsi: use DDIV instead of DRCP + DMULNicolai Hähnle2017-01-231-6/+3
| | | | | | | | | | | | Fixes GL45-CTS.gpu_shader_fp64.built_in_functions. v2: use DDIV unconditionally (Roland) Reviewed-by: Roland Scheidegger <[email protected]> (v1) Reviewed-by: Marek Olšák <[email protected]> (v1) Tested-by: Glenn Kennard <[email protected]> Tested-by: James Harvey <[email protected]> Cc: 17.0 <[email protected]>
* mesa: remove unused gl_shader_info field from gl_linked_shaderTimothy Arceri2017-01-231-2/+0
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* mesa/glsl: set and get cs layouts to and from shader_infoTimothy Arceri2017-01-233-16/+2
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* mesa/glsl: set and get gs layouts directly to and from shader_infoTimothy Arceri2017-01-231-8/+4
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* mesa/glsl/i965: set and get tes layouts directly to and from shader_infoTimothy Arceri2017-01-232-14/+7
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* glsl: use last_vert_prog to get last {clip,cull}_distance_array_sizeTimothy Arceri2017-01-231-7/+0
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* mesa/glsl: set {clip,cull}_distance_array_size directly in gl_programTimothy Arceri2017-01-234-55/+9
| | | | | | | There are some line wrapping violations here but those lines will get deleted in the following patch. Reviewed-by: Nicolai Hähnle <[email protected]>
* st/mesa/glsl: change xfb_program field to last_vert_progTimothy Arceri2017-01-235-7/+17
| | | | | | | | | | Now that the i965 backend doesn't depend on this field we can make it more generic and short circuit a bunch of code paths. The new field will be used in a following patch for another clean-up. Reviewed-by: Nicolai Hähnle <[email protected]>
* mesa: use gl_program for CurrentProgram rather than gl_shader_programTimothy Arceri2017-01-2327-396/+248
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This makes much more sense and should be more performant in some critical paths such as SSO validation which is called at draw time. Previously the CurrentProgram array could have contained multiple pointers to the same struct which was confusing and we would often need to fish out the information we were really after from the gl_program anyway. Also it was error prone to depend on the _LinkedShader array for programs in current use because a failed linking attempt will lose the infomation about the current program in use which is still valid. V2: fix validate_io() to compare linked_stages rather than the consumer and producer to decide if we are looking at inward facing shader interfaces which don't need validation. Acked-by: Edward O'Callaghan <[email protected]> To avoid build regressions the following 2 patches were squashed in to this commit: mesa/meta: rewrite _mesa_shader_program_use() and _mesa_program_use() These are rewritten to do what the function name suggests, that is _mesa_shader_program_use() sets the use of all stage and _mesa_program_use() sets the use of a single stage. Reviewed-by: Lionel Landwerlin <[email protected]> Acked-by: Edward O'Callaghan <[email protected]> mesa: update active relinked program This likely fixes a subroutine bug were _mesa_shader_program_init_subroutine_defaults() would never have been called for the relinked program as we previously just set _NEW_PROGRAM as dirty and never called the _mesa_use* functions when linking. Acked-by: Edward O'Callaghan <[email protected]>
* Revert "i965: Really don't emit Q or UQ moves on Gen < 8"Matt Turner2017-01-201-8/+0
| | | | | | This reverts commit c95380c4044237d73fb537511667c3c8f658fcee. Acked-by: Kenneth Graunke <[email protected]>
* i965: Select DF type for 64-bit integers on Gen < 8.Matt Turner2017-01-204-10/+12
| | | | | | | | | | | | Gen8 adds Q/UQ types. We attempted to change the types back to DF in the generator (commit c95380c40), but an assertion added in the FP64 series (commit e481dcc3) triggers before that code has a chance to execute. In fact, using Q/UQ in the IR and then changing to DF in the generator would not work in the presence of source modifiers, etc. Fixes: d6fcede6 ("i965: Return Q and UQ types for int64 and uint64") Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Enable ARB_gpu_shader_int64 on Gen8+Ian Romanick2017-01-202-0/+6
| | | | | Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Split SIMD16 CMP of Q and UQ instructionsIan Romanick2017-01-201-14/+29
| | | | | | | This is basically the same as happens for doubles. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Enable 64-bit integer support for almost all unary and binary operationsIan Romanick2017-01-201-10/+0
| | | | | | | | Integer comparison functions (e.g., nir_op_ilt) are handled in the next commit. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Enable uploading 64-bit integer uniformsIan Romanick2017-01-201-1/+3
| | | | | Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Add 64-bit integer support for conversions and bitcastsIan Romanick2017-01-202-5/+35
| | | | | | | | | | v2 (idr): Make the "from" type in a cast unsized. This reduces the number of required cast operations at the expensive slightly more complex code. However, this will be a dramatic improvement when other sized integer types are added. Suggested by Connor. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Enable emitting Q and UQ instructions in the fs backendIan Romanick2017-01-202-1/+12
| | | | | | | | v2: Fixup assertion in brw_reg_type_to_hw_type to allow BRW_REGISTER_TYPE_{UQ,Q} on Gen8+. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Add support for constant evaluation on Q and UQ typesIan Romanick2017-01-202-7/+20
| | | | | Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Return Q and UQ types for int64 and uint64Ian Romanick2017-01-201-4/+2
| | | | | | | | | It seems like maybe this should return a different type based on Gen. Q and UQ only exist on Gen8+, but, based on the old comment, I believe previous Gens can generate 64-bit moves. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Really don't emit Q or UQ moves on Gen < 8Ian Romanick2017-01-201-0/+8
| | | | | | | | | | | | | | | | | | | | | | It's much easier to do this in the generator rather than while coming out of NIR. brw_type_for_nir_type doesn't know the Gen, so we'd have to add a bunch of plumbing. The alternate fix is to not emit int64 moves for doubles in the first place... but that seems even more difficult. This change won't catch non-MOV instructions that try to use 64-bit integer types on Gen < 8. This may convert certain kinds of bugs in to different kinds of bugs that are more difficult to detect (since the assertions in the function won't catch them). NOTE: I don't think anything can emit mixed-type 64-bit moves until the same platform supports both ARB_gpu_shader_fp64 and ARB_gpu_shader_int64. When we enable int64 on Gen < 8, we can solve this problem other ways. This prevents regressions on HSW in the next patch. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Avoid int64 warnings.Dave Airlie2017-01-201-0/+28
| | | | | | | | | | | | | Just add operations to the switch statement here. v2 (idr): "cut them down later" => Remove ir_unop_b2u64 and ir_unop_u642b. Handle these with extra i2u or u2i casts just like uint(bool) and bool(uint) conversion is done. Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Avoid int64 induced warningsDave Airlie2017-01-203-0/+6
| | | | | | | | | Just add types into unsupported or double equivalent spots. Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* mesa/program: Add unused ir operations.Dave Airlie2017-01-201-0/+28
| | | | | | | | | v2 (idr): "cut them down later" => Remove ir_unop_b2u64 and ir_unop_u642b. Handle these with extra i2u or u2i casts just like uint(bool) and bool(uint) conversion is done. Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* mesa: Add support for 64-bit integer uniformsDave Airlie2017-01-202-5/+247
| | | | | | | | | | This hooks up the API to the internals for 64-bit integer uniforms. v2: update to use non-strict aliased alternatives Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* glsl: Add basic ARB_gpu_shader_int64 typesDave Airlie2017-01-202-0/+20
| | | | | | | | | | | | | This adds the builtins and the lexer support. To avoid too many warnings, it adds basic support to the type in a few other places in mesa, mostly in the trivial places. It also adds a query to be used later for if a type is an integer 32 or 64. Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* mesa: Add ARB_gpu_shader_int64 extension bitsDave Airlie2017-01-202-0/+2
| | | | | | | | This just adds the usual boilerplate in mesa core. Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* mapi: Add support for ARB_gpu_shader_int64.Dave Airlie2017-01-203-0/+302
| | | | | | | | | | | | | | Just add the boilerplate xml code. v2 (idr): Update dispatch_sanity. Only add extension functions in core profile. v3 (idr): Remove comment line from gl_API.xml. Suggested by Matt. Signed-off-by: Dave Airlie <[email protected]> Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Ian Romanick <[email protected]> [v1] Reviewed-by: Matt Turner <[email protected]>
* i965: Validate "Special Cases for Byte Operations"Matt Turner2017-01-202-9/+150
| | | | | Do this in general_restrictions_based_on_operand_types() because the two rules that "Special Cases for Byte Operations" relax are checked there.
* i965: Validate "Region Alignment Rules"Matt Turner2017-01-202-1/+697
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* i965: Validate "General Restrictions Based on Operand Types"Matt Turner2017-01-202-0/+273
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* i965: Validate "General Restrictions on Regioning Parameters"Matt Turner2017-01-202-0/+377
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* i965: Replace reg_type_size[] with a function.Matt Turner2017-01-203-25/+75
| | | | | | A function is necessary to handle immediate types. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Validate math instruction sources.Matt Turner2017-01-202-9/+23
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Claim that SEND/math has two sources.Matt Turner2017-01-201-1/+8
| | | | | | | | src1 must be a descriptor (including the information to determine that the SEND is doing an extended math operation), but src0 can actually be null since it serves as the source of the implicit GRF -> MRF move. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Simplify num_sources_from_inst().Matt Turner2017-01-201-3/+1
| | | | | | | | desc will always be non-NULL, because brw_validate_instructions() does not attempt to validate any instructions that fail the is_unsupported_inst() check. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Factor out send_restrictions() function.Matt Turner2017-01-201-12/+22
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Factor out sources_not_null() validation function.Matt Turner2017-01-201-17/+23
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Structure code so unsupported inst will not generate more errors.Matt Turner2017-01-201-2/+5
| | | | | | | | We want to rely on brw_opcode_desc() always returning non-NULL in other validation functions. Other validation functions will be in the else case of the block added in this patch. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Add a test for the EU assembly validator.Matt Turner2017-01-202-0/+176
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Add a CHECK macro to call more complicated validation funcs.Matt Turner2017-01-201-0/+9
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Make ERROR_IF usable from other functions.Matt Turner2017-01-201-1/+1
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Mark error annotation on correct SIMD16 inst.Matt Turner2017-01-201-2/+2
| | | | | | | | | | | | inst, whose assignment can be seen in the last line of context pointed to the correct instruction in the SIMD16 program, but src_offset was the offset from the beginning of the SIMD16 program. So if an instruction at offset 0x100 in the SIMD16 program was illegal, we would mark an error on the instruction at offset 0x100 (which is likely in the SIMD8 program). Reviewed-by: Kenneth Graunke <[email protected]>
* i965/vec4: Use UW-typed operands when dest is UW.Matt Turner2017-01-201-4/+6
| | | | | | | | | | Using a UD-typed operand makes the execution size D, and if the size of the execution type is greater than the size of the destination type, the destination must be appropriately strided. We actually just want UW-types all around. Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Use W-typed immediate in brw_F32TO16().Matt Turner2017-01-201-1/+1
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Don't change F->VF if dest type is DF.Matt Turner2017-01-201-1/+2
| | | | | | | | | We change the immediate source type to VF to allow instruction compaction, but there are no entires in the compaction table for DF, so there's no point in doing this. Additionally, I mixing floating-point types is now allowed except for F and VF.
* st/mesa: ask pipe driver to recreate derived internal resources when ↵Philipp Zabel2017-01-201-0/+4
| | | | | | | | | | | | | | | (re-)binding external textures Use the resource_changed callback to invalidate internal resources derived from external textures when they are (re-)bound. This is needed to comply with the requirement from the GL_OES_EGL_image_external extension that a call to glBindTexture guarantees that all further sampling will return values that correspond to the values in the external texture at or after the time that glBindTexture was called. Signed-off-by: Philipp Zabel <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Lucas Stach <[email protected]>
* mesa: update external textures when (re-)bindingPhilipp Zabel2017-01-201-2/+3
| | | | | | | | | | | | | | | To comply with the requirement from the GL_OES_EGL_image_external extension that a call to glBindTexture guarantees that all further sampling will return values that correspond to the values in the external texture at or after the time that glBindTexture was called, do not bail out early from mesa_BindTextures if the target is external. This will later allow the state tracker to instruct the pipe driver to invalidate internal resources derived from the external texture. Signed-off-by: Philipp Zabel <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Lucas Stach <[email protected]>
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