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* intel: Pull the guts of gen7_l3_state.c into a shared helperJason Ekstrand2016-09-032-333/+39
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* intel: Rename brw_get_device_name/info to gen_get_device_name/infoJason Ekstrand2016-09-037-7/+7
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* intel: s/brw_device_info/gen_device_info/Jason Ekstrand2016-09-0356-288/+288
| | | | | | | | | | | | | Generated by: sed -i -e 's/brw_device_info/gen_device_info/g' src/intel/**/*.c sed -i -e 's/brw_device_info/gen_device_info/g' src/intel/**/*.h sed -i -e 's/brw_device_info/gen_device_info/g' **/i965/*.c sed -i -e 's/brw_device_info/gen_device_info/g' **/i965/*.cpp sed -i -e 's/brw_device_info/gen_device_info/g' **/i965/*.h Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* intel: Add a new "common" library for more code sharingJason Ekstrand2016-09-037-668/+4
| | | | | | | The first thing to go in this new library is brw_device_info. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* main: add KHR_robustness to ES 3.2 extension requirementsIlia Mirkin2016-09-031-0/+1
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: fix noop_scissor range issue on width/heightJordan Justen2016-09-011-7/+7
| | | | | | | | | | | | | If scissor X or Y was set to a negative value then the previous code might have indicated noop scissors when the scissor range actually was masking a portion of the framebuffer. Since fb->_Xmin, _Xmax, _Ymin and _Ymax take scissors into account, we can use these to test for a noop scissor. Cc: [email protected] Reviewed-by: Matt Turner <[email protected]> Signed-off-by: Jordan Justen <[email protected]>
* st/mesa: expose OES_geometry_shader and OES_texture_cube_map_arrayIlia Mirkin2016-08-311-0/+15
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* Introduce .editorconfigEric Engestrom2016-08-311-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | A few weeks ago, Jose Fonseca suggested [0] we use .editorconfig files to try and enforce the formatting of the code, to which Michel Dänzer suggested [1] we start by importing the existing .dir-locals.el settings. The first draft was discussed in the RFC [2]. These .editorconfig are a first step, one that has the advantage of requiring little to no intervention from the devs once the settings files are in place, but the settings are very limited. This does have the advantage of applying while the code is being written. This doesn't replace the need for more comprehensive formatting tools such as clang-format & clang-tidy, but those reformat the code after the fact. [0] https://lists.freedesktop.org/archives/mesa-dev/2016-June/121545.html [1] https://lists.freedesktop.org/archives/mesa-dev/2016-June/121639.html [2] https://lists.freedesktop.org/archives/mesa-dev/2016-July/123431.html Acked-by: Nicolai Hähnle <[email protected]> Acked-by: Eric Anholt <[email protected]> Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Jose Fonseca <[email protected]>
* i965: Pass start_offset to brw_set_uip_jip().Matt Turner2016-08-314-14/+6
| | | | | | | | | | | | Without this, we would pass over the instructions in the SIMD8 program (which is located earlier in the buffer) when brw_set_uip_jip() is called to handle the SIMD16 program. The assertion about compacted control flow was bogus: halt, cont, break cannot be compacted because they have both JIP and UIP. Instead, we should never see a compacted instruction in this code at all. Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965: Merge gen7_clip_state atom into gen6_clip_state atom.Kenneth Graunke2016-08-313-20/+1
| | | | | | | | | | | | | | | | | The original motivation was that gen6_clip_state ignored _NEW_POLYGON as it didn't care about early culling. The only other change was that Gen6 ignored BRW_NEW_TES_PROG_DATA as it doesn't have tessellation shaders, but listening to this is harmless as it'll never be signalled. Now that we've added _NEW_POLYGON for is_drawing_lines/points, we can merge the two as the distinction is meaningless. This actually fixes a bug, though: Gen8+ was using the gen6_clip_state atom because it doesn't care about early culling, but it also needs BRW_NEW_TES_PROG_DATA, which was missing. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965: Use gs_prog_data in is_drawing_points/lines().Kenneth Graunke2016-08-314-17/+19
| | | | | | | | State upload code should use prog_data rather than poking at core Mesa shader data structures wherever possible. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965: Fix missing dirty bits related to is_drawing_points/lines.Kenneth Graunke2016-08-313-5/+23
| | | | | | | | | | calculate_attr_overrides() uses is_drawing_points(), which depends on tessellation and geometry program state, as well as polygon state. v2: Add missing _NEW_POLYGON as well. Caught by Iago Toral. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965: enable OES_primitive_bounding_box with the no-op implementationIlia Mirkin2016-08-302-0/+4
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* st/mesa: provide the null implementation of bounding box outputs in tcsIlia Mirkin2016-08-301-0/+3
| | | | | | | | | Until hardware appears (in a gallium driver) that can make use of the TCS-outputted gl_BoundingBox, we just request that the variable gets assigned as a regular patch variable. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* glsl: add gl_BoundingBox and associated varying slotsIlia Mirkin2016-08-302-0/+9
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* mesa: add support for GL_PRIMITIVE_BOUNDING_BOX storage and queryIlia Mirkin2016-08-304-0/+57
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* mesa: add scaffolding for OES/EXT_primitive_bounding_boxIlia Mirkin2016-08-308-1/+97
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965/fs: Assert that the number of color targets is one when dual-source ↵Francisco Jerez2016-08-301-0/+1
| | | | | | | | | blend is enabled. Requested by Anuj during review of 4a87e4ade778e56d43333c65a58752b15a00ce69, adding as follow-up since it led to assertion failures due to various GLSL bugs that should be fixed now.
* glsl: Fix gl_program::OutputsWritten computation for dual-source blending.Francisco Jerez2016-08-301-3/+1
| | | | | | | | | | | | | | | | | | | | In the fragment shader OutputsWritten is a bitset of FRAG_RESULT_* enumerants, which represent the location of each color output written by the shader. The secondary and primary color outputs of a given render target using dual-source blending have the same location, so the 'idx' computation below will give the wrong bit as result if the 'var->data.index' term is non-zero -- E.g. if the shader writes the primary and secondary colors of the FRAG_RESULT_COLOR output, ir_set_program_inouts will think that the shader writes both FRAG_RESULT_COLOR and FRAG_RESULT_SAMPLE_MASK, which is just bogus. That would cause the brw_wm_prog_key::nr_color_regions computation done in the i965 driver during fragment shader precompilation to be wrong, which currently leads to unnecessary recompilation of shaders that use dual-source blending, and triggers an assertion failure in fs_visitor::emit_fb_writes() on my i965-fb-fetch branch. Reviewed-by: Ilia Mirkin <[email protected]>
* st/glsl_to_tgsi: Use SecondaryOutputsWritten to determine dual-source ↵Francisco Jerez2016-08-302-8/+15
| | | | | | | | | | | | | | | | | | | fragment outputs. Currently the mesa state tracker relies on there being two bits set per dual-source output in the gl_program::OutputsWritten bitset, but that only worked due to a GLSL front-end bug that caused it to set the OutputsWritten bit for both location and location+1 even though at the GLSL level the primary and secondary color outputs used for dual-source blending have the same location. Fix it by extending outputMapping[] to 2*FRAG_RESULT_MAX elements in order to represent a mapping from a (location, index) pair to its TGSI output, which should also make it slightly easier to add support for dual-source blending in combination with multiple render targets in the long run. No Piglit regressions on llvmpipe. Reviewed-by: Ilia Mirkin <[email protected]>
* glsl: Calculate bitset of secondary outputs written in ir_set_program_inouts.Francisco Jerez2016-08-301-0/+1
| | | | Reviewed-by: Ilia Mirkin <[email protected]>
* glsl: Generate ir_expression_operation.h from PythonIan Romanick2016-08-303-0/+3
| | | | | | | | | | | | | There are differences in where end-of-line comments are placed, but 'diff -wud' is clean. v2: Massive rebase. v3: With much help from José Fonseca, fix SCons build. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Matt Turner <[email protected]> Acked-by: Dylan Baker <[email protected]>
* i915: Check return value of screen->image.loader->getBuffersEmil Velikov2016-08-301-6/+9
| | | | | | | | | Ported from the i965 commit e7ab358e8186dd8651cf920d4db1500c60ccd2fc. Cc: 11.2 12.0 <[email protected]> Cc: Tomasz Figa <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* nouveau: make color/depth bpp match for pre-nv10 chipsIlia Mirkin2016-08-301-3/+3
| | | | | | | This avoids generating fbconfigs whose winsys framebuffers will be incomplete (see nouveau_check_framebuffer_complete). Signed-off-by: Ilia Mirkin <[email protected]>
* nouveau: always enable at least one RCIlia Mirkin2016-08-301-1/+1
| | | | | | | | | | Experimentally, this is required for glxgears and others to display the proper colors. This is also what the code used to do before the referenced commit. Fixes: c703658b396 (mesa: Drop _EnabledUnits.) Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected]
* nouveau: allow NV3x's to be used with nouveau_vieuxIlia Mirkin2016-08-302-1/+4
| | | | | | | | | NV34 and possibly other NV3x hardware has the capability of exposing the NV25 graph class. This allows forcing nouveau_vieux to be used instead of the gallium driver, primarily for testing purposes. (Among other things, NV2x only ever came as AGP or inside an Xbox, never PCI/PCIe). Signed-off-by: Ilia Mirkin <[email protected]>
* mesa: fix format conversion bug in get_tex_rgba_uncompressed()Brian Paul2016-08-291-6/+8
| | | | | | | | | | | We need to set the need_convert flag with each loop iteration, not just when the rgba pointer is null. Bug reported by Markus Müller <[email protected]> on mesa-users list. Fixes new piglit arb_texture_float-get-tex3d test. Cc: <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* intel/blorp: Add a format parameter to blorp_fast_clearJason Ekstrand2016-08-291-1/+3
| | | | | | | | | This allows us to use the actual render format as opposed to the texture format. I don't know that the hardware actually cares in the case of fast clears, but it certainly seems more correct. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Move blorp into src/intel/blorpJason Ekstrand2016-08-2913-3922/+11
| | | | | | | | | At this point, blorp is completely driver agnostic and can be safely moved into its own folder. Soon, we hope to start using it for doing blits in the Vulkan driver. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Remove the remaining brw prefixes from the blorp.h APIJason Ekstrand2016-08-299-112/+109
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Use isl_format_get_depth_format for setting depth formatsJason Ekstrand2016-08-291-14/+1
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Move the type_size function declartaions to brw_nir.hJason Ekstrand2016-08-292-8/+7
| | | | | | Signed-of-by: Jason Ekstrand <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* i965: Move get_fast_clear_rect to blorp_clear.cJason Ekstrand2016-08-293-131/+124
| | | | | | | This has been the only caller since we deleted the meta fast clear code. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Roll brw_get_ccs_resolve_rect into blorp_ccs_resolveJason Ekstrand2016-08-293-45/+29
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Get rid of most brw and mesa includesJason Ekstrand2016-08-294-20/+2
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Move the hiz_op enum to blorpJason Ekstrand2016-08-2913-60/+59
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Add a fast_clear_op enumJason Ekstrand2016-08-294-16/+32
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Make blorp_addres::buffer a void*Jason Ekstrand2016-08-292-4/+4
| | | | | | | The Vulkan driver doesn't use libdrm so we don't want to bake that in. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Get rid of brw_contextJason Ekstrand2016-08-296-88/+98
| | | | | | | | | | | This commit switches all of blorp from taking a brw_context to taking a blorp_context and, where useful, a void *batch. In the GL driver, we only have one active batch at a time so the brw_context *is* the batch but in Vulkan, batch will point to the anv_cmd_buffer in which we are building instructions. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Take a blorp_context in compile_nir_shaderJason Ekstrand2016-08-296-6/+11
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/meta_util: Take an isl_device in get_fast_clear_rectJason Ekstrand2016-08-293-5/+5
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Add an "exec" function pointer to blorp_contextJason Ekstrand2016-08-298-56/+50
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Remove some i965-isms from genX_blorp_exec.hJason Ekstrand2016-08-292-5/+5
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Move the guts of brw_blorp_exec into genX_blorp_exec.cJason Ekstrand2016-08-292-66/+66
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Pull the guts of blorp_exec into a driver-agnostic headerJason Ekstrand2016-08-293-1101/+1180
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp/exec: Refactor to use a new blorp_batch structJason Ekstrand2016-08-293-148/+195
| | | | | | | | | This gets rid of brw_context throughout the core of the state setup code. Instead, it is replaced with blorp_batch which contains a pointer to the blorp_context and a void* that the driver can use for its own blorp data. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Add a helper for allocating binding tables and surface statesJason Ekstrand2016-08-291-22/+42
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Use BT_INDEX enums for setting up the binding tableJason Ekstrand2016-08-291-2/+2
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Shorten binding table index enum namesJason Ekstrand2016-08-292-6/+6
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp/genX: Add a blorp_surface_reloc helperJason Ekstrand2016-08-291-17/+21
| | | | | | | | | | | Previously, we passed the buffer address (as per the latest offset from the kernel) to ISL to use when it filled out the surface state. We then called drm_intel_bo_emit_reloc() to add the relocation to the list. The newly added blorp_surface_reloc helper adds the relocation to the list and then writes the buffer address directly into the surface state. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
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