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* mesa: rename src/mesa/shader/ to src/mesa/program/Brian Paul2010-06-10138-461/+459
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* mesa: move shader/slang/* sources to main/slang/*Brian Paul2010-06-1053-45/+45
| | | | Reduce the source tree depth a bit.
* mesa: move nvprogram.[ch] to main/Brian Paul2010-06-107-13/+13
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* mesa: move arbprogram.[ch] to main/Brian Paul2010-06-109-12/+12
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* mesa: move atifragshader.[ch] to main/Brian Paul2010-06-109-12/+12
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* mesa: move uniforms.c to main/Brian Paul2010-06-106-6/+6
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* mesa: refactor shader api / object codeBrian Paul2010-06-1020-1872/+1793
| | | | | Remove the unneeded ctx->Driver hooks for shader-related functions. Move state and API-related things into main/.
* i965: remove UseProgram driver callbackBrian Paul2010-06-101-10/+0
| | | | It just duplicated the default/core Mesa behaviour.
* intel: Remove unnecessary header.Vinson Lee2010-06-101-1/+0
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* i965: Add support for GL_ALPHA framebuffer objects.Eric Anholt2010-06-106-14/+85
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* mesa: Allow GL_ALPHA FBOs with ARB_framebuffer_object.Eric Anholt2010-06-102-3/+7
| | | | Drivers still reject them today, but cairo would like to use these.
* swrast: When reading from a 0-bits r,g,b channel, return 0 not 1.Eric Anholt2010-06-101-3/+11
| | | | | | | It looks like we were reading a fractional value, multiplying by an enormous negative value, then stuffing that value into a bitfield assuming it was already clamped. This becomes relevant for GL_ALPHA or R/RG FBOs.
* intel: Use the blitter to upload TexSubImage data to busy textures.Eric Anholt2010-06-091-10/+67
| | | | | | | | | | | | | | This avoids many pipeline stalls in cairo-gl. [ # ] backend test min(s) median(s) stddev. count Before: [ 0] gl firefox-talos-gfx 36.799 36.851 2.34% 3/3 [ 0] gl firefox-talos-svg 33.429 35.360 3.46% 3/3 After: [ 0] gl firefox-talos-gfx 35.895 36.250 0.48% 3/3 [ 0] gl firefox-talos-svg 26.669 29.888 5.34% 3/3 This doesn't avoid all the pipeline stalls because the kernel reports !busy for buffers on the flushing list. That should be fixed in .36.
* i965: Avoid calloc/free in the CURBE upload process.Eric Anholt2010-06-095-20/+26
| | | | | | | In exchange we end up with an extra memcpy, but that seems better than calloc/free. Each buffer is 4k maximum, and on the i965-streaming branch this allocation was showing up as the top entry in brw_validate_state profiling for cairo-gl.
* intel: Flag NEW_BUFFERS when changing draw buffers.Eric Anholt2010-06-081-0/+1
| | | | | | | There were entries to this function (most imporantly, prepare_render -> update_renderbuffers) that wouldn't have had NEW_BUFFERS set, but brw_wm_surface_state (the i965 state tracking the drawing regions) expected this to change.
* intel: Convert remaining dri_bo_emit_reloc to drm_intel_bo_emit_reloc.Eric Anholt2010-06-089-60/+41
| | | | | The new API makes so much more sense, I'd like to forget how the old one worked.
* intel: Change dri_bo_* to drm_intel_bo* to consistently use new API.Eric Anholt2010-06-0844-272/+277
| | | | | The slightly less mechanical change of converting the emit_reloc calls will follow.
* intel: Clean up stale comments in intel_batchbuffer.c.Eric Anholt2010-06-081-4/+1
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* intel: Remove the non-gem paths for batchbuffer upload.Eric Anholt2010-06-081-22/+4
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* intel: Update comment in intel_tex_copy from before miptree x/y rework.Eric Anholt2010-06-081-1/+1
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* r600: Make next_inst() static.Henri Verbeet2010-06-082-59/+61
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* r600: Assert output registers have a valid export index.Henri Verbeet2010-06-081-0/+4
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* r600: Process exports for all written fragment outputs.Henri Verbeet2010-06-081-26/+12
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* r600: Fill uiFP_OutputMap for all written fragment outputs.Henri Verbeet2010-06-081-16/+17
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* st/mesa: attempt to fix TFP by using sampler views (v1)Dave Airlie2010-06-085-10/+63
| | | | | | | | | Okay I think this is good enough for now, I can't see any other reason for mesa to want to use a sampler view so lets just leave it at all the A->X conversions for now. I've been running gnome-shell under r300g with this for day or so and it seems fine. Signed-off-by: Dave Airlie <[email protected]>
* st/mesa: advertise GL_ARB_fragment_program_shadowMarek Olšák2010-06-061-0/+1
| | | | | There is nothing driver-specific about this one. I've also tested it just to be sure.
* st/mesa: trivially enable GL_ATI_texture_env_combine3Marek Olšák2010-06-051-0/+2
| | | | | | | | This extension is implemented in the texenv program. Gallium drivers pass patched glean/texCombine. (I am going to send the patch soon) Catalyst9.3 advertises this extension too so I don't see a reason we shouldn't.
* mesa: add ARB_texture_swizzle as alias of EXT_texture_swizzle, update relnotesMarek Olšák2010-06-051-0/+1
| | | | The specifications are identical.
* r300compiler: fix scons buildJoakim Sindholt2010-06-051-0/+2
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* st/mesa: fix bug in depthstencil optimizing clear logicRoland Scheidegger2010-06-051-1/+2
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* i915: Only emit a MI_FLUSH when the drawing rectangle offset changes.Chris Wilson2010-06-052-8/+24
| | | | Signed-off-by: Chris Wilson <[email protected]>
* i915: Fix off-by-one for drawing rectangle.Chris Wilson2010-06-051-2/+2
| | | | | | | | | | | | | | | The drawing rectangle is given in *inclusive* pixel values, so the range is only [0,2047]. Hence when rendering to a 2048 wide target, such as an extended desktop, we would issue an illegal instruction zeroing the draw area. Fixes: Bug 27408: Primary and Secondary display blanks in extended desktop mode with Compiz enabled https://bugs.freedesktop.org/show_bug.cgi?id=27408 Signed-off-by: Chris Wilson <[email protected]>
* i915: Inhibit render cache flush when changing drawing rectangle offset.Chris Wilson2010-06-051-1/+1
| | | | Signed-off-by: Chris Wilson <[email protected]>
* mesa/st: add support for EXT_texture_swizzle.Dave Airlie2010-06-052-2/+59
| | | | | | | | | | | This passes on r300g, the only bit I'm not really sure about is the handling of the sampler_view in st_atom_texture.c, I unreference it there if the swizzle value changes and I also have to create a new set of functions to create a new one since the u_sampler.c ones don't handle swizzle so much. adds r300g + softpipe enables, I think other drivers could pass easily enough. Signed-off-by: Dave Airlie <[email protected]>
* r300/compiler: implement SIN+COS+SCS for vertex shadersMarek Olšák2010-06-053-21/+76
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* r300/compiler: implement SNE unwound for r3xx VS, natively for r5xx VSMarek Olšák2010-06-052-1/+37
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* r300/compiler: implement SEQ unwound for r3xx VS, natively for r5xx VSMarek Olšák2010-06-052-0/+36
| | | | Fixes piglit/glsl-vs-vec4-indexing-4.
* r300/compiler: implement SFL for vertex shadersMarek Olšák2010-06-051-2/+3
| | | | And sort the "case" statements alphabetically.
* vbo: misc clean-upsBrian Paul2010-06-041-29/+36
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* i915: Don't use XRGB8888 on 830 and 845.Eric Anholt2010-06-043-2/+18
| | | | | | | | | The support for XRGB8888 appeared in the 855 and 865, and this format is reserved on 830/845. This should fix a regression from b4a6169412819cc3a027c6a118f0537911145a30 that caused hangs in etracer on 845s. Bug #26557.
* i915: Clamp minimum lod to maximum texture level too.Eric Anholt2010-06-041-1/+3
| | | | | | | Otherwise, we'd run into minlod > maxlod, and the sampler would give us the undefined we asked for. Bug #24846. Fixes OGLC texlod.c.
* intel: Fix intel_compressed_num_bytes for FXT1 after I broke it.Eric Anholt2010-06-041-1/+1
| | | | | | | | Fixes piglit fxt1-teximage since 7554b83a21bd62b20df5a7327b69f08108ac9ab6, and also OGLC tests that hit FXT1 with a million other things. Bug #28184.
* Merge branch 'gallium-newclear'Roland Scheidegger2010-06-032-14/+32
|\ | | | | | | | | Conflicts: src/gallium/state_trackers/python/p_context.i
| * st/mesa: use new ability to clear only depth or stencilRoland Scheidegger2010-05-292-14/+32
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* | gallium: silence all debug_named_value related warningsJoakim Sindholt2010-06-031-9/+9
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* | r300/compiler: print opcode names instead of numbersMarek Olšák2010-06-033-8/+8
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* | dri/swrast: Remove unnecessary header.Vinson Lee2010-06-021-1/+0
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* | st/mesa: fix indirect addressing of input/output regsBrian Paul2010-06-021-4/+9
| | | | | | | | | | | | This fixes an issue that was missed with commit 9f544394c1d059ce09c8bb2b5e11f5e871c7915f. Fixes piglit glsl-texcoord-array.shader_test
* | intel: Remove a leftover DRI1/DRI2 conditionalKristian Høgsberg2010-06-021-7/+2
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* | glsl: handle indirectly indexed input registers in linkerBrian Paul2010-06-021-29/+108
| | | | | | | | | | | | | | | | | | | | For example, if the fragment shader reads gl_TexCoord[i] with a dynamic index we need to set all the InputsRead bits for all texcoords. We were already doing this for shader outputs. Refactored the later code so inputs and outputs are handled with similar code. Fixes a swrast failure with piglit's glsl-texcoord-array.shader_test
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