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* nir: Rework conversion opcodesJason Ekstrand2017-03-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The NIR story on conversion opcodes is a mess. We've had way too many of them, naming is inconsistent, and which ones have explicit sizes was sort-of random. This commit re-organizes things and makes them all consistent: - All non-bool conversion opcodes now have the explicit size in the destination and are named <src_type>2<dst_type><size>. - Integer <-> integer conversion opcodes now only come in i2i and u2u forms (i2u and u2i have been removed) since the only difference between the different integer conversions is whether or not they sign-extend when up-converting. - Boolean conversion opcodes all have the explicit size on the bool and are named <src_type>2<dst_type>. Making things consistent also allows nir_type_conversion_op to be moved to nir_opcodes.c and auto-generated using mako. This will make adding int8, int16, and float16 versions much easier when the time comes. Reviewed-by: Eric Anholt <[email protected]>
* st/mesa: disable the shader cache if dumping shadersMarek Olšák2017-03-131-4/+4
| | | | | | otherwise, cached shaders aren't dumped. Reviewed-by: Timothy Arceri <[email protected]>
* intel: fix compiler buildIago Toral Quiroga2017-03-131-8/+0
| | | | | | | | | compiler/brw_vec4_gs_visitor.cpp:744:39: error: ‘GEN7_MAX_GS_OUTPUT_VERTEX_SIZE_BYTES’ was not declared in this scope output_vertex_size_bytes <= GEN7_MAX_GS_OUTPUT_VERTEX_SIZE_BYTES); Fixes: d0d4a5f43b4 ("i965: split EU defines to brw_eu_defines.h") Reviewed-by: Emil Velikov <[email protected]>
* i965: remove i965_symbols_test reference from .gitignoreEmil Velikov2017-03-131-1/+0
| | | | | | | | | | The test/binary was removed back in 2012. With that one gone, we can drop the .gitignore file all together. Cc: Eric Anholt <[email protected]> Fixes: c8850394423 ("i965: Drop the missing symbols link test.") Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Move the back-end compiler to src/intel/compilerJason Ekstrand2017-03-13121-63954/+29
| | | | | | | | | | | | | | | | | | | | | | Mostly a dummy git mv with a couple of noticable parts: - With the earlier header cleanups, nothing in src/intel depends files from src/mesa/drivers/dri/i965/ - Both Autoconf and Android builds are addressed. Thanks to Mauro and Tapani for the fixups in the latter - brw_util.[ch] is not really compiler specific, so it's moved to i965. v2: - move brw_eu_defines.h instead of brw_defines.h - remove no-longer applicable includes - add missing vulkan/ prefix in the Android build (thanks Tapani) v3: - don't list brw_defines.h in src/intel/Makefile.sources (Jason) - rebase on top of the oa patches [Emil Velikov: commit message, various small fixes througout] Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: split EU defines to brw_eu_defines.hEmil Velikov2017-03-1318-1197/+1263
| | | | | | | | | | | | | | | | | | | Split out the EU defines from the 'generic' ones, as the former are more compiler oriented. With a later commit we'll move brw_eu_defines.h alongside the compiler infra to src/intel/. Pulling all the defines in there seems overzealous. Some defines are used by both i965 and the i965 compiler. Those are moved to brw_eu_defines.h, and annotated accordingly. The i965 users were updated to have the extre include to indicate that. With future work we might provide a better, split but for now this seems reasonable. Cc: Kenneth Graunke <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: add missing brw_defines.h include in brw_program.cEmil Velikov2017-03-131-0/+1
| | | | | | | | File is using MI_LOAD_REGISTER_IMM, GEN7_CACHE_MODE_1 and others as defined in the header. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: add missing brw_defines.h include in brw_program.cEmil Velikov2017-03-131-0/+1
| | | | | | | File is using the PIPE_CONTROL_* macros as defined in the header. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: add missing #include <assert.h> in brw_inst.hEmil Velikov2017-03-131-0/+1
| | | | | Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: move brw_define.h ifndef guard to the topEmil Velikov2017-03-131-3/+3
| | | | | | Cc: [email protected] Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: remove unused macros from brw_defines.hEmil Velikov2017-03-131-19/+1
| | | | | | | | | | | The follow three groups are not used by neither the DRI module nor the compiler. BRW_POLYGON_*_FACING BRW_POLYGON_FACING_* BRW_STATELESS_BUFFER_* Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: remove unused brw_program.h includeEmil Velikov2017-03-137-7/+0
| | | | | | | | | | | | Neither of the changed files requires the brw_program.h include. Since we're about to move them [to src/intel/compiler] with the next commit there's no point in having the include. Let alone the very confusing compiler include directive [-I${top_srcdir}/src/mesa/drivers/dri/i965/] that one would have to use. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: remove duplicate declaration of brw_mark_surface_usedEmil Velikov2017-03-131-4/+0
| | | | | | | | | Function was made static and moved to another header with earlier commit. Fixes: 760c8a1d950 ("i965: Make mark_surface_used a static inline in brw_compiler.h") Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: remove dead brw_new_shader() declarationEmil Velikov2017-03-131-2/+0
| | | | | | | Cc: Timothy Arceri <[email protected]> Fixes: 194537ebe44 ("mesa/glsl/i965: remove Driver.NewShader()") Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: remove unused brw_cs.h includeEmil Velikov2017-03-131-1/+0
| | | | | Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Delete unused last_ring local.Kenneth Graunke2017-03-121-1/+0
| | | | | Dead since 071d80bde2a78f464a7f54c3e6c6e42845ef52e4, and causing warnings.
* glsl: don't use ralloc for blob creationTimothy Arceri2017-03-131-2/+2
| | | | | | There is no need to use ralloc here. Reviewed-by: Marek Olšák <[email protected]>
* mesa/glsl: introduce new gl_compile_status enumTimothy Arceri2017-03-124-6/+18
| | | | | | | This will allow us to tell if a shader really has been compiled or if the shader cache has just seen it before. Acked-by: Marek Olšák <[email protected]>
* i965: Initialize compaction tables in unit test.Matt Turner2017-03-101-0/+1
| | | | | Fixes: fa4b792e833a "i965: Move brw_init_compaction_tables() to brw_create_compiler()." Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100154
* i965: Move brw_init_compaction_tables() to brw_create_compiler().Matt Turner2017-03-103-7/+2
| | | | | | | | ... so that we can avoid threading complications or unnecessary compaction table initializations (which just consists of setting some pointers based on devinfo->gen). Reviewed-by: Jason Ekstrand <[email protected]>
* dri: use correct shebang for gen-symbol-redefs.pyEmil Velikov2017-03-101-1/+1
| | | | | | | | This is a python2 script and the generic "python" may point to python3. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Andreas Boll <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* xmlpool: remove shebang from gen_xmlpool.pyEmil Velikov2017-03-101-1/+0
| | | | | | | Analogous to earlier commit(s). Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* i965: remove shebang from brw_nir_trig_workarounds.pyEmil Velikov2017-03-101-1/+0
| | | | | | | Analogous to earlier commit(s). Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* i965: remove execute bit from brw_nir_trig_workarounds.pyEmil Velikov2017-03-101-0/+0
| | | | | | | Analogous to earlier commit(s). Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* mesa: remove shebang from python scriptsEmil Velikov2017-03-105-5/+0
| | | | | | | Analogous to earlier commit(s). Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* mesa: remove execute bit from main/format_parser.pyEmil Velikov2017-03-101-0/+0
| | | | | | | Analogous to earlier commit(s). Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* i965: Rename brw_format_for_mesa_format() to brw_isl_format_for_mesa_format()Anuj Phogat2017-03-097-14/+14
| | | | | Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Add more Haswell OA metrics setsRobert Bragg2017-03-091-1/+3403
| | | | | | | | | | | | | | This extends the brw_oa_hsw.xml to expose these additional queries: - Compute Metrics Basic Gen7.5 - Compute Metrics Extended Gen7.5 - Memory Reads Distribution Gen7.5 - Memory Writes Distribution Gen7.5 - Metric set Sampler Balance Signed-off-by: Robert Bragg <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Acked-by: Kenneth Graunke <[email protected]>
* i965: Expose OA counters via INTEL_performance_queryRobert Bragg2017-03-092-13/+1158
| | | | | | | | | | | | | | | | | This adds support for exposing basic Observation Architecture performance counters on Haswell. This support is based on the i915 perf kernel interface which is used to configure the OA unit, allowing Mesa to emit MI_REPORT_PERF_COUNT commands around queries to collect counter snapshots. To take into account the small chance that some of the 32bit counters could wrap around for long queries (~50 milliseconds for a GT3 Haswell @ 1.1GHz) the implementation also collects periodic metrics. Signed-off-by: Robert Bragg <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Acked-by: Kenneth Graunke <[email protected]>
* i965: Add script to gen code for OA counter queriesRobert Bragg2017-03-093-2/+575
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Avoiding lots of error prone boilerplate and easing our ability to add + maintain support for multiple OA performance counter queries for each generation: This adds a python script to generate code for building up performance_queries from the metric sets and counters described in brw_oa_hsw.xml as well as functions to normalize each counter based on the RPN expressions given. Although the XML file currently only includes a single metric set, the code generated assumes there could be many sets. The metrics as described in XML get translated into C structures which are registered in a brw->perfquery.oa_metrics_table hash table keyed by the GUID of the metric set in XML. v2: numerous python style improvements (Dylan) v3: Makefile.am fixups (Emil) v4: Pattern rule for codegen + orthogonal .c and .h rules (Robert) Signed-off-by: Robert Bragg <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Dylan Baker <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Acked-by: Kenneth Graunke <[email protected]>
* i965: extend query/counter structs for OA queriesRobert Bragg2017-03-092-1/+21
| | | | | | | | | | | | | | | | | | | | | | | In preparation for generating code from brw_oa_hsw.xml for describing OA performance counter queries this adds some OA specific members to brw_perf_query that our generated code will initialize: - The oa_metric_set_id is the ID we will pass to DRM_IOCTL_I915_PERF_OPEN, and is an ID got via sysfs under: /sys/class/drm/<card>/metrics/<guid/id - The oa_format is the OA report layout we will request from the kernel - The accumulator offsets determine where the different groups of A, B and C counters are located within an intermediate 64bit 'accumulator' buffer. Additionally brw_perf_query_counter now has 64bit or float _read() callback members for OA counters. Signed-off-by: Robert Bragg <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Acked-by: Kenneth Graunke <[email protected]>
* i965: brw_context.h additions for OA unit query codegenRobert Bragg2017-03-091-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In preparation for generating code from the XML performance counter meta data, this makes some additions to brw_context.h for this code to be able to reference. It adds a brw->perfquery.oa_metrics_table hash table for indexing built up query descriptions by the GUID that is expected to be advertised by the kernel (via sysfs) to be able to use that query. It adds an 'OA_COUNTERS' brw_query_kind to be assigned to queries built up by generated code. It adds a brw->perfquery.sys_vars structure to have a consistent place to represent the different system variables like $EuCoresTotalCount and $EuSlicesTotalCount that are referenced by OA counter normalization equations. Although extending + referencing gen_device_info for these variables was considered, these are some of the (mostly minor) reasons for going with a dedicated structure: - Currently we only need this info for the performance_query backend and it might be a bit tedious to go back and initialize the state for pre-Haswell devinfo structures. - Considering the $SubsliceMask then the requirement for how multiple per-slice masks are packed only comes from how the variables are references by availability tests in XML, and might not be a good general representation for tracking subslice masks if another use case arises. - If we used gen_device_info then we'd likely want to avoid making assumptions about the C types during codegen and adding explicit casts, while that's not necessary with a dedicated struct with all members being uint64_t. - This structure and the code for initializing it is currently shared (just through copy & paste) with a few other projects dealing with OA counters, and that's been convenient so far. Signed-off-by: Robert Bragg <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Acked-by: Kenneth Graunke <[email protected]>
* i965: XML description of Haswell OA metric setRobert Bragg2017-03-091-0/+998
| | | | | | | | | | | | | | | | | | | | | | In preparation for exposing Gen Observation Architecture performance counters via INTEL_performance_query this adds an XML description for an initial 'Render Metrics Basic Gen7.5' query and corresponding counters. The intention is to auto generate code for building a query from these counters as well as the code for normalizing the individual counters. Note that the upstream for this XML data is currently GPU Top: https://github.com/rib/gputop The files are maintained under gputop-data/ and they are themselves derived from files in an internal 'MDAPI XML' schema. There are scripts under gputop-scripts/ and make rules in gputop-data/Makefile.xml for maintaining these files. Signed-off-by: Robert Bragg <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Acked-by: Kenneth Graunke <[email protected]>
* mesa/main: make use of lookup_samplerobj_locked()Samuel Pitoiset2017-03-091-11/+1
| | | | | | | | There is no need to check sampler == 0 twice. This removes now unused _mesa_lookup_samplerobj_locked(). Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* mesa/main: inline {begin,end}_samplerobj_lookups()Samuel Pitoiset2017-03-091-16/+2
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Delete render ring prelude.Kenneth Graunke2017-03-082-10/+0
| | | | | | | | | | | This was a hook I came up when trying to do the initial performance counter work years ago. Nothing's used it for a long time, and the upcoming performance counter support doesn't want it either. So, goodbye render ring prelude. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* mesa/main: remove unused _mesa_new_texture_image()Samuel Pitoiset2017-03-092-20/+0
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Alejandro Piñeiro <[email protected]>
* i965: Remove use of deprecated drm_intel_aub routinesChris Wilson2017-03-076-96/+1
| | | | | | | | | | | | | | With mesa/drm commit cd2f91e18db087edf93fed828e568ee53b887860 Author: Kristian Høgsberg Kristensen <[email protected]> Date: Fri Jul 31 10:47:50 2015 -0700 intel: Drop aub dumping functionality the drm_intel_aub routines are mere stubs and do nothing. Likewise remove our invocations. Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* st/mesa: don't propagate uniforms when restoring from cacheTimothy Arceri2017-03-085-9/+17
| | | | | | | We will have already loaded the uniforms when the parameter list was restored from cache. Reviewed-by: Marek Olšák <[email protected]>
* i965: Return NULL from initScreen2, not false.Kenneth Graunke2017-03-061-4/+4
| | | | | | | | This returns a pointer, not a boolean. No actual effect, but cleaner. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* i965: Make a devinfo local variable.Kenneth Graunke2017-03-061-12/+13
| | | | | | | | screen->devinfo.gen is annoying to type and linewrap. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* i965: Delete vestiges of resource streamer code.Kenneth Graunke2017-03-0611-357/+10
| | | | | | | | | | | | | We never actually used the resource streamer in any shipping build of Mesa. We have no plans to do so in the future. We looked into using it in Vulkan, and concluded that it was unusable. We're not the only ones to arrive at the conclusion that it's not worth using. So, drop the last vestiges of resource streamer support and move on. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* i965: Drop duplicate #defines now that we've bumped libdrm requirements.Kenneth Graunke2017-03-062-13/+0
| | | | | | | | We've updated our libdrm requirement, and it will already provide these. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* getteximage: fix _mesa_GetTextureSubImage()Samuel Pitoiset2017-03-061-1/+1
| | | | | | | | | Oops. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100088 Fixes: 5ae54c0cf7 ("getteximage: avoid to lookup textures with id 0") Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* mesa/main: remove useless check in _mesa_IsSampler()Samuel Pitoiset2017-03-061-7/+1
| | | | | | | | | _mesa_lookup_samplerobj() returns NULL if sampler is 0. v2: use _mesa_lookup...(...) != NULL Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* getteximage: avoid to lookup textures with id 0Samuel Pitoiset2017-03-061-3/+7
| | | | | | | | | | This fixes the following assertion when the key is 0. main/hash.c:181: _mesa_HashLookup_unlocked: Assertion `key' failed. Fixes: 633c959fae ("getteximage: Return correct error value when texure object is not found") Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* i965: Clamp texture buffer size to GL_MAX_TEXTURE_BUFFER_SIZE.Kenneth Graunke2017-03-041-0/+18
| | | | | | | | | | | | | | | | | | | The OpenGL 4.5 specification's description of TexBuffer says: "The number of texels in the texture image is then clamped to an implementation-dependent limit, the value of MAX_TEXTURE_BUFFER_SIZE." We set GL_MAX_TEXTURE_BUFFER_SIZE to 2^27. For buffers with a byte element size, this is the maximum possible size we can encode in SURFACE_STATE. If you bind a buffer object larger than this as a texture buffer object, we'll exceed that limit and hit an isl assert: assert(num_elements <= (1ull << 27)); To fix this, clamp the size in bytes to MaxTextureSize / texel_size. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* mesa/main: *TextureSubImage* generates INVALID_OPERATION on wrong targetAlejandro Piñeiro2017-03-031-3/+3
| | | | | | | | | | | | | | | | | | | | | | | Equivalent *TexSubImage* methods generates INVALID_ENUM. From OpenGL 4.5 spec, section 8.6 Alternate Texture Image Specification Commands: "An INVALID_ENUM error is generated by *TexSubImage* if target does not match the command, as shown in table 8.15." And: "An INVALID_OPERATION error is generated by *TextureSubImage* if the effective target of texture does not match the command, as shown in table 8.15." Fixes: GL45-CTS.direct_state_access.textures_copy_errors v2: slightly change commit summary (Samuel) Reviewed-by: Samuel Pitoiset <[email protected]>
* automake: i965: list correct header in Makefile.sourceEmil Velikov2017-03-021-1/+1
| | | | | Fixes: 7ac47b1af767 ("i965: Add a header for brw_vec4_vs_visitor") Signed-off-by: Emil Velikov <[email protected]>
* mesa: Avoid read of uninitialized variableRobert Foss2017-03-021-1/+1
| | | | | | | | | | | | | | | | The is_color_attachement variable is later read when handling two separate error cases, where only one of the cases results in the variable being initialized. This can be avoided by giving the variable a safe default value. Coverity-Id: 1398631 Cc: [email protected] Signed-off-by: Robert Foss <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> Reviewed-by: Anuj Phogat <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
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