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* i965: Mark cfg dumping functions const.Kenneth Graunke2014-09-052-4/+4
| | | | | | | | | | The dump() methods don't alter the CFG or basic blocks, so we should mark them as const. This lets you call them even if you have a const cfg_t - which is the case in certain portions of the code (such as live interval handling). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Update if_block/else_block in the dead control flow pass.Matt Turner2014-09-051-0/+7
| | | | | | I think this bug crept in only recently. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Connect cfg properly in predicated break peephole.Matt Turner2014-09-051-4/+9
| | | | | | | | If the ENDIF instruction was the only instruction in its block, we'd leave the successors of the merged if+jump block in a bad state. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83080 Reviewed-by: Kenneth Graunke <[email protected]>
* st/mesa: use 1.0f as boolean true on drivers without integer supportMarek Olšák2014-09-051-2/+3
| | | | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82882 Cc: 10.2 10.3 [email protected] Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* mesa: set UniformBooleanTrue = 1.0f by defaultMarek Olšák2014-09-052-0/+10
| | | | | | | | | | because NativeIntegers is 0 by default. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82882 Cc: 10.2 10.3 [email protected] Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* Revert 5 i965 patches: 8e27a4d2, 373143ed, c5bdf9be, 6f56e142, 88e3d404Jordan Justen2014-09-0434-185/+112
| | | | | | | | | | | | | | | | | | | | | | Reverts * "i965: Modify state upload to allow 2 different sets of state atoms." 8e27a4d2b3e4e74e9a77446bce49607433d86be3 * "i965: Modify dirty bit handling to support 2 pipelines." 373143ed9187c4d4ce1e3c486b5dd0880d18ec8b * "i965: Create a macro for checking a dirty bit." c5bdf9be1eca190417998d548fd140c1eca37a54 Conflicts: src/mesa/drivers/dri/i965/brw_context.h * "i965: Create a macro for setting all dirty bits." 6f56e1424d923fd80c84090fbf4506c9eaaffea1 Conflicts: src/mesa/drivers/dri/i965/brw_blorp.cpp src/mesa/drivers/dri/i965/brw_state_cache.c src/mesa/drivers/dri/i965/brw_state_upload.c * "i965: Create a macro for setting a dirty bit." 88e3d404dad009d8cff5124cf8acee7daeaceb64 Signed-off-by: Jordan Justen <[email protected]>
* i965/fs: Use prog rather than fp->Base in fs_visitorJordan Justen2014-09-042-15/+15
| | | | | | | Reduce fs_visitor's dependence on gl_fragment_program. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Use stage_prog_data instead of prog_data->base in fs_visitorJordan Justen2014-09-041-6/+6
| | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Add init function to fs_visitorJordan Justen2014-09-042-0/+7
| | | | | | | | This common init routine can be used by constructors for multiple program types. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* state_tracker: Fix bug in conditional discards with native ints.Eric Anholt2014-09-041-2/+12
| | | | | | | | | A bool is 0 or ~0, and KILL_IF takes a float arg that's <0 for discard or >= 0 for not. By negating it, we ended up doing a floating point subtract of (0 - ~0), which ended up as an inf. To make this actually work, we need to convert the bool to a float. Reviewed-by: Brian Paul <[email protected]>
* swrast: s/INLINE/inline/Brian Paul2014-09-041-1/+1
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* osmesa: s/INLINE/inline/Brian Paul2014-09-041-1/+1
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* xlib: s/INLINE/inline/Brian Paul2014-09-041-3/+3
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* meta: s/INLINE/inline/Brian Paul2014-09-041-1/+1
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: s/INLINE/inline/Brian Paul2014-09-043-5/+5
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: invalidate draw state in glPopClientAttribMarek Olšák2014-09-041-0/+4
| | | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82538 Cc: [email protected] Reviewed-by: Brian Paul <[email protected]>
* Eliminate several cases of multiplication in arguments to callocCarl Worth2014-09-037-13/+13
| | | | | | | | | | | | | | | | | | | | | | In commit 32f2fd1c5d6088692551c80352b7d6fa35b0cd09, several calls to _mesa_calloc(x) were replaced with calls to calloc(1, x). This is strictly equivalent to what the code was doing previously. But for cases where "x" involves multiplication, now that we are explicitly using the two-argument calloc, we can do one step better and replace: calloc(1, A * B); with: calloc(A, B); The advantage of the latter is that calloc will detect any overflow that would have resulted from the multiplication and will fail the allocation, (whereas the former would return a small allocation). So this fix can change potentially exploitable buffer overruns into segmentation faults. Reviewed-by: Matt Turner <[email protected]>
* i965: Handle ir_triop_csel in emit_bool_to_cond_code().Kenneth Graunke2014-09-032-4/+36
| | | | | | | | | | | ir_triop_csel can return a boolean expression, so we need to handle it here; we simply forgot when we added it. Fixes Piglit's EXT_shader_integer_mix/{vs,fs}-mix-if-bool. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> Cc: [email protected]
* i965: Move curb_read_length/total_scratch to brw_stage_prog_data.Kenneth Graunke2014-09-0316-38/+40
| | | | | | | | All shader stages have these fields, so it makes sense to store them in the common base structure, rather than duplicating them in each. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965/copy_image: Divide the x offsets by block width when using the blitterJason Ekstrand2014-09-031-10/+21
| | | | | | | | Signed-off-by: Jason Ekstrand <[email protected]> Cc: "10.3" <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82804 Tested-by: Tapani Pälli <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/copy_image: Use the correct block dimensionJason Ekstrand2014-09-031-6/+6
| | | | | | | | Signed-off-by: Jason Ekstrand <[email protected]> Cc: "10.3" <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82804 Tested-by: Tapani Pälli <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* meta/copy_image: Use the correct texture level when creating viewsJason Ekstrand2014-09-031-1/+1
| | | | | | | | | | | | | | Previously, we were accidentally assuming that the level of both textures was 0. Now we actually use the correct level in our hacked texture view. This doesn't 100% fix the meta path because the texture type is getting lost somewhere in the pipeline. However, it actually copies to/from the correct layer now. Signed-off-by: Jason Ekstrand <[email protected]> Cc: "10.3" <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82804 Tested-by: Tapani Pälli <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/copy_image: Use the correct texture levelJason Ekstrand2014-09-031-4/+6
| | | | | | | | | | | | Previously, we were using the source images level for both source and destination. Also, we weren't taking the MinLevel from a potential texture view into account. This commit fixes both problems. Signed-off-by: Jason Ekstrand <[email protected]> Cc: "10.3" <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82804 Tested-by: Tapani Pälli <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* main: Don't leak temporary texture rowsJason Ekstrand2014-09-021-0/+4
| | | | | Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* meta: Make MESA_META_DRAW_BUFFERS restore properlyKristian Høgsberg2014-09-021-34/+4
| | | | | | | | | | | | | | | | | | | | A meta begin/end pair with MESA_META_DRAW_BUFFERS will change visible GL state. We recreate the draw buffer enums from the buffer bitfield, which changes GL_BACK to GL_BACK_LEFT (and GL_FRONT to GL_FRONT_LEFT). This commit modifes the save/restore logic to instead copy the buffer enums from the gl_framebuffer and then set them on restore using _mesa_drawbuffers(). It's not clear how this breaks the benchmark in 82796, but fixing meta to not leak the state change fixes the regression. No piglit regressions. Reviewed-by: Kenneth Graunke <[email protected]> Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=82796 Signed-off-by: Kristian Høgsberg <[email protected]> Cc: [email protected]
* Revert "mesa: fix make tarballs"Emil Velikov2014-09-021-2/+1
| | | | | | | | | | | | | | | | This reverts commit 0fbb9a599df898d4e1166d6d6f00cb34a0524bea. Rather than adding hacks around the issue drop the sources from the final tarball, and re-add them back with 'make dist'. This fixes a problem when running parallel 'make install' fails as it recreates sources and triggers partial recompilation. Cc: "10.2 10.3" <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83355 Reported-by: Maarten Lankhorst <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Tested-by: Maarten Lankhorst <[email protected]> Tested-by: Kai Wasserbäch <[email protected]>
* mesa/program_cache: calloc the correct size for the cache.Dave Airlie2014-09-021-1/+1
| | | | | | | | | Coverity reported this, and I think this is the right solution, since cache->items is struct cache_item ** not struct cache_item *, we also realloc it using struct cache_item * at some point. Reviewed-by: Tapani Pälli <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* main/cs: Add gl_context::ComputeProgramPaul Berry2014-09-011-0/+15
| | | | Reviewed-by: Jordan Justen <[email protected]>
* mesa: Convert NewDriverState to 64-bitsJordan Justen2014-09-016-13/+25
| | | | | | | i965 will have more than 32 bits when BRW_STATE_COMPUTE_PROGRAM is added. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* i965: Modify state upload to allow 2 different sets of state atoms.Paul Berry2014-09-012-25/+32
| | | | | | | The set of state atoms for compute shaders is currently empty; it will be filled in by future patches. Reviewed-by: Jordan Justen <[email protected]>
* i965: Modify dirty bit handling to support 2 pipelines.Paul Berry2014-09-014-16/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The hardware state for compute shaders is almost entirely orthogonal to the hardware state for 3D rendering. To avoid sending unnecessary state to the hardware, we'll need to have a separate set of state atoms for the compute pipeline and the 3D pipeline. That means we need to maintain two separate sets of dirty bits to determine which state atoms need to be run. But the dirty bits are not completely independent; for example, if BRW_NEW_SURFACES is flagged while doing 3D rendering, then not only do we need to re-run 3D state atoms that depend on BRW_NEW_SURFACES, but we also need to re-run compute state atoms that depend on BRW_NEW_SURFACES. But we'll also need to re-run those state atoms the next time the compute pipeline is run. To accomplish this, we record two sets of dirty bits, one for each pipeline. When bits are dirtied (via SET_DIRTY_BIT() or SET_DIRTY_ALL()) we set them to the dirty state in both pipelines. When brw_state_upload() is run, we clear the dirty bits just for the pipeline that was run. Note that since the number of pipelines is known at compile time to be 2, the compiler should unroll the loops in SET_DIRTY_BIT() and SET_DIRTY_ALL(). Reviewed-by: Jordan Justen <[email protected]>
* i965: Create a macro for checking a dirty bit.Paul Berry2014-09-012-1/+7
| | | | | | | This will make it easier to extend dirty bit handling to support compute shaders. Reviewed-by: Jordan Justen <[email protected]>
* i965: Create a macro for setting all dirty bits.Paul Berry2014-09-014-7/+18
| | | | | | | This will make it easier to extend dirty bit handling to support compute shaders. Reviewed-by: Jordan Justen <[email protected]>
* i965: Create a macro for setting a dirty bit.Paul Berry2014-09-0132-67/+74
| | | | | | | This will make it easier to extend dirty bit handling to support compute shaders. Reviewed-by: Jordan Justen <[email protected]>
* i965: add missing parens in vec4 visitorDave Airlie2014-09-021-1/+2
| | | | | | | | | coverity reported this, Matt said it look like missing parens, not bad identing, so lets try that. Cc: "10.2 10.3" <[email protected]> Reviewed-by: Chris Forbes <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* mesa: force height of 1D textures to be 1 in texture viewsIlia Mirkin2014-09-011-0/+3
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965/fs: Don't segfault when debug-logging a null programJason Ekstrand2014-09-011-2/+2
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/vec4: Don't segfault when debug-logging a null programJason Ekstrand2014-09-011-2/+2
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* glsl_to_tgsi: allocate and enlarge arrays for temporaries on demandMarek Olšák2014-09-011-18/+33
| | | | | | | | | | | This fixes crashes if the number of temporaries is greater than 4096. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66184 v2: added fail paths for realloc failures Cc: 10.2 10.3 [email protected] Reviewed-by: Ilia Mirkin <[email protected]>
* i965/fs: don't use ir->shadow_comparitor in emit_texture_*Connor Abbott2014-09-012-7/+5
| | | | | Signed-off-by: Connor Abbott <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: don't pass ir_variable * to emit_samplepos_setup()Connor Abbott2014-09-013-5/+4
| | | | | | | | We were only using it to get at its type, which we already know because it's a builtin variable. Signed-off-by: Connor Abbott <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: don't pass ir_variable * to emit_frontfacing_interpolation()Connor Abbott2014-09-014-6/+6
| | | | | | | | | | We were only using it to get at its type, which we already know because it's a builtin variable. v2 (Ken): Rebase on Matt's optimized gl_FrontFacing calculations. Signed-off-by: Connor Abbott <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Fix GPU hangs when INTEL_DEBUG=no16 is set.Kenneth Graunke2014-08-311-1/+2
| | | | | | | | The replicated data clear shader needs to be SIMD16, or else the GPU will hang. So, compile it even if INTEL_DEBUG=no16 is set. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* mesa: fix make tarballsEmil Velikov2014-09-011-1/+2
| | | | | | | | | | | | | Current method of generating distribution tar-balls involves manually invoking make + target name in the appropriate places. This temporary solution is used until we get 'make dist' working. Currently it does not work, as in order to have the target (which is also a filename) available in the final Makefile we need to add a PHONY target + use the correct target name. Cc: "10.2 10.3" <[email protected]> Signed-off-by: Emil Velikov <[email protected]>
* i965/vec4: Remove try_emit_saturateAbdiel Janulgue2014-08-312-22/+0
| | | | | | | | | Now that saturate is implemented natively as an instruction, we can cut down on unneeded functionality. Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Signed-off-by: Abdiel Janulgue <[email protected]>
* i965/fs: Refactor try_emit_saturateAbdiel Janulgue2014-08-311-15/+8
| | | | | | | | | | | | v3: Since the fs backend can emit saturate as a separate instruction, there is no need to detect for min/max instructions and to rewrite the instruction tree accordingly. On the other hand, we don't need to emit a separate saturated mov either when the expression generating src can do saturate directly. v4: Add can_do_saturate() check before enabling saturate modifer (Ken) Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Signed-off-by: Abdiel Janulgue <[email protected]>
* ir_to_mesa, glsl_to_tgsi: Remove try_emit_saturateAbdiel Janulgue2014-08-312-99/+0
| | | | | | | | | Now that saturate is implemented natively as instruction, we can cut down on unneeded functionality. Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Signed-off-by: Abdiel Janulgue <[email protected]>
* i965/vec4: Allow propagation of instructions with saturate flag to selAbdiel Janulgue2014-08-311-27/+58
| | | | | | | | | | | | | | | | | When sel conditon is bounded within 0 and 1.0. This allows code as: mov.sat a b sel.ge dst a 0.25F To be propagated as: sel.ge.sat dst b 0.25F v3: - Syntax clarifications in inst->saturate assignment - Remove extra parenthesis when assigning src_reg value from copy_entry (Matt Turner) v4: - Take channels into consideration when propagating saturated instructions. Reviewed-by: Matt Turner <[email protected]> Signed-off-by: Abdiel Janulgue <[email protected]>
* i965/fs: Allow propagation of instructions with saturate flag to selAbdiel Janulgue2014-08-311-1/+17
| | | | | | | | | | | | | | When sel conditon is bounded within 0 and 1.0. This allows code as: mov.sat a b sel.ge dst a 0.25F To be propagated as: sel.ge.sat dst b 0.25F v3: Syntax clarifications in inst->saturate assignment (Matt Turner) Reviewed-by: Matt Turner <[email protected]> Signed-off-by: Abdiel Janulgue <[email protected]>
* yi965/vec4: Add support for ir_unop_saturateAbdiel Janulgue2014-08-311-0/+4
| | | | | Reviewed-by: Matt Turner <[email protected]> Signed-off-by: Abdiel Janulgue <[email protected]>
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