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* mesa/st: Add support for GL_ARB_cull_distance (v2)Tobias Klausmann2016-05-142-0/+27
* glsl: Add arb_cull_distance support (v3)Tobias Klausmann2016-05-141-0/+4
* mesa/main: Add support for GL_ARB_cull_distance (v2)Tobias Klausmann2016-05-147-3/+24
* i965/gen9: Enable lossless compressionTopi Pohjolainen2016-05-121-3/+40
* i965: Set render state for lossless compressedTopi Pohjolainen2016-05-123-1/+16
* i965/wm: Don't sample lossless compressed as multisampledTopi Pohjolainen2016-05-121-1/+5
* i965/gen9: Setup MCS for compressed texture surfacesTopi Pohjolainen2016-05-121-4/+5
* i965/blorp: Do not resolve lossless compressed blit sourcesTopi Pohjolainen2016-05-121-1/+1
* i965/blorp: Prepare blits for lossless compressionTopi Pohjolainen2016-05-122-6/+22
* i965: Deferred allocation of mcs for lossless compressedTopi Pohjolainen2016-05-124-0/+66
* i965: Add flag telling if miptree is for client consumptionTopi Pohjolainen2016-05-122-3/+13
* i965: Add helper for lossless compression supportTopi Pohjolainen2016-05-122-0/+30
* i965/gen9: Prepare surface state setup for lossless compressionTopi Pohjolainen2016-05-123-1/+5
* i965/gen8: Expose auxiliary mode resolverTopi Pohjolainen2016-05-122-5/+6
* i965: Relax assertion of halign == 16 for lossless compressed auxTopi Pohjolainen2016-05-121-1/+6
* i965/blorp: Set full resolve for lossless compressedTopi Pohjolainen2016-05-122-2/+8
* i965/blorp: Do not skip fast color clear with new colorTopi Pohjolainen2016-05-123-4/+17
* i965: Enable scalar GS by default.Kenneth Graunke2016-05-121-1/+1
* i965: Reduce the SIMD8 GS push constant threshold from 32 to 24.Kenneth Graunke2016-05-121-2/+2
* i965: Delete bogus assertion in emit_gs_input_load().Kenneth Graunke2016-05-121-1/+0
* i965: Support instanced GS inputs in the scalar backend.Kenneth Graunke2016-05-122-6/+36
* i965: Use an early return for the push case in emit_gs_input_load().Kenneth Graunke2016-05-121-31/+34
* i965: Drop BRW_NEW_BLORP from stipple and line parameter packets.Kenneth Graunke2016-05-121-8/+4
* i965: Stop splitting fma() prior to optimizationJason Ekstrand2016-05-111-5/+0
* ptn: Emit mul+add for MADJason Ekstrand2016-05-111-1/+5
* mesa/st: split the type_size calculation into it's own fileRob Clark2016-05-114-61/+150
* nir/lower-io: add support for lowering inputsRob Clark2016-05-111-1/+3
* nir: rename lower_outputs_to_temporaries -> lower_io_to_temporariesRob Clark2016-05-111-1/+1
* nir: move callsite of lower_outputs_to_temporariesRob Clark2016-05-111-0/+1
* i965/blorp: Don't blend integer values during MSAA resolvesJason Ekstrand2016-05-101-11/+19
* meta/blit: Don't blend integer values during MSAA resolvesJason Ekstrand2016-05-101-2/+11
* i965/fs: Default all constants to a location of -1Jason Ekstrand2016-05-101-6/+4
* st/glsl_to_tgsi: attach image to correct instruction for samplesDave Airlie2016-05-111-2/+2
* mesa: move MESA_MAP_NOWAIT_BIT up away from GL_MAP_PERSISTENT_BITDave Airlie2016-05-111-1/+1
* mesa/meta: check for signed/unsigned int conversion for pbo getteximageDave Airlie2016-05-111-0/+3
* i965: Handle BRW_OPCODE_DO on Gen6+ in brw_instruction_name().Matt Turner2016-05-101-0/+6
* ir_to_mesa: Emit smarter ir_binop_logic_or for vertex programsIan Romanick2016-05-101-15/+11
* prog: Delete all remains of OPCODE_SNE, OPCODE_SEQ, OPCODE_SGT, and OPCODE_SLEIan Romanick2016-05-108-428/+0
* ir_to_mesa: Do not emit OPCODE_SEQ or OPCODE_SNEIan Romanick2016-05-101-9/+64
* ir_to_mesa: Do not emit OPCODE_SLE or OPCODE_SGTIan Romanick2016-05-101-2/+12
* st/mesa: use transfer_inline_write for memcpy TexSubImage pathMarek Olšák2016-05-101-4/+39
* i965/fs: fix MOV_INDIRECT exec_size for doublesSamuel Iglesias Gonsálvez2016-05-101-1/+9
* i965/fs: take into account doubles when calculating read_size for MOV_INDIRECTSamuel Iglesias Gonsálvez2016-05-101-2/+3
* i965/fs: demote_pull_constants() did not take into account double typesSamuel Iglesias Gonsálvez2016-05-101-1/+8
* i965/fs: push first double-based uniforms in push constant bufferSamuel Iglesias Gonsálvez2016-05-101-30/+82
* i965/fs: recognize writes with a subreg_offset > 0 as partialIago Toral Quiroga2016-05-101-1/+2
* i965/fs/lower_simd_width: Fix registers written for split instructionsIago Toral Quiroga2016-05-101-2/+2
* i965/fs: rename our lower_d2f pass to lower_d2xIago Toral Quiroga2016-05-104-4/+4
* i965/fs: implement i2d and u2dIago Toral Quiroga2016-05-101-0/+2
* i965/fs: implement d2i and d2uIago Toral Quiroga2016-05-102-1/+5
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