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* mesa: remove the gl_sl_pragmas structureJason Ekstrand2015-04-222-19/+0
| | | | | | | This code was added by Brian Paul in 2009 but, as far as Matt and I can tell, it's been dead ever since the new GLSL compiler was added. Reviewed-by: Brian Paul <[email protected]>
* i965: Add a brw_compiler structure and store the register sets in itJason Ekstrand2015-04-227-97/+120
| | | | Reviewed-by: Matt Turner <[email protected]>
* i965: Rename brw_compile to brw_codegenJason Ekstrand2015-04-2229-246/+246
| | | | | | | | | | | | This name better matches what it's actually used for. The patch was generated with the following command: for file in *; do sed -i -e s/brw_compile/brw_codegen/g $file done Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Use device_info instead of the context for computing vue mapsJason Ekstrand2015-04-224-7/+12
| | | | Reviewed-by: Matt Turner <[email protected]>
* i965: Use device_info instead of the context in instruction schedulingJason Ekstrand2015-04-223-14/+13
| | | | Reviewed-by: Matt Turner <[email protected]>
* i965: Add a devinfo field to backend_visitor and use it for gen checksJason Ekstrand2015-04-2219-221/+225
| | | | Reviewed-by: Matt Turner <[email protected]>
* i965: Remove remaining uses of ctx->Const.UniformBooleanTrue in visitorsJason Ekstrand2015-04-222-12/+6
| | | | | | | | | | Since commit 2881b123, we have used 0/~0 for representing booleans on all gens. However, we still had a bunch of places in the visitor code where we were still referring to ctx->Const.UniformBooleanTrue. Since this is always ~0, we can just remove them. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/vec4: Add a devinfo field to the generator and use it for gen checksJason Ekstrand2015-04-222-46/+42
| | | | Reviewed-by: Matt Turner <[email protected]>
* i965/fs: Add a devinfo field to the generator and use it for gen checksJason Ekstrand2015-04-222-59/+58
| | | | Reviewed-by: Matt Turner <[email protected]>
* i965/device_info: Add a supports_simd16_3src flagJason Ekstrand2015-04-226-55/+56
| | | | | | | | | | This also involves moving revision checking to screen creation time and passing that into brw_get_device_info so that we can get the right device_info for early versions of SKL. Since the only place we used revision was to check for SIMD16 3-src instruction support, it's safe to remove the revision field from brw_context. Reviewed-by: Matt Turner <[email protected]>
* i965/device_info: Add a HSW_FEATURES macroJason Ekstrand2015-04-221-3/+7
| | | | | | It's basically just a copy of GEN7_FEATURES only with is_haswell set Reviewed-by: Matt Turner <[email protected]>
* i965: Make the annotation code take a device_info instead of a contextJason Ekstrand2015-04-224-10/+14
| | | | Reviewed-by: Matt Turner <[email protected]>
* i965/fs: Remove the GL context from the generatorJason Ekstrand2015-04-222-11/+1
| | | | Reviewed-by: Matt Turner <[email protected]>
* i965: Remove the context field from brw_compilerJason Ekstrand2015-04-2215-63/+42
| | | | Reviewed-by: Matt Turner <[email protected]>
* i965: Make the disassembler take a device_info instead of a contextJason Ekstrand2015-04-2211-109/+99
| | | | Reviewed-by: Matt Turner <[email protected]>
* i965: Make instruction compaction take a device_info instead of a contextJason Ekstrand2015-04-224-109/+112
| | | | Reviewed-by: Matt Turner <[email protected]>
* i965: Make the brw_inst helpers take a device_info instead of a contextJason Ekstrand2015-04-2216-995/+1006
| | | | Reviewed-by: Matt Turner <[email protected]>
* i965/eu: Add a devinfo parameter to brw_compileJason Ekstrand2015-04-222-0/+2
| | | | Reviewed-by: Matt Turner <[email protected]>
* i965: Do better fake context setup in unit testsJason Ekstrand2015-04-225-5/+24
| | | | | | | In future tests, we will start relying on devinfo and not just brw in the compiler. Changing this now keeps these tests from failing in the future. Reviewed-by: Matt Turner <[email protected]>
* i965: Remove the context parameter from brw_texture_offsetJason Ekstrand2015-04-225-12/+5
| | | | | | | | It wasn't really being used anyway. We used it to assert that gpu_shader5 is supported in the back-end but that should be caught by the front-end. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* mesa: Fix typo in a commentAnuj Phogat2015-04-221-2/+2
| | | | | Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* mesa: add check for NV_texture_barrier in _mesa_TextureBarrierNV()Brian Paul2015-04-221-0/+6
| | | | | | | | | | | | If an app called glTextureBarrierNV() without checking if the extension was available, we'd crash with some gallium drivers in st_TextureBarrier() because the pipe_context::texture_barrier() pointer was NULL. Generate GL_INVALID_OPERATION instead. Reviewed-by: Ilia Mirkin <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* main: silence missing return value warning in array_index_of_resource()Brian Paul2015-04-221-0/+1
| | | | | | v2: return -1 instead of 0, per Emil Velikov. Reviewed-by: Anuj Phogat <[email protected]>
* android: xmlpool: cleanup the generation rulesEmil Velikov2015-04-221-3/+2
| | | | | | | | | - Do not attempt to create the save folder twice - both dir $@ and PRIVATE_LOCALEDIR point to the same place. - Use @ and $(hide), for mkdir and python, to avoid spamming the output. Signed-off-by: Emil Velikov <[email protected]>
* android: xmlpool: Get rid of the last use of intermediates-dir-forChih-Wei Huang2015-04-222-10/+7
| | | | | | | | | v2 [Emil Velikov] - Keep the PRIVATE_LOCALEDIR variable. - Do not use $(@D) but the more widespead $(dir $@) Signed-off-by: Chih-Wei Huang <[email protected]> Signed-off-by: Emil Velikov <[email protected]>
* android: export the path of the generated headersChih-Wei Huang2015-04-225-3/+4
| | | | | | | The modules need the headers can get the path automatically. Signed-off-by: Chih-Wei Huang <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* android: fix the building rules for Android 5.0Chih-Wei Huang2015-04-225-5/+11
| | | | | | | | | | | | | | | | | Android 5.0 allows modules to generate source into $OUT/gen, which will then be copied into $OUT/obj and $OUT/obj_$(TARGET_2ND_ARCH) as necessary. Modules will need to change calls to local-intermediates-dir into local-generated-sources-dir. The patch changes local-intermediates-dir into local-generated-sources-dir. If the Android version is less than 5.0, fallback to local-intermediates-dir. The patch also fixes the 64-bit building issue of Android 5.0. v2 [Emil Velikov] - Keep the LOCAL_UNSTRIPPED_PATH variable. Signed-off-by: Chih-Wei Huang <[email protected]>
* android: fix building issues of host binariesChih-Wei Huang2015-04-221-1/+0
| | | | | | | | Define _GNU_SOURCE to enable features (__USE_XOPEN2K and __USE_UNIX98) required to build the host binaries. Signed-off-by: Chih-Wei Huang <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* android: fix a building error of libmesa_programChih-Wei Huang2015-04-221-0/+1
| | | | | | | Add libmesa_glsl to LOCAL_STATIC_LIBRARIES to get its exported include path (for nir_opcodes.h). Signed-off-by: Chih-Wei Huang <[email protected]>
* android: mesa: fold the ARCH_X86_HAVE_SSE4_1 conditionalsEmil Velikov2015-04-221-5/+2
| | | | Signed-off-by: Emil Velikov <[email protected]>
* android: mesa: fix the path of the SSE4_1 optimisationsEmil Velikov2015-04-221-2/+2
| | | | | | | | | | | Commit dd6f641303c(mesa: Build with subdir-objects.) removed the SRCDIR variable, but forgot to update all references of it. v2: Fix path - must be relative to LOCAL_PATH. (Chih-Wei) Cc: "10.5" <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Chih-Wei Huang <[email protected]>
* android: build the Mesa IR -> NIR translatorEmil Velikov2015-04-221-1/+2
| | | | Signed-off-by: Emil Velikov <[email protected]>
* android: dri: link against libmesa_utilEmil Velikov2015-04-221-1/+2
| | | | | | | | The dri modules depend on symbols provided by it. Cc: "10.5" <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Chih-Wei Huang <[email protected]>
* android: add $(mesa_top)/src/mesa/main to the includes listEmil Velikov2015-04-222-3/+5
| | | | | | | | | Required by the format_{un,}pack rework. Otherwise the build will fail to locate the respective headers - format_{un,}pack.h Cc: "10.5" <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Chih-Wei Huang <[email protected]>
* android: add gallium dirs to more places in the treeEmil Velikov2015-04-224-3/+12
| | | | | | | | Similar to e8c5cbfd921(mesa: Add gallium include dirs to more parts of the tree.) Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Chih-Wei Huang <[email protected]>
* android: dri/common: conditionally include drm_cflags/set __NOT_HAVE_DRM_HEmil Velikov2015-04-221-0/+14
| | | | | | | Otherwise we'll fail to find the drm.h header. Cc: "10.4 10.5" <[email protected]> Signed-off-by: Emil Velikov <[email protected]>
* android: mesa: generate the format_{un,}pack.[ch] sourcesMauro Rossi2015-04-221-0/+21
| | | | | | | | | | Missed out with commit e1fdcddafe9(mesa: Autogenerate format_unpack.c) v2: Conditionaly print the python commands - s/@/$(hide) / (Chih-Wei) Cc: "10.5" <[email protected]> [Emil Velikov: Split our from a larger commit.] Signed-off-by: Emil Velikov <[email protected]>
* android: add $(mesa_top)/src include to the whole of mesaEmil Velikov2015-04-225-6/+0
| | | | | | | | | Many parts of mesa already have the include with others depending on it but it's missing. Add it once at the top makefile and be done with it. Cc: "10.4 10.5" <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Chih-Wei Huang <[email protected]>
* android: use LOCAL_SHARED_LIBRARIES over TARGET_OUT_HEADERSEmil Velikov2015-04-221-1/+0
| | | | | | | | | ... to manage the LIBDRM*_CFLAGS. The former is the recommended approach by the Android build system developers while the latter has been depreciated for quite some time. Cc: "10.4 10.5" <[email protected]> Signed-off-by: Emil Velikov <[email protected]>
* drirc: Add "Second Life" quirk (allow_glsl_extension_directive_midshader).Kenneth Graunke2015-04-211-0/+4
| | | | | | | | | | | | Appears to fix shader compilation. Tested by starting the client, dragging the "quality and speed" slider back and forth, and watching the console output - instead of piles of "shader failed to compile", the CPU seems to be busy compiling shaders. I haven't actually tried to play. Signed-off-by: Kenneth Graunke <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=69226 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=71591 Cc: [email protected]
* nir: Fix per-component negation in prog_to_nir's SWZ handling.Kenneth Graunke2015-04-211-7/+18
| | | | | | | | | | I missed the fact that the ARB_fragment_program SWZ instruction allows per-component negation. To fix this, move Abs/Negate handling into both the simple case and the SWZ case's per-component loop. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90000 Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/fs: Combine pixel center calculation into one inst.Matt Turner2015-04-213-20/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | The X and Y values come interleaved in g1 (.4-.11 inclusive), so we can calculate them together with a single add(32) instruction on some platforms like Broadwell and newer or in SIMD8 elsewhere. Note that I also moved the PIXEL_X/PIXEL_Y virtual opcodes from before LINTERP to after it. That's because the writes_accumulator_implicitly() function in backend_instruction tests for <= LINTERP for determining whether the instruction indeed writes the accumulator implicitly. The old FS_OPCODE_PIXEL_X/Y emitted ADD instructions, which did, but the new opcodes just emit MOVs, which don't. It doesn't matter, since we don't use these opcodes on Gen4/5 anymore, but in the case that we do... On Broadwell: total instructions in shared programs: 7192355 -> 7186224 (-0.09%) instructions in affected programs: 1190700 -> 1184569 (-0.51%) helped: 6131 On Haswell: total instructions in shared programs: 6155979 -> 6152800 (-0.05%) instructions in affected programs: 652362 -> 649183 (-0.49%) helped: 3179 Reviewed-by: Jason Ekstrand <[email protected]>
* i965/fs: Calculate delta_x and delta_y together.Matt Turner2015-04-217-74/+79
| | | | | | | | | | | | | This lets SIMD16 programs on G45 and Gen5 use the PLN instruction. On Ironlake: total instructions in shared programs: 5634757 -> 5518055 (-2.07%) instructions in affected programs: 1745837 -> 1629135 (-6.68%) helped: 11439 HURT: 4 Reviewed-by: Jason Ekstrand <[email protected]>
* i965/fs: Emit ADDs for gl_FragCoord, not virtual opcodes.Matt Turner2015-04-215-51/+8
| | | | | | | | | | These were used only on Gen4 and 5. emit_interpolation_setup_gen6() emits ADDs directly. The virtual opcodes weren't providing anything useful. I'm going to repurpose these opcodes, so deleting and readding them makes it simpler to see what's going on. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/fs: Manually set source regioning on PLN instructions.Matt Turner2015-04-211-1/+13
| | | | | | | | Like LINE (commit 92346db0), src0 must have a scalar region. Setting src1's region to <8,8,1> lets us pass a properly sized combined delta_xy argument in a few commits without getting a bogus <16,16,1> region. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/fs: Add LINTERP's src0 to fs_inst::regs_read().Matt Turner2015-04-211-11/+2
| | | | | | | | | | LINTERP's src0 is PLN's src1, and PLN's src1 reads exec_size / 4 registers. Having that information lets us drop the delta_x/y special case code in split_virtual_grfs(). Reviewed-by: Jason Ekstrand <[email protected]>
* i965/fs: Set compression only if writing two registers.Matt Turner2015-04-211-1/+4
| | | | | | | We don't want to set compression control on a SIMD16 instruction operating on words or smaller. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/fs: Allow an execution size of 32.Matt Turner2015-04-212-1/+2
| | | | | | | In a few commits, we'll start emitting an add(32) instruction on some platforms. Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Make type_sz() return unsigned.Matt Turner2015-04-211-1/+1
| | | | | | Avoids annoying warnings when comparing with sizeof(...). Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Replace guess_execution_size with something simpler.Matt Turner2015-04-214-27/+35
| | | | | | | | | | | | | | | | | | | | | | | guess_execution_size() does two things: 1. Cope with small destination registers. 2. Cope with SIMD8 vs SIMD16 mode. This patch replaces the first with a simple if block in brw_set_dest: if the destination register width is less than 8, you probably want the execution size to match. (I didn't put this in the 3src block because it doesn't seem to matter.) Since only the FS compiler cares about SIMD16 mode, it's easy to just set the default execution size there. This pattern was already been proven in the Gen8+ generator, but we didn't port it back to the existing generator when we combined the two. This is based on a patch from Ken from about a year ago. I've rebased it and and fixed a few bugs. Reviewed-by: Jason Ekstrand <[email protected]>
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