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* i965/generator: Get rid of the ! in the unreachable statementJason Ekstrand2015-04-021-1/+1
| | | | Reviewed-by: Mark Janes <[email protected]>
* i965/fs: Relax type check in cmod propagation.Matt Turner2015-04-011-1/+3
| | | | | | | | | | | The thing we want to avoid is int/float comparisons, but int/unsigned comparisons with 0 are equivalent. total instructions in shared programs: 6194829 -> 6193996 (-0.01%) instructions in affected programs: 117192 -> 116359 (-0.71%) helped: 471 Reviewed-by: Jason Ekstrand <[email protected]>
* nir: Use _mesa_flsll(InputsRead) in prog->nir.Kenneth Graunke2015-04-011-2/+2
| | | | | | | | | | | | | | | | InputsRead is a 64-bit bitfield. Using _mesa_fls would silently truncate off the high bits, claiming inputs 32..56 (VARYING_SLOT_MAX) were never read. Using <= here was a hack I threw in at the last minute to fix programs which happened to use input slot 32. Switch back to using < now that the underlying problem is fixed. Fixes crashes in "Euro Truck Simulator 2" when using prog->nir, which uses input slot 33. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* mesa: Implement _mesa_flsll().Kenneth Graunke2015-04-011-0/+24
| | | | | | | This is _mesa_fls() for 64-bit values. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* nir: In prog->nir, don't wrap dot products with ptn_channel(..., X).Kenneth Graunke2015-04-011-4/+4
| | | | | | | | ptn_move_dest and nir_fadd already take care of replicating the last channel out, so we can just use a scalar and skip splatting it. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Use the same nir options for all gensJason Ekstrand2015-04-011-10/+2
| | | | | | | If we tell NIR to split ffma's, then we don't need seperate options anymore. Reviewed-by: Matt Turner <[email protected]>
* i965/nir: Run DCE again before going out of SSAJason Ekstrand2015-04-011-0/+2
| | | | | | | We run lowering and optimization passes that might leave garbage lying around. This keeps the FS cse from having to clean it up. Reviewed-by: Matt Turner <[email protected]>
* i965/nir: Run the ffma peephole after the rest of the optimizationsJason Ekstrand2015-04-012-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The idea here is that fusing multiply-add combinations too early can reduce our ability to perform CSE and value-numbering. Instead, we split ffma opcodes up-front, hope CSE cleans up, and then fuse after-the-fact. Unless an algebraic pass does something silly where it inserts something between the multiply and the add, splitting and re-fusing should never cause a problem. We run the late algebraic optimizations after this so that things like compare-with-zero don't hurt our ability to fuse things. shader-db results for fragment shaders on Haswell: total instructions in shared programs: 4390538 -> 4379236 (-0.26%) instructions in affected programs: 989359 -> 978057 (-1.14%) helped: 5308 HURT: 97 GAINED: 78 LOST: 5 This does, unfortunately, cause some substantial hurt to a shader in Kerbal Space Program. However, the damage is caused by changing a single instruction from a ffma to an add. This, in turn, *decreases* register pressure in one part of the program causing it to fail to register allocate and spill. Given the overwhelmingly positive results in other shaders and the fact that the NIR for the Kerbal shaders is actually better, this should be considered a positive. Reviewed-by: Matt Turner <[email protected]>
* nir: Add a dedicated ffma peephole optimizationJason Ekstrand2015-04-011-0/+2
| | | | | | | | | | | | | i965/nir: Use the dedicated ffma peephole total instructions in shared programs: 4418748 -> 4394618 (-0.55%) instructions in affected programs: 1292790 -> 1268660 (-1.87%) helped: 5999 HURT: 457 GAINED: 4 LOST: 9 Reviewed-by: Matt Turner <[email protected]>
* nir/algebraic: Add a seperate section for "late" optimizationsJason Ekstrand2015-04-011-0/+3
| | | | | | i965/nir: Use the late optimizations Reviewed-by: Matt Turner <[email protected]>
* configure: nuke --with-max-{width,height}Emil Velikov2015-04-011-1/+1
| | | | | | | | | | Unused as of commit 630ab0d27ba(mesa: remove last of MAX_WIDTH, MAX_HEIGHT). Update all the remaining references to the defines. v2: Use the correct variable name in the comments Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* main: create_buffers unlocks mutex when throwing OUT_OF_MEMORY.Laura Ekstrand2015-04-011-0/+1
| | | | | | Ilia Mirkin found that I had forgotten to free the mutex in the error case. Reviewed-by: Ilia Mirkin <[email protected]>
* mesa: don't include colormac.h in format codeBrian Paul2015-04-013-2/+2
| | | | | Acked-by: Matt Turner <[email protected]> Reviewed-by: Mark Janes <[email protected]>
* mesa: remove unneeded #include of colormac.hBrian Paul2015-04-0113-13/+5
| | | | | Acked-by: Matt Turner <[email protected]> Reviewed-by: Mark Janes <[email protected]>
* tnl: remove unneeded #include of colormac.hBrian Paul2015-04-0111-11/+1
| | | | | Acked-by: Matt Turner <[email protected]> Reviewed-by: Mark Janes <[email protected]>
* swrast: remove unneeded #include of colormac.hBrian Paul2015-04-0119-19/+4
| | | | | Acked-by: Matt Turner <[email protected]> Reviewed-by: Mark Janes <[email protected]>
* mesa: remove unused macros from colormac.hBrian Paul2015-04-011-45/+0
| | | | | Acked-by: Matt Turner <[email protected]> Reviewed-by: Mark Janes <[email protected]>
* mesa: Make a shared header for 3D pipeline enum / #defines.Eric Anholt2015-04-011-141/+1
| | | | | | | | | | | | | | | | | | NIR uses these enums/#defines in nir_variables and associated intrinsics, but I want to be able to use them from TGSI->NIR and NIR->TGSI. Otherwise, we had to pull in all of mtypes.h. This doesn't cover all of the enums we might want from a shared compiler core (like varying slots or vert attribs), but it at least covers what I need at the moment (system values and interp qualifiers). v2: Move to src/glsl since util/ is really vague. Include in Makefile.am list. Use plain bitshifts and stdint types instead of undefined BITFIELD64_BIT. v3: Rename to shader_enums.h. Move it into Makefile.sources. Reviewed-by: Kenneth Graunke <[email protected]> (v2, with recommendation to rename)
* xmlpool: remove the clean targetEmil Velikov2015-04-011-6/+4
| | | | | | | | ... by folding it into CLEANFILES. Don't worry about $(LANG) as it is essentially the first folder of $(POS). With the latter already handled. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* xmlpool: don't forget to ship the MOSEmil Velikov2015-04-011-1/+8
| | | | | | | | | | | | This will allow us to finally remove python from the build time dependencies list. Considering that you're building from a release tarball of course :-) Cc: Bernd Kuhls <[email protected]> Reported-by: Bernd Kuhls <[email protected]> Cc: "10.5" <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* osmesa: don't try to bundle osmesa.def SConscriptEmil Velikov2015-04-011-2/+0
| | | | | | | | Both of which were removed with commit 69db422218b(scons: Don't build osmesa.) Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Jose Fonseca <[email protected]>
* i965: Handle scratch accesses where reladdr also points to scratch spaceIago Toral Quiroga2015-04-012-26/+76
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a problem when we have IR like this: (array_ref (var_ref temps) (swiz x (expression ivec4 bitcast_f2i (swiz xxxx (array_ref (var_ref temps) (constant int (2)) ) )) )) ) ) where we are indexing an array with the result of an expression that accesses the same array. In this scenario, temps will be moved to scratch space and we will need to add scratch reads/writes for all accesses to temps, however, the current implementation does not consider the case where a reladdr pointer (obtained by indexing into temps trough a expression) points to a register that is also stored in scratch space (as in this case, where the expression used to index temps access temps[2]), and thus, requires a scratch read before it is accessed. v2 (Francisco Jerez): - Handle also recursive reladdr addressing. - Do not memcpy dst_reg into src_reg when rewriting reladdr. v3 (Francisco Jerez): - Reduce complexity by moving recursive reladdr scratch access handling to a separate recursive function. - Do not skip demoting reladdr index registers to scratch space if the top level GRF has already been visited. v4 (Francisco Jerez) - Remove redundant checks. - Simplify code by making emit_resolve_reladdr return a register with the original src data except for reg, reg_offset and reladdr. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89508 Reviewed-by: Francisco Jerez <[email protected]>
* mesa/fbo: lock ctx->Shared->Mutex when allocating renderbuffersMartin Peres2015-04-011-0/+2
| | | | | | | | | | | | | | | | This mutex is used to make sure the shared context does not change while some shared code is looking into it. Calling BindRenderbufferEXT BindRenderbuffer with a gles context would not take the mutex before allocating an entry. Commit a34669b then moved out the allocation out of bind_renderbuffer into allocate_renderbuffer before using it for the CreateRenderBuffer entry point. This thus also made this entry point unsafe. The issue has been hinted by Ilia Mirkin. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Martin Peres <[email protected]>
* mesa/fbo: do not assign a value that is never read later onMartin Peres2015-04-011-6/+3
| | | | | | | | | | | | | The issue has been detected by coverty. v2: - move the declaration of obj to the else clause (Brian Paul) v3: Review by Brian Paul - get rid of the obj declaration in favor of a direct reference Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Martin Peres <[email protected]>
* egl: add initial EGL_MESA_image_dma_buf_export v2.4Dave Airlie2015-04-011-2/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | At the moment to get an EGL image to a dma-buf file descriptor, you have to use EGL_MESA_drm_image, and then use libdrm to convert this to a file descriptor. This extension just provides an API modelled on EGL_MESA_drm_image, to return a dma-buf file descriptor. v2: update spec for new API proposal add internal queries to get the fourcc back from intel driver. v2.1: add gallium pieces. v2.2: add offsets to spec and API, rename fd->fds, stride->strides in API. rewrite spec a bit more, add some q/a v2.3: add modifiers to query interface and 64-bit type for that (Daniel Stone) specifiy what happens to num fds vs num planes differences. (Chad Versace) v2.4: fix grammar (Daniel Stone) Signed-off-by: Dave Airlie <[email protected]>
* i965/state: Remove brw->state.dirtyJordan Justen2015-03-312-7/+0
| | | | | | | | | We now use brw->NewGLState and brw->ctx.NewDriverState instead. Suggested-by: Kenneth Graunke <[email protected]> Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/state: Don't use brw->state.dirty.mesaJordan Justen2015-03-315-12/+11
| | | | | | | | | | | | | | | Now, we only use brw->NewGLState. I used this bash & sed command in the i965 directory: for file in *.[ch] *.[ch]pp; do sed -i -e 's/brw->state\.dirty\.mesa/brw->NewGLState/g' $file done Followed by manual changes to brw_state_upload.c. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/state: Don't use brw->state.dirty.brwJordan Justen2015-03-3133-83/+82
| | | | | | | | | | | | | | | Now, we only use ctx->NewDriverState. I used this bash & sed command in the i965 directory: for file in *.[ch] *.[ch]pp; do sed -i -e 's/state\.dirty\.brw/ctx.NewDriverState/g' $file done Followed by manual changes to brw_state_upload.c. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/state: Add compute pipeline with empty atom listsJordan Justen2015-03-313-1/+37
| | | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/state: Only upload render programs for render state uploadsJordan Justen2015-03-311-20/+25
| | | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/state: Create separate dirty state bits for each pipelineJordan Justen2015-03-312-27/+75
| | | | | | | | | | | | | | | | | | When clearing the state for a pipeline, we will save changed state for the other pipelines. v3: * Adjust brw_upload_pipeline_state * Don't pull pipeline state bits into common state bits * Don't clear pipeline state bits * Adjust 'clear' phase * brw_clear_dirty_bits is now brw_render_state_finished * Move cross-pipeline state flagging to brw_pipeline_state_finished * Move pipeline clears to brw_pipeline_state_finished Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/state: Support multiple pipelines in brw->num_atomsJordan Justen2015-03-312-39/+65
| | | | | | | | | | | | | | | | | brw->num_atoms is converted to an array, but currently just an array of length 1. Adds brw_copy_pipeline_atoms which copies the atoms for a pipeline, and sets brw->num_atoms[p] for pipeline p. v2: * Rename brw->atoms[] to render_atoms * Rename brw_add_pipeline_atoms to brw_copy_pipeline_atoms * Rename brw_pipeline_first_atom to brw_get_pipeline_atoms Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/state: Rename brw_clear_dirty_bits to brw_render_state_finishedJordan Justen2015-03-313-3/+3
| | | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/state: Rename brw_upload_state to brw_upload_render_stateJordan Justen2015-03-313-10/+11
| | | | | | Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Allow CSE to handle MULs with negated arguments.Matt Turner2015-03-311-5/+37
| | | | | | | | | | | | | | | | | | | | | mul x, -y is equivalent to mul -x, y; and mul x, y is the negation of mul x, -y. With NIR: total instructions in shared programs: 6167779 -> 6161193 (-0.11%) instructions in affected programs: 983511 -> 976925 (-0.67%) helped: 4106 HURT: 16 GAINED: 18 LOST: 7 Without NIR: total instructions in shared programs: 6192323 -> 6185299 (-0.11%) instructions in affected programs: 987875 -> 980851 (-0.71%) helped: 4146 HURT: 16 GAINED: 16 LOST: 0
* i965: Mark brw_inst_bits' brw_inst* parameter const.Matt Turner2015-03-311-12/+12
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965/skl: Avoid using the 1D stencil layout for stencil-only imagesNeil Roberts2015-03-311-1/+2
| | | | | | | | | | | | | Commit cf67ca9ffa9 made the layouting code pick a special layout for 1D images on Skylake. This should not be used for depth and stencil buffers because these need to be treated as 2D tiled images. However the patch was missing a check for images with a base format of GL_STENCIL_INDEX. In practice I don't think it's currently possible to hit this because Mesa doesn't support GL_ARB_texture_stencil8 and it's not possible to create a 1D renderbuffer, but it'll be good to be ready for when the extension is supported. Reviewed-by: Anuj Phogat <[email protected]>
* glsl: allow ForceGLSLVersion to override #version directivesBrian Paul2015-03-301-2/+2
| | | | | | | | | | | | Previously, the ctx->Const.ForceGLSLVersion setting only worked if the shader lacked a #version directive. Now, the ForceGLSLVersion setting will override the #version directive too. This change should be safe since it should be rare to have an app that has a mix of shader versions and we only wanted to override the #version for shaders which lacked the #version directive. Reviewed-by: Ilia Mirkin <[email protected]>
* i965/nir: Use NIR for ARB_vertex_program support on Gen8+.Kenneth Graunke2015-03-271-4/+10
| | | | | | | | | | | Everything is already in place; we simply have to take the scalar code generation path. This gives us SIMD8 VS programs, instead of SIMD4x2. v2: Rebase on the patch that drops brw->gen >= 8. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Connor Abbott <[email protected]>
* i965: Move env_var_as_boolean to intel_debug.c.Kenneth Graunke2015-03-273-22/+29
| | | | | | | I need to use this in brw_vec4.cpp, so it can't be static anymore. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/fs: Add ARB_fragment_program support to the NIR backend.Kenneth Graunke2015-03-272-26/+51
| | | | | | | | | | | | | | | | | | | | | Use prog_to_nir where we would normally call glsl_to_nir, handle program parameter lists, and skip a few things that don't exist. Using NIR generates much better shader code than Mesa IR, since we get real optimizations, as opposed to prog_optimize: total instructions in shared programs: 314007 -> 279892 (-10.86%) instructions in affected programs: 285173 -> 251058 (-11.96%) helped: 2001 HURT: 67 GAINED: 4 LOST: 7 v2: Change early return in nir_setup_uniforms to if/else (Jordan). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Connor Abbott <[email protected]>
* nir: Implement a Mesa IR -> NIR translator.Kenneth Graunke2015-03-275-0/+1143
| | | | | | | | | | | | | | | | | | | Shamelessly ripped off from Eric Anholt's tgsi_to_nir pass. This is not built on SCons, like the rest of NIR. v2: - Delete redundant c->s, c->impl, and c->cf_node_list pointers (Ken) - Use nir_builder directly instead of ptn_compile in more places (Ken) - Drop 'struct' keyword in front of nir_builder (ken) - Add a file level Doxygen comment (Ken) - Use scalar constants instead of splatting (Eric) - Use nir_builder helpers for constants, moves, and swizzles (Connor) v3: Minor indentation improvements. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965/skl: Don't use the PMA depth stall workaroundBen Widawsky2015-03-271-1/+6
| | | | | | | | | | | | | | The PMA depth stall must be enabled (optimization turned off) under certain circumstances on gen8. This was supposedly fixed for Gen9, which means we do not need to check, or toggle the state. The hardware is supposed to enable the hardware optimization by default, unlike BDW, so we also don't need to set it at init. For whatever reason this improves stability on ETQW with the bug mentioned below. References: https://bugs.freedesktop.org/show_bug.cgi?id=89039 (doesn't fix) Signed-off-by: Ben Widawsky <[email protected]> Tested-by: Anuj Phogat <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/skl: Disable partial resolve in VCBen Widawsky2015-03-272-0/+11
| | | | | | | | | | | | | | | | | | | | | Recomendation [sic] is to set this field to 1 always. Programming it to default value of 0, may have -ve impact on performance for MSAA WLs. Another don't suck bit which needs to get set. The patch wasn't as well tested as I would have liked, primarily I don't have perf numbers for it, but it's getting to a point where it is in danger of being lost. v2: v1 was a mix of two patches. Since 0x7004 is masked, we only need to set it once at initialization and make sure the pma workaround doesn't set the mask bit (which it doesn't). Move LRI to init gpu state (Ken) Add a comment. Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
* st/mesa: initialize have_fma in constructorIlia Mirkin2015-03-261-0/+1
| | | | | | | Spotted by Coverity. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* st/mesa: update arrays when the current attrib has been updatedIlia Mirkin2015-03-261-1/+1
| | | | | | | | | | | Fixes the recently-sent gl-2.0-vertex-const-attr piglit test. Makes sure to revalidate arrays when only the current attribute has been updated via glVertexAttrib*. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89754 Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Cc: "10.4 10.5" <[email protected]>
* st_glsl_to_tgsi: only do mov copy propagation on temps (v2)Dave Airlie2015-03-261-0/+1
| | | | | | | | | | | | Don't propagate ARRAYs This should fix: https://bugs.freedesktop.org/show_bug.cgi?id=89759 v2: just specify arrays so we get input propagation Signed-off-by: Dave Airlie <[email protected]> Cc: [email protected] Reviewed-by: Ilia Mirkin <[email protected]>
* i965: Drop unnecessary brw->gen >= 8 check from scalar VS code.Kenneth Graunke2015-03-251-1/+1
| | | | | | | brw->scalar_vs already implies that brw->gen >= 8. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965/fs: Implement texture projection support.Kenneth Graunke2015-03-251-1/+10
| | | | | | | | | | | | | Our fragment program backend implements support for TXP directly, and there's no NIR lowering pass to remove the projection. When we switch fragment program support over to NIR, we need to support it somehow. It's easy enough to support directly. v2: Split out offset/tex_offset rename (requested by Jordan). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* i965/fs: Rename offset to tex_offset to avoid shadowing offset().Kenneth Graunke2015-03-251-4/+4
| | | | | | | | | | fs_visitor::nir_emit_texture() created an fs_reg variable called offset, which shadowed the offset() helper function in brw_ir_fs.h. Rename the variable to tex_offset so we can still call offset(). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
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