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Commit message (
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Author
Age
Files
Lines
*
r600: fix texcoords from constants
Andre Maasikas
2009-09-11
1
-40
/
+52
*
Revert "r600: support tex coords from constants"
Alex Deucher
2009-09-11
1
-17
/
+45
*
r600: support tex coords from constants
Alex Deucher
2009-09-11
1
-45
/
+17
*
r600: enable caching of vertex programs
Andre Maasikas
2009-09-11
6
-62
/
+110
*
i965: Enable loops in the VS.
Eric Anholt
2009-09-10
1
-15
/
+38
*
mesa: nicer vertex setup
Brian Paul
2009-09-10
1
-128
/
+138
*
st/mesa: use st_context() helper
Brian Paul
2009-09-10
1
-17
/
+17
*
Merge branch 'mesa_7_6_branch'
Brian Paul
2009-09-10
6
-52
/
+108
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\
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*
intel: disable intel_stencil_drawpixels() for now
Brian Paul
2009-09-10
1
-0
/
+16
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*
Fix merge fail
Ian Romanick
2009-09-10
1
-13
/
+0
|
*
mesa: need to set all stencil bits to 0 before setting the 1 bits
Brian Paul
2009-09-10
1
-0
/
+9
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*
Merge branch 'mesa_7_5_branch' into mesa_7_6_branch
Ian Romanick
2009-09-10
2
-1
/
+6
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\
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*
intel: add B43 chipset support
Zhenyu Wang
2009-09-10
2
-1
/
+6
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*
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i965: Fix relocation delta for WM surfaces.
Eric Anholt
2009-09-10
1
-1
/
+1
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*
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mesa: in texenvprogram code, only do saturation when really needed.
Brian Paul
2009-09-10
1
-8
/
+53
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*
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radeon: Change debugging code to use macros instead of inline functions.
Pauli Nieminen
2009-09-10
2
-43
/
+27
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*
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radeon: Add more verbose error message for failed command buffer.
Pauli Nieminen
2009-09-09
1
-1
/
+3
*
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intel: Don't forget to map the depth read buffer in spans.
Eric Anholt
2009-09-10
1
-22
/
+28
*
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r300: enable rb3d_discard_src_pixel_lte_threshold for more chips on dri2
Alex Deucher
2009-09-10
1
-5
/
+1
*
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r300: add full support for two sided stencil on r5xx for dri2
Alex Deucher
2009-09-10
4
-4
/
+46
*
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mesa: fix cut&paste typos
Mathias Frohlich
2009-09-10
1
-4
/
+4
*
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i965: Fix relocation delta for WM surfaces.
Eric Anholt
2009-09-09
1
-1
/
+1
*
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i965: fix an overlooked merge conflict
Brian Paul
2009-09-09
1
-13
/
+0
*
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r600: check if textures are actually enabled before submission
Alex Deucher
2009-09-09
2
-56
/
+64
*
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Merge branch 'mesa_7_6_branch'
Brian Paul
2009-09-09
6
-2
/
+28
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\
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*
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Merge branch 'mesa_7_5_branch' into mesa_7_6_branch
Brian Paul
2009-09-09
5
-1
/
+24
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\
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*
mesa: bump version to 7.5.2
Brian Paul
2009-09-08
1
-3
/
+3
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*
i965: fix incorrect test for vertex position attribute
Brian Paul
2009-09-08
3
-1
/
+4
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*
i965: Fix warnings in intel_pixel_read.c.
Eric Anholt
2009-09-04
1
-0
/
+4
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*
intel: Also get the DRI2 front buffer when doing front buffer reading.
Eric Anholt
2009-09-04
4
-1
/
+29
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*
intel: Update Mesa state before span setup in glReadPixels.
Eric Anholt
2009-09-04
3
-3
/
+13
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*
intel: Move intel_pixel_read.c to shared for use with i965.
Eric Anholt
2009-09-04
2
-306
/
+307
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*
i965: Add missing state dependency of sf_unit on _NEW_BUFFERS.
Eric Anholt
2009-09-04
1
-2
/
+4
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*
intel: Align cubemap texture height to its padding requirements.
Eric Anholt
2009-09-04
1
-0
/
+10
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*
intel: Align untiled region height to 2 according to 965 docs.
Eric Anholt
2009-09-04
1
-0
/
+7
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*
i965: Fix source depth reg setting for FSes reading and writing to depth.
Eric Anholt
2009-09-04
3
-1
/
+5
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*
i965: Respect CondSwizzle in OPCODE_IF.
Eric Anholt
2009-09-04
1
-1
/
+21
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*
i965: asst clean-ups, etc in brw_vs_emit()
Brian Paul
2009-09-04
1
-11
/
+10
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*
i965: Emit conditional code updates as required for GLSL VS if statements.
Eric Anholt
2009-09-04
1
-0
/
+13
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*
i965: Spell "conditional" correctly.
Eric Anholt
2009-09-04
3
-15
/
+15
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*
i965: Fix RECT shadow sampling by not losing the other texcoords.
Eric Anholt
2009-09-04
1
-1
/
+5
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*
i965: Assert that the offset in the VBO is below the VBO size.
Eric Anholt
2009-09-04
1
-0
/
+14
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*
i965: Even if no VS inputs are set, still load some amount of URB as required.
Eric Anholt
2009-09-04
1
-0
/
+11
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*
i965: Make sure the VS URB size is big enough to fit a VF VUE.
Eric Anholt
2009-09-04
1
-1
/
+8
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*
i965: Don't emit bad packets when no VBs are referenced.
Eric Anholt
2009-09-04
1
-0
/
+22
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*
i965: Calculate enabled[] and nr_enabled once and re-use the values.
Eric Anholt
2009-09-04
2
-29
/
+18
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*
i965: Set the max index buffer address correctly according to the docs.
Eric Anholt
2009-09-04
1
-1
/
+1
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*
i965: rename var: s/tmp/vs_inputs/
Brian Paul
2009-09-04
1
-8
/
+8
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*
st/mesa: silence uninitialized var warnings
Brian Paul
2009-09-03
1
-2
/
+2
|
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*
st/mesa: fix glCopyPixels(GL_STENCIL_INDEX) inverted position
Brian Paul
2009-09-03
1
-0
/
+4
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