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* r300: Cleaned up the default vertex program code with longer lines.Oliver McFadden2008-03-261-28/+4
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* r300: Removed the last of the duplicate vertex program macros.Oliver McFadden2008-03-262-51/+8
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* r300: Added Copyright lines to the vertex program code.Oliver McFadden2008-03-261-14/+3
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* r300: Renamed the Mesa opcode translation functions.Oliver McFadden2008-03-261-54/+54
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* r300: Renamed the destination-and-opcode/source macros to more appropriate ↵Oliver McFadden2008-03-263-104/+104
| | | | names.
* r300: Merged the constant zero/one source macros.Oliver McFadden2008-03-241-72/+55
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* r300: Merged the Vector and Math Engine opcode macros.Oliver McFadden2008-03-243-153/+225
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* r300: Corrected a bug with the SUB instruction.Oliver McFadden2008-03-021-0/+16
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* r300: Corrected a bug with the MAD instruction.Oliver McFadden2008-03-022-4/+12
| | | | | The PVS_VECTOR_OPCODE macro should be modified to support macro instructions, too.
* r300: Added the PVS_SRC_OPERAND documentation from AMD.Oliver McFadden2008-03-012-38/+56
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* r300: Added the PVS_OP_DST_OPERAND documentation from AMD.Oliver McFadden2008-03-012-22/+56
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* r300: Added a TODO comment for registers missing from AMD's documentation.Oliver McFadden2008-03-011-0/+2
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* r300: Moved the vertex program shift/mask defines into the appropriate file.Oliver McFadden2008-03-012-27/+23
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* r300: Indented the vertex program code with longer lines.Oliver McFadden2008-03-011-462/+304
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* r300: Moved the PREFER_DP4 define near the position invariant function.Oliver McFadden2008-03-011-3/+3
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* r300: Added a TODO comment for the MAD opcodes.Oliver McFadden2008-03-011-0/+4
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* r300: Use the VE_ADD hardware opcode for the SUB opcode.Oliver McFadden2008-03-011-19/+1
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* r300: Use the VE_MULTIPLY hardware opcode for the MUL opcode.Oliver McFadden2008-03-011-1/+1
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* r300: Cleaned up the XPD opcode temporary register usage.Oliver McFadden2008-03-011-2/+3
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* r300: Cleaned up extra white space.Oliver McFadden2008-03-011-33/+0
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* r300: Prefer to use the VE_ADD for simple MOV style opcodes.Oliver McFadden2008-03-011-30/+0
| | | | | The VE_MULTIPLY_ADD has further restrictions on reading temporary memory which may complicate things. See AMD's documentation.
* r300: Removed the (undocumented) MAD_2 opcode.Oliver McFadden2008-03-012-64/+6
| | | | | | This opcode is likely a mistake from reverse engineering. MAD_2 isn't included in AMD's documentation, and my testing reviles there is no problem using the documented MAD opcode.
* r300: Cleaned up the MAD/MAD_2 opcode selection.Oliver McFadden2008-03-011-25/+36
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* r300: Renamed some misleading macro arguments.Oliver McFadden2008-03-011-15/+15
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* r300: Cleaned up the vertex program macros.Oliver McFadden2008-03-011-33/+24
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* r300: Removed duplicate component selection defines.Oliver McFadden2008-03-013-42/+22
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* r300: Removed duplicate source register class defines.Oliver McFadden2008-03-013-17/+12
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* r300: Renamed the vertex program source register macro.Oliver McFadden2008-03-013-30/+30
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* r300: Removed the (obsolete) special source register macros.Oliver McFadden2008-03-012-43/+24
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* r300: Cleaned up the special vertex program source register macros.Oliver McFadden2008-03-011-9/+18
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* r300: Added the vertex program swizzle (aka selection) defines.Oliver McFadden2008-03-012-24/+21
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* r300: Converted to the new src/dest register defines.Oliver McFadden2008-03-013-24/+4
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* r300: Removed an obsolete comment from the vertex program header file.Oliver McFadden2008-03-011-4/+0
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* r300: Converted to the new Math Engine defines.Oliver McFadden2008-03-012-22/+9
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* r300: Added the Math Engine opcode macro.Oliver McFadden2008-03-011-0/+9
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* r300: Renamed the Vector Engine opcode macro.Oliver McFadden2008-03-013-40/+40
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* r300: Converted to the new Vector Engine defines.Oliver McFadden2008-03-014-76/+32
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* r300: Removed the duplicate dest register defines.Oliver McFadden2008-03-013-12/+8
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* r300: Removed the duplicate "easy" vertex program macros.Oliver McFadden2008-03-012-21/+19
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* r300: Added the vertex program src/dest register defines.Oliver McFadden2008-03-011-0/+16
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* r300: Added the Vector Engine and Math Engine defines from AMD's documentation.Oliver McFadden2008-03-011-2/+84
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* r300: Moved the vertex and fragment program macros into the appropriate files.Oliver McFadden2008-03-014-151/+121
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* state.depth.range alpha value should be 1, not 0 (bug #14733)Roland Scheidegger2008-03-011-1/+1
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* Use __DRIextension mechanism providing loader functionality to the driver.Kristian Høgsberg2008-02-2926-157/+146
| | | | | | | Instead of passing in a fixed struct, the loader now passes in a list of __DRIextension structs, to advertise the functionality it can provide to the driver. Each extension is individually versioned and can be extended or phased out as the interface develops.
* Reduce the versioning madness required to create a DRI2 screen.Kristian Høgsberg2008-02-293-26/+23
| | | | | | | | | | | | | | | | | | Right now the DRI2 screen constructor takes 3 different versions: DRI, DDX and DRM. This is mostly useless, though: DRI: The DRI driver doesn't actually care about the DRI protocol, it only talks to the loader, which in turn speaks DRI protocol. Thus, the DRI protocol version is of not interest to the DRI driver, but it needs to know what functionality the loader provides. At this point that's reflected in the __DRIinterfaceMethods struct and the internal_version integer. DDX: The DDX version number is essentially used to track extensions to the SAREA. With DRI2 the SAREA consists of a number of versioned, self-describing blocks, so the DDX version is no longer interesting. DRM: We have the fd, lets just ask the kernel ourselves.
* intel: Set the lock flag early to avoid deadlock.Kristian Høgsberg2008-02-291-0/+1
| | | | Another regression from the intel_context.c merge.
* i965: use _Current pointer instead of Current pointer.Xiang, Haihao2008-02-294-24/+7
| | | | fix double free issue(bug#14710). It also corrects glsl/bitmap demo behavior.
* [965] Fix conditional sequencing to allow the frame_buffer_texobj case.Eric Anholt2008-02-281-8/+6
| | | | | Previously the frame_buffer_texobj case would have been bound as a normal texture, at best resulting in no surface data being associated with it.
* [intel] Bug #14575: Unmap buffers when deleting/dataing as required.Eric Anholt2008-02-281-0/+16
| | | | | Otherwise, we would assertion error when doing the final unreference of the buffer with an outstanding map (catching the memory leak).
* r300: R5xx and R3xx use different registers for RS_IP and RS_INSTChristoph Brill2008-02-284-97/+157
| | | | | These changes are taken from the xf86-video-ati driver. They update the header file accordingly and also remove some UNKOWN variables.
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