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* i965/state: Don't use brw->state.dirty.brwJordan Justen2015-03-3133-83/+82
* i965/state: Add compute pipeline with empty atom listsJordan Justen2015-03-313-1/+37
* i965/state: Only upload render programs for render state uploadsJordan Justen2015-03-311-20/+25
* i965/state: Create separate dirty state bits for each pipelineJordan Justen2015-03-312-27/+75
* i965/state: Support multiple pipelines in brw->num_atomsJordan Justen2015-03-312-39/+65
* i965/state: Rename brw_clear_dirty_bits to brw_render_state_finishedJordan Justen2015-03-313-3/+3
* i965/state: Rename brw_upload_state to brw_upload_render_stateJordan Justen2015-03-313-10/+11
* i965/fs: Allow CSE to handle MULs with negated arguments.Matt Turner2015-03-311-5/+37
* i965: Mark brw_inst_bits' brw_inst* parameter const.Matt Turner2015-03-311-12/+12
* i965/skl: Avoid using the 1D stencil layout for stencil-only imagesNeil Roberts2015-03-311-1/+2
* glsl: allow ForceGLSLVersion to override #version directivesBrian Paul2015-03-301-2/+2
* i965/nir: Use NIR for ARB_vertex_program support on Gen8+.Kenneth Graunke2015-03-271-4/+10
* i965: Move env_var_as_boolean to intel_debug.c.Kenneth Graunke2015-03-273-22/+29
* i965/fs: Add ARB_fragment_program support to the NIR backend.Kenneth Graunke2015-03-272-26/+51
* nir: Implement a Mesa IR -> NIR translator.Kenneth Graunke2015-03-275-0/+1143
* i965/skl: Don't use the PMA depth stall workaroundBen Widawsky2015-03-271-1/+6
* i965/skl: Disable partial resolve in VCBen Widawsky2015-03-272-0/+11
* st/mesa: initialize have_fma in constructorIlia Mirkin2015-03-261-0/+1
* st/mesa: update arrays when the current attrib has been updatedIlia Mirkin2015-03-261-1/+1
* st_glsl_to_tgsi: only do mov copy propagation on temps (v2)Dave Airlie2015-03-261-0/+1
* i965: Drop unnecessary brw->gen >= 8 check from scalar VS code.Kenneth Graunke2015-03-251-1/+1
* i965/fs: Implement texture projection support.Kenneth Graunke2015-03-251-1/+10
* i965/fs: Rename offset to tex_offset to avoid shadowing offset().Kenneth Graunke2015-03-251-4/+4
* mesa: Avoid MSVC C6334 warning in /analyze mode.Jose Fonseca2015-03-251-0/+7
* scons: Don't build osmesa.Jose Fonseca2015-03-253-56/+0
* scons: Fix git_sha1.h generation fallback.Jose Fonseca2015-03-251-3/+4
* main: Added entry points for NamedRenderbufferStorage/MultisampleMartin Peres2015-03-253-41/+127
* main: Added entry point for glGetNamedRenderbufferParameterivMartin Peres2015-03-253-18/+50
* main: Added entry point for glCreateRenderbuffersMartin Peres2015-03-253-18/+58
* main: Added entry point for glCreateSamplersMartin Peres2015-03-253-6/+22
* main: Added entry point for glCreateProgramPipelinesMartin Peres2015-03-253-6/+33
* main: Added entry points for glGetQueryBufferObject*Martin Peres2015-03-253-0/+55
* main: Added entry point for glCreateQueriesMartin Peres2015-03-253-7/+72
* main: Added entry point for glGetTransformFeedbacki64_vMartin Peres2015-03-253-0/+37
* main: Added entry point for glGetTransformFeedbacki_vMartin Peres2015-03-253-0/+34
* main: Added entry point for glGetTransformFeedbackivMartin Peres2015-03-253-0/+29
* main: Added entry point for glTransformFeedbackBufferRangeMartin Peres2015-03-254-16/+86
* main: Added entry point for glTransformFeedbackBufferBaseMartin Peres2015-03-254-35/+123
* main: Added entry point for glCreateTransformFeedbacksMartin Peres2015-03-253-15/+56
* main: fix the validation of the number of samplesMartin Peres2015-03-251-0/+9
* main: replace tabs by 8 spaces in fbobject.cMartin Peres2015-03-251-83/+83
* main: replace tabs by 8 spaces in bufferobj.cMartin Peres2015-03-251-8/+8
* glsl: Allow vector logic ops to be generated.Matt Turner2015-03-241-6/+3
* i965: add the remaining files to the tarballEmil Velikov2015-03-241-0/+3
* i965/vec4: Fix handling of multiple register reads and writes in dead_code_el...Francisco Jerez2015-03-231-7/+15
* i965/vec4: Calculate live intervals with subregister granularity.Francisco Jerez2015-03-232-33/+46
* i965/vec4: Define helpers to calculate the common live interval of a range of...Francisco Jerez2015-03-234-29/+31
* i965/vec4: Define helper functions to convert a register to a variable index.Francisco Jerez2015-03-234-28/+34
* i965/vec4: Don't lose the force_writemask_all flag during CSE.Francisco Jerez2015-03-231-0/+3
* i965/vec4: Fix handling of multiple register reads and writes in opt_cse().Francisco Jerez2015-03-231-8/+17
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