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* mesa: Implement _mesa_BindBufferBase for target GL_SHADER_STORAGE_BUFFERIago Toral Quiroga2015-07-141-0/+56
* mesa: Implement _mesa_BindBuffersRange for target GL_SHADER_STORAGE_BUFFERIago Toral Quiroga2015-07-141-0/+110
* mesa: Implement _mesa_BindBuffersBase for target GL_SHADER_STORAGE_BUFFERIago Toral Quiroga2015-07-142-0/+149
* mesa: Implement _mesa_DeleteBuffers for target GL_SHADER_STORAGE_BUFFERIago Toral Quiroga2015-07-141-0/+11
* mesa: Initialize and free shader storage buffersIago Toral Quiroga2015-07-141-0/+19
* mesa: add MaxShaderStorageBlocks to struct gl_program_constantsSamuel Iglesias Gonsalvez2015-07-142-0/+5
* mesa: Add shader storage buffer support to struct gl_contextIago Toral Quiroga2015-07-144-0/+51
* glsl: Identify active uniform blocks that are buffer blocks as such.Iago Toral Quiroga2015-07-141-0/+5
* mesa: rename is_in_uniform_block to is_in_buffer_blockIago Toral Quiroga2015-07-142-2/+2
* mesa: define ARB_shader_storage_buffer_object extensionSamuel Iglesias Gonsalvez2015-07-142-0/+2
* radeon: remove dri_mirror stateEmil Velikov2015-07-134-31/+15
* i915: remove unused driFd variableEmil Velikov2015-07-132-3/+0
* i965: bump libdrm requirement to 2.4.61 and drop in-tree workaroundEmil Velikov2015-07-131-5/+0
* i965: Remove special case for layered drawbuffer attachments.Kenneth Graunke2015-07-101-1/+2
* i965/gen6: Set up layer constraints properly for depth buffers.Kenneth Graunke2015-07-101-1/+5
* i965: Label the repclear shader "meta repclear" rather than "meta clear".Kenneth Graunke2015-07-101-1/+1
* i965: Fix indentation in emit_control_data_bits().Kenneth Graunke2015-07-101-72/+70
* i965/gs: Move vertex_count != 0 check up a level; skip one caller.Kenneth Graunke2015-07-101-6/+8
* mesa: Fix generation of git_sha1.h.tmp for gitlinksChad Versace2015-07-101-1/+4
* i965/vs: Get rid of brw_vs_compile completely.Kenneth Graunke2015-07-093-40/+31
* i965/vs: Remove 'c'/vs_compile from vec4_vs_visitor.Kenneth Graunke2015-07-094-15/+15
* i965/vec4: Move c->last_scratch into vec4_visitor.Kenneth Graunke2015-07-098-22/+15
* i965/vec4: Move total_scratch calculation into the visitor.Kenneth Graunke2015-07-093-10/+7
* i965/vec4: Move perf_debug about register spilling into the visitor.Kenneth Graunke2015-07-093-11/+13
* i965/vec4: Plumb log_data through so the backend_shader field gets set.Kenneth Graunke2015-07-098-8/+18
* i965: Switch on shader stage in nir_setup_outputs().Kenneth Graunke2015-07-091-26/+33
* i965: Set brw->batch.emit only #ifdef DEBUG.Matt Turner2015-07-092-1/+3
* i965/hsw: Implement end of batch workaroundBen Widawsky2015-07-092-2/+29
* i965: Move pipecontrol workaround bo to brw_pipe_controlChris Wilson2015-07-086-37/+64
* i965: Query whether we have kernel support for the TIMESTAMP register onceChris Wilson2015-07-083-5/+25
* i965/vs: Fix matNxM vertex attributes where M != 4.Kenneth Graunke2015-07-071-4/+11
* i965/gen4-5: Enable 16-wide dispatch on shaders with control flow.Francisco Jerez2015-07-071-7/+1
* i965/gen4-5: Program the execution size correctly for DO/WHILE instructions.Francisco Jerez2015-07-071-1/+1
* i965/gen4-5: Set ENDIF dst and src0 fields to the null register.Francisco Jerez2015-07-071-2/+2
* mesa: Convert some asserts into STATIC_ASSERT.Matt Turner2015-07-061-7/+6
* i965: Reserve more batch space to accomodate Gen6 perfmonitors.Kenneth Graunke2015-07-061-2/+2
* i965/skl: Set the pulls bary bit in 3DSTATE_PS_EXTRANeil Roberts2015-07-064-0/+9
* st/mesa: if a fence isn't returned, assume it's signalledMarek Olšák2015-07-051-1/+13
* gallium: use fence_finish instead of fence_signalled in state trackersMarek Olšák2015-07-051-1/+1
* dri/common: allow BGRX sRGB visualsMarek Olšák2015-07-031-0/+1
* mesa: fix sRGB rendering for GLES1Marek Olšák2015-07-031-6/+4
* i965/fs: Don't disable SIMD16 when using the pixel interpolatorNeil Roberts2015-07-031-8/+3
* mesa/prog: relative offsets into constbufs are not constantIlia Mirkin2015-07-021-0/+2
* i965: allocate at least 1 BLEND_STATE elementMike Stroyan2015-07-021-1/+1
* mesa/st: Add checks for signed/unsigned integer conversions in ReadPixelsIago Toral Quiroga2015-07-021-0/+28
* mesa: reset the source packing when creating temp transfer imageIlia Mirkin2015-07-011-0/+1
* i965/gen9: use an unreserved surface alignment valueNanley Chery2015-07-011-4/+4
* i965/fs: Use the builder directly for the gen6 interpolation add(32)Jason Ekstrand2015-07-011-6/+5
* i965/fs: Relax fs_builder channel group assertion when force_writemask_all is...Francisco Jerez2015-07-013-7/+7
* nouveau: rename var name for nouveau_vieux to avoid conflict with nouveauIlia Mirkin2015-07-011-2/+2