| Commit message (Collapse) | Author | Age | Files | Lines |
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Signed-off-by: Ian Romanick <[email protected]>
Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
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Check the destination's row pitch against the BLT engine's row pitch
limitation as well.
Fixes: 0288fe8d0417730bdd5b3477130dd1dc32bdbcd3
("i965/miptree: Use the correct BLT pitch")
v2: Fix the Fixes tag (Dylan).
Check the destination row pitch (Chris).
Reported-by: Dylan Baker <[email protected]>
Cc: <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
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This struct contains all the data of interest. can_blit_slice() will use
it in the next patch to calculate the correct pitch.
Suggested-by: Chris Wilson <[email protected]>
Cc: <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
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It fixes simulator warnings in piglit tests complaining about missing
support for headerless sampler messages for pre-emptable contexts.
Bit 5 in SAMPLER MODE register is newly introduced for ICLLP.
Signed-off-by: Anuj Phogat <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
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Testing:
- Manually tested a low-latency handwriting demo that toggles
EGL_RENDER_BUFFER. Toggling changed the display latency as expected.
Used Android on Chrome OS, Kabylake GT2.
- No change in dEQP-EGL.functional.* on Fedora 27, Wayland, Skylake
GT2. Used deqp at tag android-p-preview-5.
- No regressions in dEQP-EGL.functional.*, ran on Android on Chrome
OS, Kabylake GT2. Some dEQP-EGL.functional.mutable_render_buffer.*
test change from NotSupported to Pass.
Reviewed-by: Tapani Pälli <[email protected]>
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Reviewed-by: Kenneth Graunke <[email protected]>
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This was added as a workaround for Heaven 3.0 but was later removed
by 5ead448719f3 to allow Heaven 4.0 to work correctly.
Reviewed-by: Kenneth Graunke <[email protected]>
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Add enviroment var overrides to legacy drivers instead.
Reviewed-by: Kenneth Graunke <[email protected]>
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Forcing software fallbacks for i965 hasn't been an option since
5e3c093ff866.
Reviewed-by: Kenneth Graunke <[email protected]>
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This driver is in maintenance mode so lets remove this hidden
unsafe option.
Reviewed-by: Kenneth Graunke <[email protected]>
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The main purpose for having NV_fragment_shader_interlock
extension is because that extension is also for GLES31 while
the ARB extension is for GL only.
Reviewed-by: Plamena Manolova <[email protected]>
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We use floating-points for viewport bounds so VIEWPORT_SUBPIXEL_BITS
should reflect this.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105975
Signed-off-by: Danylo Piliaiev <[email protected]>
Reviewed-by: Lionel Landwerlin <[email protected]>
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Reviewed-by: Ian Romanick <[email protected]>
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Reviewed-by: Ian Romanick <[email protected]>
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This attribute can be used by loader to apply different
option to device use specific kernel driver.
Signed-off-by: Qiang Yu <[email protected]>
Acked-by: Michel Dänzer <[email protected]>
Reviewed-by: Emil Velikov <[email protected]>
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Signed-off-by: Eric Engestrom <[email protected]>
Reviewed-by: Emil Velikov <[email protected]>
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Signed-off-by: Eric Engestrom <[email protected]>
Reviewed-by: Emil Velikov <[email protected]>
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Signed-off-by: Eric Engestrom <[email protected]>
Reviewed-by: Lionel Landwerlin <[email protected]>
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When moving the array sizes from the old list to the new one it was
not taken into account that the array indices start with one, but the
array_size array started at index zero, which resulted in incorrect array
sizes when arrays were merged. Correct this by copying the array_size
values of the retained arrays with an offset of -1.
Also fix whitespaces for the replaced lines.
Fixes: d8c2119f9b0b257a23ceb398f6d0d78da916417e
mesa/st/glsl_to_tgsi: Expose array live range tracking and merging
Signed-off-by: Gert Wollny <[email protected]>
Reviewed-by: Dave Airlie <[email protected]>
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If called with an empty size, brw_emit_buffer_surface_state asserts.
We already have a dedicated helper for uploading nothing, so let's use
that instead.
Avoids an assert in
dEQP-GLES31.functional.shaders.opaque_type_indexing.ssbo.const_literal_vertex
when running a debug build of i965.
Signed-off-by: Erik Faye-Lund <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
Reviewed-by: Lionel Landwerlin <[email protected]>
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Usage of number 4096 replaced by PAGE_SIZE.
Signed-off-by: Sergii Romantsov <[email protected]>
Reviewed-by: Lionel Landwerlin <[email protected]>
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Kernel (for ppgtt) requires memory address to be
aligned to page size (4096).
-v2: added marking that also fixes initial commit 01058a552294.
-v3: numbers replaced by PAGE_SIZE; buffer-object size is aligned
instead of alignment of offsets (Chris Wilson).
-v4: changes related to PAGE_SIZE moved to separate commit
-v5: restored alignment to page-size for 0-size.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106997
Fixes: a363bb2cd0e2 (i965: Allocate VMA in userspace for full-PPGTT systems.)
Fixes: 01058a552294 (i965: Add virtual memory allocator infrastructure to brw_bufmgr.)
Signed-off-by: Sergii Romantsov <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
Reviewed-by: Lionel Landwerlin <[email protected]>
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Avoided filling of whole structure and bo-allocation if
size of surface is 0.
Signed-off-by: Sergii Romantsov <[email protected]>
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Signed-off-by: Tapani Pälli <[email protected]>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106283
Reviewed-by: Alejandro Piñeiro <[email protected]>
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Used internally in freedreno/ir3 for the vec2 value that hw passes to
shader to use as coordinate for bary.f (varying fetch) instruction.
This is not the same as SYSTEM_VALUE_FRAG_COORD.
Signed-off-by: Rob Clark <[email protected]>
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From AppVeyor #8582, it seems that MSVC doesn't like uint, so this
patch replaces it with unsigned.
Reviewed-by: Roland Scheidegger <[email protected]>
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This is clearly a copy-paste error; if we validate the reladdr2-pointer,
we don't want to traverse to the reladdr-pointer. Especially since the
check above shows that reladdr could be NULL here.
Noticed by Coverity.
CID: 1438389, 1438390
Fixes: 568bda2f2d3 ("mesa/st/glsl_to_tgsi: Split arrays whose elements are only accessed directly")
Signed-off-by: Erik Faye-Lund <[email protected]>
Reviewed-by: Gert Wollny <[email protected]>
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Instead of using the copy of shader_info stored in gl_program, it now
uses the one in nir_shader. This is needed for SPIR-V because the
info.tess.tcs_vertices_out is filled in via _mesa_spirv_to_nir which
happens much later than with a GLSL shader. The copy of shader_data in
gl_program is only updated later via brw_shader_gather_info but that
is too late.
For GLSL this shouldn't create any problems because the nir copy of
the shader_info is immediately copied from the gl_program in
glsl_to_nir.
v2: updated after commit "i965: Combine both gl_PatchVerticesIn
lowering passes." (488972) (Alejandro Piñeiro)
Reviewed-by: Timothy Arceri <[email protected]>
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The value is copied from the gl_program. If we don’t do this then it
will get reset back to zero in brw_shader_gather_info. This isn’t a
problem for GLSL because in that case the nir_shader is initialised
with a copy of the shader_info from the gl_program.
Reviewed-by: Timothy Arceri <[email protected]>
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This is the same we do for vulkan drivers
This is needed to pass the following CTS test:
KHR-GL45.gl_spirv.spirv_modules_shader_binary_multiple_shader_objects_test
Reviewed-by: Timothy Arceri <[email protected]>
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input locations used by input attributes are not handled in the same
way in OpenGL vs Vulkan. There is a detailed explanation of such
differences on the following commit:
c2acf97fcc9b32eaa9778771282758e5652a8ad4
So with this commit, the same adjustment that is done after
glsl_to_nir, is being done after spirv_to_nir, when it is used on
OpenGL (ARB_gl_spirv).
Reviewed-by: Timothy Arceri <[email protected]>
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Signed-off-by: Tapani Pälli <[email protected]>
Reviewed-by: Nanley Chery <[email protected]>
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Patch sets additional formats renderable and enables the extension
when OpenGL ES 3.1 is supported.
v2: instead of dummy_true, have a separate toggle for extension
(Eric Anholt)
v3: add missing checks, simplify some existing checks and fix
glCopyTexImage2D check (Nanley Chery)
add SHORT and BYTE support in read_pixels_es3_error_check
Signed-off-by: Tapani Pälli <[email protected]>
Reviewed-by: Nanley Chery <[email protected]>
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The Vulkan 1.1.82 spec flipped the order to better match D3D.
Cc: [email protected]
Reviewed-by: Iago Toral Quiroga <[email protected]>
Reviewed-by: Anuj Phogat <[email protected]>
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Signed-off-by: Gert Wollny <[email protected]>
Acked-by: Dave Airlie <[email protected]>
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Signed-off-by: Gert Wollny <[email protected]>
Acked-by: Dave Airlie <[email protected]>
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This patch ties in the array split, merge, and interleave code.
shader-db changes in the TGSI code are:
original code | array-merge | change
mean max | mean max | best mean % worst
-----------------------------------------------------------
arrays 0.05 2 | 0.00 0 | -2 -100 0
total temps 5.05 21 | 4.92 20 | -15 -2.59 1
instr 55.33 988 | 55.20 988 | -15 -0.24 0
Evaluation:
Run shader-db in single thread mode (otherwise the output is
not ordered and the best and worst column don't make sense) to
get results pre-stats.txt and post-stats.txt. Then using
python pandas:
import pandas as pd
old_stats = pd.read_csv('pre-stats.txt')
new_stats = pd.read_csv('post-stats.txt')
omean = old_stats.mean()
omax = old_stats.max()
nmean = new_stats.mean()
nmax = new_stats.max()
delta = new_stats - old_stats
pd.concat([omean, omax, nmean, nmax, delta.min(),
delta.mean()/old_stats.mean()*100, delta.max()],
axis=1, keys=['mean', 'max', 'mean', 'max', 'best',
'avg change %', 'worst'])
v4: - Correct typo and add bugs that are fixed by this series.
- Update stats and describe stats evaluation
Bugzilla:
https://bugs.freedesktop.org/show_bug.cgi?id=105371
https://bugs.freedesktop.org/show_bug.cgi?id=100200
Signed-off-by: Gert Wollny <[email protected]>
Acked-by: Dave Airlie <[email protected]>
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v4: Also track the register given in inst->resource. (thanks: Benedikt Schemmer
for testing the patches on radeonsi, which revealed that I was missing
tracking this)
Signed-off-by: Gert Wollny <[email protected]>
Acked-by: Dave Airlie <[email protected]>
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Because of the indirect access it is impossible to obtain an accurate per
component and array element tracking. Therefore, the tracking is simplified
to only track whether any element was accessed, whether this happend
conditionally in a loop. In addition, while tracking of temporaries requires
a per-componet tracking that is later fused, for arrays only the components
access mask is neede. The resulting tracking code and evaluation of the array
live range is sufficiently different from the evaluation of the live range of
temporaries to justify implementing this in a different class instead of
adding more complexity to the already existing code for temporary life
range evaluation.
v4: Update commit message to make it clearer why this class is seperate from
the tracking of temporaries.
Signed-off-by: Gert Wollny <[email protected]>
Acked-by: Dave Airlie <[email protected]>
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In preparation of the array live range tracking the evaluation of the read
mask is moved out the register live range tracking to the enclosing call
of the generalized read access tracking.
Signed-off-by: Gert Wollny <[email protected]>
Acked-by: Dave Airlie <[email protected]>
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more renames
In preparartion of adding the tracking of the live range the classes that refer
to temporary registers are renamed.
Reviewed-by: Nicolai Hähnle <[email protected]>
Signed-off-by: Gert Wollny <[email protected]>
Acked-by: Dave Airlie <[email protected]>
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v2: - Define tests also in the meson.build file.
v4: - Check no-op mapping of all bits.
- Convert tests to the new class layout used in the merge evaulation.
- remove dependency on llvm in meson build (Thanks Dylan Baker for pointing
out that this might not needed)
Signed-off-by: Gert Wollny <[email protected]>
Acked-by: Dave Airlie <[email protected]>
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v4: - Update the code to use the new merge logic.
- Use a cleaner, class-based approach for the evaluation of merges.
Signed-off-by: Gert Wollny <[email protected]>
Acked-by: Dave Airlie <[email protected]>
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v4: - Remove logic for evaluation of swizzles and merges since this
was moved to array_live_range. This class now only handles the
actual remapping.
Signed-off-by: Gert Wollny <[email protected]>
Acked-by: Dave Airlie <[email protected]>
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interleaving
This class holds the array length, live range, and accessed components, and
it implements the logic for evaluating how arrays are merged and interleaved.
v4: - Add logic to evaluate merge and interleave of a pair of arrays to
the class array_live_range.
- document class
- update commit message
Thanks Nicolai Hähnle for the pointers given.
Signed-off-by: Gert Wollny <[email protected]>
Acked-by: Dave Airlie <[email protected]>
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On one hand "live range" is the term used in the literature, and on the
other hand a distinction is needed from the array live ranges.
v4: Fix indentions and white spaces
Reviewed-by: Nicolai Hähnle <[email protected]> (v3)
Signed-off-by: Gert Wollny <[email protected]>
Acked-by: Dave Airlie <[email protected]>
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constructs
in constructs like below, currently the live range estimation extends the live range
of t unecessarily to the whole loop because it was not detected that t is
unconditional written and later read only in the "if (a)" scope.
while (foo) {
...
if (a) {
...
if (b)
t = ...
else
t = ...
x = t;
...
}
...
}
This patch adds a unit test for this case and corrects the minimal live range estimation
accordingly.
v4: update comments
Signed-off-by: Gert Wollny <[email protected]>
Acked-by: Dave Airlie <[email protected]>
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Array whose elements are only accessed directly are replaced by the
according number of temporary registers. By doing so the otherwise
reserved register range becomes subject to further optimizations like
copy propagation and register merging.
Thanks to the resulting reduced register pressure this patch makes
the piglits
spec/glsl-1.50/execution -
variable-indexing/vs-output-array-vec3-index-wr-before-gs
geometry/max-input-components
pass on r600 (barts) where they would fail before with a "GPR limit exceeded"
error (even with the spilling that was recently added).
v2: * rename method dissolve_arrays to split_arrays
* unify the tracking and remapping methods for src and dst registers
* also track access to arrays via reladdr*
v3: * enable this optimization only if the driver requests register merge
v4: * Correct comments
* Also update inst->resource if it is an array element
(thanks: Benedikt Schemmer for testing the patches on radeonsi, which
revealed that I was missing tracking this)
Signed-off-by: Gert Wollny <[email protected]>
Acked-by: Dave Airlie <[email protected]>
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When mesa is compiled in debug mode then this adds the possibility
to print out some statistics about the translated and optimized TGSI
shaders to a file.
The functionality is enabled by setting the environment variable
GLSL_TO_TGSI_PRINT_STATS
to the file name where the statistics should be collected. The file is
opened in append mode so that statistics from various runs will be
accumulated.
v4: Make accress to log file thread save (thanks for pointing this out Nicolai
Hähnle)
Signed-off-by: Gert Wollny <[email protected]>
Acked-by: Dave Airlie <[email protected]>
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Now that all the build scripts are compatible with both Python 2 and 3,
we can flip the switch and tell Meson to use the latter.
Since Meson already depends on Python 3 anyway, this means we don't need
two different Python stacks to build Mesa.
Signed-off-by: Mathieu Bridon <[email protected]>
Reviewed-by: Eric Engestrom <[email protected]>
Reviewed-by: Dylan Baker <[email protected]>
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