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* cso: put cso_release_all into cso_destroy_contextMarek Olšák2014-12-101-6/+2
| | | | Reviewed-by: Brian Paul <[email protected]>
* i965: Generate vs code using scalar backend for BDW+Kristian Høgsberg2014-12-106-15/+77
| | | | | | | | | | | | | | | | With everything in place, we can now use the scalar backend compiler for vertex shaders on BDW+. We make scalar vertex shaders the default on BDW+ but add a new vec4vs debug option to force the vec4 backend. No piglit regressions. Performance impact is minimal, I see a ~1.5 improvement on the T-Rex GLBenchmark case, but in general it's in the noise. Some of our internal synthetic, vs bounded benchmarks show great improvement, 20%-40% in some cases, but real-world cases are mostly unaffected. Signed-off-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Clean up fs_visitor::run and rename to run_fsKristian Høgsberg2014-12-102-19/+15
| | | | | | | | | Now that fs_visitor::run is back to being only fragment shader compilation, we can clean up a few stage == MESA_SHADER_FRAGMENT conditions and rename it to run_fs. Signed-off-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Add fs_visitor::run_vs() to generate scalar vertex shader codeKristian Høgsberg2014-12-103-13/+436
| | | | | | | | | This patch uses the previous refactoring to add a new run_vs() method that generates vertex shader code using the scalar visitor and optimizer. Signed-off-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Rename brw_vec4_prog_data/key to brw_bue_prog_data/keyKristian Høgsberg2014-12-1013-42/+42
| | | | | | | | | | | These structs aren't vec4 specific, they are shared by shader stages operating on Vertex URB Entries (VUEs). VUEs are the data structures in the URB that hold vertex data between the pipeline geometry stages. Using vue in the name instead of vec4 makes a lot more sense, especially when we add scalar vertex shader support. Signed-off-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Prepare for using the ATTR register file in the fs backendKristian Høgsberg2014-12-104-6/+23
| | | | | | | | The scalar vertex shader will use the ATTR register file for vertex attributes. This patch adds support for the ATTR file to fs_visitor. Signed-off-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Consolidate code to get struct brw_sampler_prog_key_dataKristian Høgsberg2014-12-101-21/+16
| | | | | | | | This chunk of code is repeated in a few places, and we're going to add a MESA_SHADER_VERTEX case to it soon. Signed-off-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Add new SIMD8 VS prog data flagKristian Høgsberg2014-12-106-7/+21
| | | | | | | | | | This flag signals that we have a SIMD8 VS shader so we can set up the corresponding state accordingly. This boils down to setting the BDW+ SIMD8 enable bit in 3DSTATE_VS and making UBO and pull constant buffers use dword pitch. Signed-off-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Add SIMD8 URB write low-level IR instructionKristian Høgsberg2014-12-106-1/+51
| | | | | | | | | This is all we need from the generator for SIMD8 vertex shaders. This opcode is just the send instruction, all the hard work will happen in the visitor using LOAD_PAYLOAD. Signed-off-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Remove shader program argument and member from fs_generatorKristian Høgsberg2014-12-104-6/+3
| | | | | | | | Now that the caller passes in the shader debug name, we don't need this anymore. Signed-off-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Set shader name for generator from call siteKristian Høgsberg2014-12-104-24/+35
| | | | | | | | fs_generator no longer knows what stage it's generating code for, so we have to set the debug name of the shader from the call site. Signed-off-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Generalize fs_generator furtherKristian Høgsberg2014-12-104-16/+12
| | | | | | | | This removes all stage specific data from the generator, and lets us create a generator for any stage. Signed-off-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Don't copy propagate constants from sources with saturateKristian Høgsberg2014-12-101-0/+2
| | | | | | | | We don't propagate the saturate bit and some instructions can't saturate at all. If the source has saturate set, just skip propagation. Signed-off-by: Kristian Høgsberg <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Replace 'noann' debug flag with 'ann'.Matt Turner2014-12-103-3/+3
| | | | | | Reviewed-by: Ben Widawsky <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Disable unlit-centroid workaround on Gen < 6.Matt Turner2014-12-101-3/+0
| | | | | | | | | | | | | | | | | | | | | Back to the original commit (8313f444) adding the workaround, we were enabling it on gens <= 7, even though gens <= 5 can't do multisampling. I cannot find documentation that says that Sandybridge needs this workaround but in practice disabling it causes these piglit tests to fail: EXT_framebuffer_multisample/interpolation {2,4} centroid-deriv{,-disabled} On Ironlake: total instructions in shared programs: 4358478 -> 4349671 (-0.20%) instructions in affected programs: 117680 -> 108873 (-7.48%) A bunch of shaders in TF2, Portal 2, and L4D2 are cut by 25~30%. Cc: "10.4" <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* mesa: use build flag to ensure stack is realigned on x86Timothy Arceri2014-12-102-4/+1
| | | | | | | | | | | | | | | | | Nowadays GCC assumes stack pointer is 16-byte aligned even on 32-bits, but that is an assumption OpenGL drivers (or any dynamic library for that matter) can't afford to make as there are many closed- and open- source application binaries out there that only assume 4-byte stack alignment. V4: fix comment and indentation V3: move all sse4.1 build flag config to the same location and add comment as to why we need to do the realign V2: use $target_cpu rather than $host_cpu and setup build flags in config rather than makefile https://bugs.freedesktop.org/show_bug.cgi?id=86788 Signed-off-by: Timothy Arceri <[email protected]> Reviewed-by: Matt Turner <[email protected]> CC: "10.4" <[email protected]>
* main: return two minor digits for ES shading language versionSamuel Iglesias Gonsalvez2014-12-091-1/+1
| | | | | | | | | | | | | | | For OpenGL ES 3.0 spec, the minor number for SHADING_LANGUAGE_VERSION is always two digits, matching the OpenGL ES Shading Language Specification release number. For example, this query might return the string "3.00". This patch fixes the following dEQP test: dEQP-GLES3.functional.state_query.string.shading_language_version No piglit regression observed. Signed-off-by: Samuel Iglesias Gonsalvez <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* mesa: Recompute LegalTypesMask if the GL API has changedIago Toral Quiroga2014-12-092-19/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current code computes ctx->Array.LegalTypesMask just once, however, computing this needs to consider ctx->API so we need to make sure that the API for that context has not changed if we intend to reuse the result. The context API can change, at least, if we go through _mesa_meta_begin, since that will always force API_OPENGL_COMPAT until we call _mesa_meta_end. If any operation in between these two calls triggers a call to update_array_format, then we might be caching a value for LegalTypesMask that will not be right once we have called _mesa_meta_end and restored the context API. Fixes the following 179 dEQP tests in i965: dEQP-GLES3.functional.vertex_arrays.single_attribute.strides.fixed.* dEQP-GLES3.functional.vertex_arrays.single_attribute.normalize.fixed.* dEQP-GLES3.functional.vertex_arrays.single_attribute.output_types.fixed.* dEQP-GLES3.functional.vertex_arrays.single_attribute.usages.static_draw.*fixed* dEQP-GLES3.functional.vertex_arrays.single_attribute.usages.stream_draw.*fixed* dEQP-GLES3.functional.vertex_arrays.single_attribute.usages.dynamic_draw.*fixed* dEQP-GLES3.functional.vertex_arrays.single_attribute.usages.static_copy.*fixed* dEQP-GLES3.functional.vertex_arrays.single_attribute.usages.stream_copy.*fixed* dEQP-GLES3.functional.vertex_arrays.single_attribute.usages.dynamic_copy.*fixed* dEQP-GLES3.functional.vertex_arrays.single_attribute.usages.static_read.*fixed* dEQP-GLES3.functional.vertex_arrays.single_attribute.usages.stream_read.*fixed* dEQP-GLES3.functional.vertex_arrays.single_attribute.usages.dynamic_read.*fixed* dEQP-GLES3.functional.vertex_arrays.multiple_attributes.input_types.3_*fixed2* dEQP-GLES3.functional.draw.random.{2,18,28,68,83,106,109,156,181,191} Reviewed-by: Brian Paul <[email protected]>
* mesa: Returns zero samples when querying GL_NUM_SAMPLE_COUNTS when internal ↵Eduardo Lima Mitev2014-12-091-23/+34
| | | | | | | | | | | format is integer From GL ES 3.0 specification, section 6.1.15 Internal Format Queries (page 236), multisampling is not supported for signed and unsigned integer internal formats. Fixes 19 dEQP tests under 'dEQP-GLES3.functional.state_query.internal_format.*'. Reviewed-by: Ian Romanick <[email protected]>
* mesa: Enables GL_RGB and GL_RGBA unsized internal formats for OpenGL ES 3.0Eduardo Lima Mitev2014-12-091-0/+6
| | | | | | | | | | | | GL_RGB and GL_RGBA are valid internal formats on a GLES3 profile. See "Table 1. Unsized Internal Formats" at https://www.khronos.org/opengles/sdk/docs/man3/html/glTexImage2D.xhtml. Fixes 2 dEQP tests: - dEQP-GLES3.functional.state_query.internal_format.rgb_samples - dEQP-GLES3.functional.state_query.internal_format.rgba_samples Reviewed-by: Brian Paul <[email protected]>
* mesa: Considers GL_DEPTH_STENCIL_ATTACHMENT a valid argument for FBO ↵Eduardo Lima Mitev2014-12-091-0/+8
| | | | | | | | | | | | invalidation under GLES3 In OpenGL and OpenGL-ES 3+, GL_DEPTH_STENCIL_ATTACHMENT is a valid attachment point for the family of functions that invalidate a framebuffer object (e.g, glInvalidateFramebuffer, glInvalidateSubFramebuffer, etc). Currently, a GL_INVALID_ENUM error is emitted for this attachment point. Fixes 21 dEQP test failures under 'dEQP-GLES3.functional.fbo.invalidate.*'. Reviewed-by: Ian Romanick <[email protected]>
* program: Delete dead _mesa_realloc_instructions.Matt Turner2014-12-082-21/+0
| | | | | | Dead since 2010 (commit 284ce209). Reviewed-by: Ian Romanick <[email protected]>
* swrast: Remove 'inline' from tex filter functions.Matt Turner2014-12-081-26/+26
| | | | | | | | | | Reduces .text size of mesa_dri_drivers.so (i965-only) by 62k, or 1.4%. Note that we don't remove inline from lerp_2d(), which has a comment above it saying it definitely should be inlined. Though, removing the inline keyword from it doesn't actually change the compiled code for me. Reviewed-by: Brian Paul <[email protected]>
* Don't cast the return value of malloc/reallocMatt Turner2014-12-087-17/+9
| | | | | | | See commit 2b7a972e for the Coccinelle script. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* Remove useless checks for NULL before freeingMatt Turner2014-12-082-7/+3
| | | | | | | See commits 5067506e and b6109de3 for the Coccinelle script. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965/skl: Add Skylake PCI IDsKristian Høgsberg2014-12-081-0/+29
| | | | Signed-off-by: Kristian Høgsberg <[email protected]>
* i965/skl: Emit depth stall workaround for gen9 as wellDamien Lespiau2014-12-081-1/+1
| | | | | | | | | | The docs say that we shouldn't need this workaround for gen8+, but just removing it, causes gpu hangs. We'll revisit this, but for now, just extend the workaround to gen9. Signed-off-by: Damien Lespiau <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
* i965/skl: Fix GS thread count locationBen Widawsky2014-12-081-11/+18
| | | | | | | | | | SKL moves the GS threadcount to dw8 from dw7, and no longer does the divide by 2 thing. Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Tested-by: Kristian Høgsberg <[email protected]>
* i965: Fix union usage for G++ <= 4.6.Vinson Lee2014-12-081-1/+2
| | | | | | | | | | | | This patch fixes this build error with G++ <= 4.6. CXX test_vf_float_conversions.o test_vf_float_conversions.cpp: In function ‘unsigned int f2u(float)’: test_vf_float_conversions.cpp:63:20: error: expected primary-expression before ‘.’ token Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86939 Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* st/mesa: For vertex shaders, don't emit saturate when SM 3.0 is unsupportedAbdiel Janulgue2014-12-082-4/+3
| | | | | | | | | | | There is a bug in the current lowering pass implementation where we lower saturate to clamp only for vertex shaders on drivers supporting SM 3.0. The correct behavior is to actually lower to clamp only when we don't support saturate which happens on drivers that don't support SM 3.0 Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Matt Turner <[email protected]> Signed-off-by: Abdiel Janulgue <[email protected]>
* glsl: Don't optimize min/max into saturate when EmitNoSat is setAbdiel Janulgue2014-12-081-0/+1
| | | | | | | v3: Fix multi-line comment format (Ian) Reviewed-by: Matt Turner <[email protected]> Signed-off-by: Abdiel Janulgue <[email protected]>
* ir_to_mesa: Remove sat to clamp lowering passAbdiel Janulgue2014-12-081-3/+1
| | | | | | | | | | | | | | | Fixes an infinite loop in swrast where the lowering pass unpacks saturate into clamp but the opt_algebraic pass tries to do the opposite. v3 (Ian): This is a revert of commit cfa8c1cb "ir_to_mesa: lower ir_unop_saturate" on the ir_to_mesa.cpp portion. prog_execute.c can handle saturates in vertex shaders, so classic swrast shouldn't need this lowering pass. Cc: "10.4" <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83463 Reviewed-by: Matt Turner <[email protected]> Signed-off-by: Abdiel Janulgue <[email protected]>
* i965: Remove default from brw_instruction_name switch to catch missing names.Matt Turner2014-12-081-12/+5
| | | | | | | The case-range extension is available in clang and gcc at least back to 3.4.0. Signed-off-by: Chris Forbes <[email protected]>
* i965: Add missing opcode names.Matt Turner2014-12-081-0/+9
| | | | Signed-off-by: Chris Forbes <[email protected]>
* i965: Add opcode names for set_omask and set_sample_id.Matt Turner2014-12-081-0/+4
| | | | Reviewed-by: Chris Forbes <[email protected]>
* i965/Gen6-7: Fix point sprites with PolygonMode(GL_POINT)Chris Forbes2014-12-071-0/+6
| | | | | | | | | | | | | | | | | This was an oversight in the original patch. When PolygonMode is used, then front faces, back faces, or both may be rendered as points and are affected by point sprite state. Note that SNB/IVB can't actually be fully conformant here, for a legacy context -- we don't have separate sets of pointsprite enables for front and back faces. Haswell ignores pointsprite state correctly in hardware for non-point rasterization, so can do this correctly, but it doesn't seem worth it. Signed-off-by: Chris Forbes <[email protected]> Cc: "10.4" <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86764 Reviewed-by: Matt Turner <[email protected]>
* i965: Fix regs read for FS_OPCODE_INTERP_PER_SLOT_OFFSETChris Forbes2014-12-071-0/+2
| | | | | | | | | | Dead code elimination was eating the Y offset. Fixes the piglit test: spec/ARB_gpu_shader5/arb_gpu_shader5-interpolateAtOffset-nonconst Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Add opcode names for FS interpolation opcodesChris Forbes2014-12-071-0/+9
| | | | | Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* mesa/st: don't use CMP / I2F for conditional assignments with native integersRoland Scheidegger2014-12-061-17/+45
| | | | | | | | | | | | | | | | | | | The original idea was to optimize away the condition by integrating it directly into the CMP instruction. However, with native integers this requires an extra I2F instruction. It is also fishy because the negation used didn't really honor ieee754 float comparison rules, not to mention the CMP instruction itself (being pretty much a legacy instruction) doesn't really have defined special float value behavior in any case. So, use UCMP and adjust the code trying to optimize the condition away accordingly (I have absolutely no idea if such conditions are actually hit or would be translated away somewhere else already). v2: cosmetic changes No piglit regressions on llvmpipe. Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* i965/fs: Perform CSE on MOV ..., VF instructions.Matt Turner2014-12-051-5/+11
| | | | | | | | | | | Safe from causing optimization loops, since we don't constant propagate VF arguments. (for this and the previous patch): total instructions in shared programs: 4289075 -> 4271932 (-0.40%) instructions in affected programs: 1616779 -> 1599636 (-1.06%) Reviewed-by: Ian Romanick <[email protected]>
* i965/fs: Try to emit LINE instructions on Gen <= 5.Matt Turner2014-12-052-0/+56
| | | | | | | | | | | | | The LINE instruction performs a multiply-add instruction (a * b + c) where b and c are scalar arguments. It reads b and c from offsets in src0 such that you can load them (it they're representable) as a vector-float immediate with a single instruction. Hurts some programs, but that'll all get better once we CSE the vector-float MOVs in the next patch. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77544 Reviewed-by: Ian Romanick <[email protected]>
* i965/fs: Add support for generating the LINE instruction.Matt Turner2014-12-051-0/+4
| | | | Reviewed-by: Ian Romanick <[email protected]>
* i965: Set the region of LINE's src0 to <0,1,0>.Matt Turner2014-12-051-1/+10
| | | | | | | | | | | | | The PRMs say that <src0> region must be a replicated scalar (with HorzStride = VertStride = 0). but apparently that doesn't actually apply to all generations. I did notice when implementing the optimization later in this series that G45 and ILK needed this regioning. Reviewed-by: Ian Romanick <[email protected]>
* i965: Give compile stats through KHR_debug.Matt Turner2014-12-052-0/+20
| | | | Reviewed-by: Ian Romanick <[email protected]>
* mesa: Add a source parameter to _mesa_gl_debug.Matt Turner2014-12-057-2/+12
| | | | | Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965/gs: Avoid DW * DW mulBen Widawsky2014-12-051-2/+6
| | | | | | | | | | | | | | | | | | | | | | | The GS has an interesting use for mul. Because the GS can emit multiple vertices per input vertex, and it also has a unique count at the top of the URB payload, the GS unit needs to be able to dynamically specify URB write offsets (relative to the global offset). The documentation in the function has a very good explanation from Paul on the mechanics. This fixes around 2000 piglit tests on BSW. v2: Reworded commit message (Ben) no mention of CHV (Matt) Change SHRT_MAX to USHRT_MAX (Ken, and Matt) Update comment in code to reflect the use of UW (Ben) Add Gen7+ assertion for the relevant GS code, since it won't work on Gen6- (Ken) Drop the bogus hunk in emit_control_data_bits() (Ken) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84777 (with many dupes) Cc: "10.4 10.3 10.2" <[email protected]> Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/fs: Move brw_file_from_reg() higher in the file.Matt Turner2014-12-051-14/+14
| | | | This was supposed to be part of the previous commit.
* i965/fs: Make brw_reg_from_fs_reg static and remove prototype.Matt Turner2014-12-052-72/+70
| | | | | | And move it above its first use in brw_fs_generator.cpp. Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Use ~0 to represent true on all generations.Matt Turner2014-12-055-102/+120
| | | | | | | | | | | | | | Jason realized that we could fix the result of the CMP instruction on Gen <= 5 by doing -(result & 1). Also do the resolves in the vec4 backend before use, rather than when the bool was created. The FS does this and it saves some unnecessary resolves. On Ironlake: total instructions in shared programs: 4289762 -> 4287277 (-0.06%) instructions in affected programs: 619430 -> 616945 (-0.40%) Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Change the type of booleans to D.Matt Turner2014-12-053-25/+25
| | | | | | | | | | This is a revert of commit 4656c14e ("i965/fs: Change the type of booleans to UD and emit correct immediates") plus some small additional fixes, like casting ctx->Const.UniformBooleanTrue to int and changing UD to D in the ir_unop_b2f cases. Note that it's safe to leave 0x3f800000 as UD and as a literal it's more recognizable than 1065353216. Reviewed-by: Jason Ekstrand <[email protected]>