| Commit message (Collapse) | Author | Age | Files | Lines |
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Some drivers require that the vertex buffers be unmapped prior to
drawing. This change unmaps the stream_uploader buffer after we've
uploaded the zero-stride attributes (unless the driver supports
rendering with mapped buffers).
This fixes a regression in the VMware driver since 17f776c27be266f2.
Some Mesa demos such as mandelbrot and brick would display black
quads instead of the expected rendering.
Reviewed-by: Marek Olšák <[email protected]>
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Fixes: 8ec4975cd83 ("st_glsl_to_tgsi: don't try and pass 32-bit values to get_deref_offsets")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101401
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-and-Tested-by: Michel Dänzer <[email protected]>
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Based on the same logic in the i965 driver 2f225f61451abd51 and
16060c5adcd4.
perf reports st_finalize_texture() going from 0.60% -> 0.16% with
this change when running the Xonotic benchmark from PTS.
Reviewed-by: Marek Olšák <[email protected]>
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Just use a temporary 16-bit index.
This fixes coverity issue, pointed to me by Ilia.
Reviewed-by: Samuel Pitoiset <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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Pretty obvious missing break statement.
CID: 1412564
Fixes: 641405f797 "i965: Use the new tracking mechanism for HiZ"
Signed-off-by: Lionel Landwerlin <[email protected]>
Reviewed by: Elie Tournier <[email protected]>
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Reviewed-by: Nicolai Hähnle <[email protected]>
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Otherwise, `make distcheck` will fail.
Reviewed-by: Jason Ekstrand <[email protected]>
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The resolve code looks at the current color draw buffers. These are not
valid until intel_prepare_render() is called. You can end up with one
color buffer bound, but where the renderbuffer has zero width/height and
no miptree allocated.
You can get a call chain like: _mesa_Clear -> _mesa_update_state ->
intel_update_state, where no brw driver hooks were called, so there is
no other point at which we could have called this.
Fixes crashes in KWin where Clear was causing intel_disable_rb_aux_buffer
to crash on irb != NULL but irb->mt == NULL.
According to Tapani, this also fixes crashes seen on Android.
Reviewed-by: Jason Ekstrand <[email protected]>
Tested-by: Tapani Pälli <[email protected]>
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v1: By Ben Widawsky <[email protected]>
v2: v1 had an assert only for VS. Add the restriction for GS, HS and
DS as well and make sure the allocated sizes are not multiple of 3.
v3: Move the entry_size checks in to compiler code (Ken)
Signed-off-by: Anuj Phogat <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
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As sRGB now supports lossless compression, we also need to stop resolving
single sampled color render buffers for sRGB formats in Gen 10.
Signed-off-by: Anuj Phogat <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
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Signed-off-by: Ben Widawsky <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
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CNL MOCS defines are duplicates of SKL MOCS defines.
Signed-off-by: Anuj Phogat <[email protected]>
Reviewed-by: Rafael Antognolli <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
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V2: Start using gen10 functions isl_gen10*(), gen10_blorp_exec()
gen10_init_atoms() (Jason)
Remove Vulkan changes. Do them later in a separate patch.
Signed-off-by: Anuj Phogat <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
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Signed-off-by: Anuj Phogat <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
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Signed-off-by: Anuj Phogat <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
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Signed-off-by: Anuj Phogat <[email protected]>
Acked-by: Jason Ekstrand <[email protected]>
Reviewed-by: Emil Velikov <[email protected]>
Reviewed-by: Mauro Rossi <[email protected]>
Reviewed-by: Tapani Pälli <[email protected]>
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V2: Remove isl_gen10.c and isl_gen10.h
Signed-off-by: Anuj Phogat <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
Reviewed-by: Emil Velikov <[email protected]>
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These declarations will help the code start compiling
once we wire up the makefiles for gen10. Later patches
will start using these functions for gen10.
Signed-off-by: Anuj Phogat <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
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Fixes regressions from commits e0a9b261e593 and a16355d67d92 by
neutering async mappings on non-LLC to be synchronous, like they were
before those two commits. :(
The failing tests include
piglit-test piglit.spec.nv_primitive_restart.primitive-restart-vbo_index_only
piglit-test piglit.spec.nv_primitive_restart.primitive-restart-vbo_combined_vertex_and_index
piglit-test piglit.spec.nv_primitive_restart.primitive-restart-vbo_separate_vertex_and_index
piglit-test piglit.spec.nv_primitive_restart.primitive-restart-vbo_vertex_only
piglit-test piglit.spec.arb_pixel_buffer_object.texsubimage-unpack pbo
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Since we created the file, we should be able to reopen it for appending, but
some weird filesystem error could cause that to be false. So simply check
whether we could reopen it or not.
CID: 1177144
Signed-off-by: Rafael Antognolli <[email protected]>
Reviewed-by: Matt Turner <[email protected]>
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Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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_NEW_SCISSOR mesa flag is set when a scissor test is enabled/disabled
or when a new rectangle is defined. However, it triggers too much
changes in the state tracker.
Actually, ST_NEW_RASTERIZER should only be called when a scissor
test is enabled/disabled, while ST_NEW_SCISSOR should be called
in both situations.
In other words, this will avoid to update the rasterizer every
time a new rectangle is defined using glScissor*().
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Nicolai Hähnle <[email protected]>
Reviewed-by: Samuel Pitoiset <[email protected]>
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Reviewed-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Brian Paul <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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The FLUSH_VERTICES(ctx, _NEW_ARRAY) above this will already cause
this to be called.
Reviewed-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Brian Paul <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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Rather than calling it indirectly in each driver.
Reviewed-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Brian Paul <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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Here we make some assumptions about the AEcontext and set the
recalculate bools directly.
Some formating fixes are also made while we are here.
Reviewed-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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The code comment which seems to have been added in cab974cf6c2db
(from year 2000) says:
"Set ctx->NewState to zero to avoid recursion if
Driver.UpdateState() has to call FLUSH_VERTICES(). (fixed?)"
As far as I can tell nothing in any of the UpdateState() calls
should cause it to be called recursively.
V2: add a wrapper around the osmesa update function so it can still
be used internally.
Reviewed-by: Brian Paul <[email protected]>
Reviewed-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Samuel Pitoiset <[email protected]>
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It is already called via _vbo_InvalidateState().
Reviewed-by: Marek Olšák <[email protected]>
Tested-by: Ian Romanick <[email protected]>
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v2: Rebase and reuse tiling/modifier map. (Daniel Stone)
v3: bump DRIimageExtension to version 15, fill external_only array.
v4: Y-tiling works since gen 6
Reviewed-by: Daniel Stone <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
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Add support for createImageFromDmaBufs2, adding a modifier to the
original, and allow importing CCS resources with auxiliary data from
dmabufs.
v2: avoid DRIimageExtension version bump, pass single modifier to
createImageFromDmaBufs2.
Reviewed-by: Daniel Stone <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
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Intel hardware requires that all planes of an image come from the same
buffer, which is currently implemented by testing that all FDs are
numerically the same.
However, when going through a winsys (e.g.) or anything which transits
FDs individually, the FDs may be different even if the underlying buffer
is the same.
Instead of checking the FDs for equality, we must check if they actually
point to the same buffer (Jason).
Reviewed-by: Varad Gautam <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
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This patch shouldn't actually do anything because the libdrm function
should already do this alignment. However, it preps us for a future
patch where we add in the CCS AUX size, and in the process it serves as
a good place to find bisectable issues if libdrm or kernel does
something incorrectly.
v2: Do proper alignment for X tiling, and make sure non-tiled case is
handled (Jason)
v3: Rebase (Daniel)
Reviewed-by: Daniel Stone <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
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The bufmgr took a mandatory size argument, which would only be used if
the kernel size query failed, i.e. an older kernel. It didn't actually
check that the BO size was sufficient for use.
Pull the check out of the bufmgr, and actually check that the BO is
sufficiently-sized for our import one level up. This also resolves a
chicken/egg we have when importing bufers without explicit modifiers,
namely that we need the tiling mode to calculate the size, but we need
the BO imported to query the tiling mode.
Reviewed-by: Jason Ekstrand <[email protected]>
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When allocating images, we record a tiling mode and then work backwards
to infer the modifier. Unfortunately this is the wrong way around, since
it is a one:many mapping (e.g. TILING_Y can be plain Y-tiling, or
Y-tiling with CCS).
Invert the mapping, so we record a modifier first and then map this to a
tiling mode.
Reviewed-by: Jason Ekstrand <[email protected]>
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Replace -1 with MESA_SHADER_NONE enum value to fix sign related warning:
external/mesa3d/src/compiler/glsl/link_varyings.cpp:1415:25: warning: comparison of constant -1 with expression of type 'gl_shader_stage' is always true [-Wtautological-constant-out-of-range-compare]
(consumer_stage != -1 && consumer_stage != MESA_SHADER_FRAGMENT))) {
~~~~~~~~~~~~~~ ^ ~~
Reviewed-by: Nicolai Hähnle <[email protected]>
Signed-off-by: Rob Herring <[email protected]>
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Now that we've moved over to the new array mechanism, it's no longer
needed.
Reviewed-by: Topi Pohjolainen <[email protected]>
Acked-by: Chad Versace <[email protected]>
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This is similar to the previous commit only for HiZ. For HiZ, apart
from everything looking different, there is really only one functional
change: We now track the ISL_AUX_STATE_COMPRESSED_NO_CLEAR state.
Previously, if you rendered to a resolved slice of the miptree and then
did a fast-clear with a different clear color, that slice would get
resolved even though it hadn't been fast-cleared. Now that we can track
COMPRESSED_NO_CLEAR, we know that it doesn't have any blocks in the
"clear" state so we can skip the resolve.
Reviewed-by: Topi Pohjolainen <[email protected]>
Acked-by: Chad Versace <[email protected]>
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Acked-by: Chad Versace <[email protected]>
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This commit reworks the resolve tracking for CCS and MCS to use the new
isl_aux_state enum. This should provide much more accurate and easy to
reason about tracking. In order to understand, for instance, the
intel_miptree_prepare_ccs_access function, one only has to go look at
the giant comment for the isl_aux_state enum and follow the arrows.
Unfortunately, there's no good way to split this up without making a
real mess so there are a bunch of changes in here:
1) We now do partial resolves. I really have no idea how this ever
worked before. So far as I can tell, the only time the old code
ever did a partial resolve was when it was using CCS_D where a
partial resolve and a full resolve are the same thing.
2) We are now tracking 4 states instead of 3 for CCS_E. In particular,
we distinguish between compressed with clear and compressed without
clear. The end result is that you will never get two partial
resolves in a row.
3) The texture view rules are now more correct. Previously, we would
only bail if compression was not supported by the destination
format. However, this is not actually correct. Not all format
pairs are supported for texture views with CCS even if both support
CCS individually. Fortunately, ISL has a helper for this.
4) We are no longer using intel_resolve_map for tracking aux state but
are instead using a simple array of enum isl_aux_state indexed by
level and layer. This is because, now that we're tracking 4
different states, it's no longer clear which should be the "default"
and array lookups are faster than linked list searches.
5) The new code is very assert-happy. Incorrect transitions will now
get caught by assertions rather than by rendering corruption.
Reviewed-by: Topi Pohjolainen <[email protected]>
Acked-by: Chad Versace <[email protected]>
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Reviewed-by: Topi Pohjolainen <[email protected]>
Acked-by: Chad Versace <[email protected]>
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Reviewed-by: Topi Pohjolainen <[email protected]>
Acked-by: Chad Versace <[email protected]>
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Reviewed-by: Topi Pohjolainen <[email protected]>
Acked-by: Chad Versace <[email protected]>
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Reviewed-by: Topi Pohjolainen <[email protected]>
Reviewed-by: Chad Versace <[email protected]>
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Reviewed-by: Topi Pohjolainen <[email protected]>
Reviewed-by: Chad Versace <[email protected]>
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Reviewed-by: Topi Pohjolainen <[email protected]>
Reviewed-by: Chad Versace <[email protected]>
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This is only needed to fix rendering corruptions caused by not flushing
after doing a resolve operation. The resolve now does all the needed
flushing so this is unnecessary.
Reviewed-by: Topi Pohjolainen <[email protected]>
Reviewed-by: Chad Versace <[email protected]>
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This also removes an unneeded brw_render_cache_set_check_flush() call.
We were calling it in the case where the surface got resolved to satisfy
the flushing requirements around resolves. However, blorp now does this
itself, so the extra is just redundant.
Reviewed-by: Topi Pohjolainen <[email protected]>
Reviewed-by: Chad Versace <[email protected]>
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